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2019-08-13PCI: dwc: Export dw_pcie_wait_for_link() APIVidya Sagar1-0/+1
Export the dw_pcie_wait_for_link() function to be able to build drivers using it as loadable modules. Signed-off-by: Vidya Sagar <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]>
2019-08-13PCI: dwc: Add extended configuration space capability search APIVidya Sagar2-0/+42
Add extended configuration space capability search API using struct dw_pcie* pointer. Signed-off-by: Vidya Sagar <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Acked-by: Gustavo Pimentel <[email protected]> Acked-by: Thierry Reding <[email protected]>
2019-08-13PCI: dwc: Move config space capability search APIVidya Sagar3-35/+43
Move PCIe config space capability search API to common DesignWare file as this can be used by both host and EP mode drivers. Signed-off-by: Vidya Sagar <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Reviewed-by: Thierry Reding <[email protected]> Acked-by: Gustavo Pimentel <[email protected]>
2019-08-13PCI: dwc: Group DBI registers writes requiring unlockingVidya Sagar1-6/+8
Some of DesignWare core's DBI registers (a.k.a configuration space registers) are write-protected with a lock without enabling which they are read-only by default. These write-protected registers are implementation specific. Tegra194's BAR-0 register which is at offset 0x10 in the configuration space is an example. Current implementation in dw_pcie_setup_rc() API attempts to unlock those write-protected registers whenever they are updated and lock them back again for writing. Group all write-protected registers writes so that locking and unlocking is performed once to avoid bloating the code with multiple unlock/lock sequences for all those write-protected registers. Signed-off-by: Vidya Sagar <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Reviewed-by: Thierry Reding <[email protected]> Acked-by: Jingoo Han <[email protected]>
2019-08-13PCI: Disable MSI for Tegra root portsVidya Sagar1-0/+53
Tegra PCIe rootports don't generate MSI interrupts for PME and AER events. Since PCIe spec (Ref: r4.0 sec 7.7.1.2 and 7.7.2.2) doesn't support using a mix of INTx and MSI/MSI-X, MSI needs to be disabled to avoid root ports service drivers registering their respective ISRs with MSI interrupt and to let only INTx be used for all events. Signed-off-by: Vidya Sagar <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Reviewed-by: Thierry Reding <[email protected]>
2019-08-13PCI: Add #defines for some of PCIe spec r4.0 featuresVidya Sagar1-1/+13
Add #defines only for the Data Link Feature and Physical Layer 16.0 GT/s features as defined in PCIe spec r4.0, sec 7.7.4 for Data Link Feature and sec 7.7.5 for Physical Layer 16.0 GT/s. Signed-off-by: Vidya Sagar <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Reviewed-by: Thierry Reding <[email protected]> Acked-by: Bjorn Helgaas <[email protected]>
2019-08-12PCI: hv: Avoid use of hv_pci_dev->pci_slot after freeing itDexuan Cui1-1/+1
The slot must be removed before the pci_dev is removed, otherwise a panic can happen due to use-after-free. Fixes: 15becc2b56c6 ("PCI: hv: Add hv_pci_remove_slots() when we unload the driver") Signed-off-by: Dexuan Cui <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Cc: [email protected]
2019-08-12PCI: tegra: Fix OF node reference leakNishka Dasgupta1-7/+15
Each iteration of for_each_child_of_node() executes of_node_put() on the previous node, but in some return paths in the middle of the loop of_node_put() is missing thus causing a reference leak. Hence stash these mid-loop return values in a variable 'err' and add a new label err_node_put which executes of_node_put() on the previous node and returns 'err' on failure. Change mid-loop return statements to point to jump to this label to fix the reference leak. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <[email protected]> [[email protected]: rewrote commit log] Signed-off-by: Lorenzo Pieralisi <[email protected]>
2019-08-08PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for RISC-VWesley Terpstra1-1/+1
Add RISC-V as an arch that supports PCI_MSI_IRQ_DOMAIN. The related change to generate asm/msi.h is 251a44888183 ("riscv: include generic support for MSI irqdomains"). Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Wesley Terpstra <[email protected]> [[email protected]: wrote patch description; split this patch from the arch/riscv patch] Signed-off-by: Paul Walmsley <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Bin Meng <[email protected]>
2019-08-08PCI: Mark expected switch fall-throughGustavo A. R. Silva1-0/+1
Mark switch cases where we are expecting to fall through. This fixes the following warning (Building: allmodconfig i386): drivers/pci/hotplug/ibmphp_res.c: In function ‘update_bridge_ranges’: drivers/pci/hotplug/ibmphp_res.c:1943:16: warning: this statement may fall through [-Wimplicit-fallthrough=] function = 0x8; ~~~~~~~~~^~~~~ drivers/pci/hotplug/ibmphp_res.c:1944:6: note: here case PCI_HEADER_TYPE_MULTIBRIDGE: ^~~~ Link: https://lore.kernel.org/r/20190802012248.GA22622@embeddedor Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Kees Cook <[email protected]>
2019-08-08PCI: Correct pci=resource_alignment parameter exampleAlexey Kardashevskiy1-2/+3
The "pci=resource_alignment" parameter is described as requiring an order (not a size) and the code in pci_specified_resource_alignment() expects an order. But the example wrongly shows a size. Convert the example to an order. Fixes: 8b078c603249 ("PCI: Update "pci=resource_alignment" documentation") Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Alexey Kardashevskiy <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2019-08-08PCI: Restore Resizable BAR size bits correctly for 1MB BARsSumit Saxena1-1/+1
In a Resizable BAR Control Register, bits 13:8 control the size of the BAR. The encoded values of these bits are as follows (see PCIe r5.0, sec 7.8.6.3): Value BAR size 0 1 MB (2^20 bytes) 1 2 MB (2^21 bytes) 2 4 MB (2^22 bytes) ... 43 8 EB (2^63 bytes) Previously we incorrectly set the BAR size bits for a 1 MB BAR to 0x1f instead of 0, so devices that support that size, e.g., new megaraid_sas and mpt3sas adapters, fail to initialize during resume from S3 sleep. Correctly calculate the BAR size bits for Resizable BAR control registers. Link: https://lore.kernel.org/r/[email protected] Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=203939 Fixes: d3252ace0bc6 ("PCI: Restore resized BAR state on resume") Signed-off-by: Sumit Saxena <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Christian König <[email protected]> Cc: [email protected] # v4.19+
2019-08-08PCI: Use PCI_SRIOV_NUM_BARS in loops instead of PCI_IOV_RESOURCE_ENDDenis Efremov2-4/+4
Writing loop conditions as "i < NUM" is a common C idiom; using "i <= END" is unusual and thus prone to errors. Change loops to use the former. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Denis Efremov <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Kuppuswamy Sathyanarayanan <[email protected]>
2019-08-08PCI: Convert pci_resource_to_user() to a weak functionDenis Efremov6-23/+12
Convert pci_resource_to_user() to a weak function so the existing architecture-specific implementations will automatically override the generic one. This allows us to remove HAVE_ARCH_PCI_RESOURCE_TO_USER definitions and avoid the conditional compilation for this single function. Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Denis Efremov <[email protected]> [bhelgaas: squash into one commit] Signed-off-by: Bjorn Helgaas <[email protected]> Acked-by: Paul Burton <[email protected]> # MIPS
2019-08-07PCI: mediatek: Add controller support for MT7629Jianjun Wang2-0/+19
MT7629 is an ARM platform SoC which has the same PCIe IP as MT7622. The HW default value of its PCI host controller Device ID is invalid, fix it to match the hardware implementation. Signed-off-by: Jianjun Wang <[email protected]> [[email protected]: commit log/minor spelling update] Signed-off-by: Lorenzo Pieralisi <[email protected]> Reviewed-by: Andrew Murray <[email protected]> Acked-by: Ryder Lee <[email protected]>
2019-08-07dt-bindings: PCI: Add support for MT7629Jianjun Wang1-0/+1
MT7629 is an ARM based platform SoC integrating the same PCIe IP as MT7622, add a binding for it. Signed-off-by: Jianjun Wang <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Reviewed-by: Rob Herring <[email protected]> Acked-by: Ryder Lee <[email protected]>
2019-07-30PCI: Make pci_set_of_node(), etc privateKelsey Skunberg2-8/+9
These interfaces: void pci_set_of_node(struct pci_dev *dev); void pci_release_of_node(struct pci_dev *dev); void pci_set_bus_of_node(struct pci_bus *bus); void pci_release_bus_of_node(struct pci_bus *bus); are only used in drivers/pci/ and do not need to be seen by the rest of the kernel. Move them to drivers/pci/pci.h so they're private to the PCI subsystem. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Kelsey Skunberg <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2019-07-30PCI: Make pci_enable_ptm() privateKelsey Skunberg2-7/+3
This interface: int pci_enable_ptm(struct pci_dev *dev, u8 *granularity); is only used in drivers/pci/ and does not need to be seen by the rest of the kernel. Move it to drivers/pci/pci.h so it's private to the PCI subsystem. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Kelsey Skunberg <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2019-07-30PCI: Make pcie_set_ecrc_checking(), pcie_ecrc_get_policy() privateKelsey Skunberg2-8/+8
These interfaces: void pcie_set_ecrc_checking(struct pci_dev *dev); void pcie_ecrc_get_policy(char *str); are only used in drivers/pci/ and do not need to be seen by the rest of the kernel. Move them to drivers/pci/pci.h so they're private to the PCI subsystem. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Kelsey Skunberg <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2019-07-30PCI: Make pci_ats_init() privateKelsey Skunberg2-5/+4
This interface: void pci_ats_init(struct pci_dev *dev); is only used in drivers/pci/ and does not need to be seen by the rest of the kernel. Move it to drivers/pci/pci.h so it's private to the PCI subsystem. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Kelsey Skunberg <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2019-07-30PCI: Make pcie_update_link_speed() privateKelsey Skunberg2-1/+1
This interface: void pcie_update_link_speed(struct pci_bus *bus, u16 link_status); is only used in drivers/pci/ and does not need to be seen by the rest of the kernel. Move it to drivers/pci/pci.h so it's private to the PCI subsystem. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Kelsey Skunberg <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2019-07-30PCI: Make pci_bus_get(), pci_bus_put() privateKelsey Skunberg2-2/+2
These interfaces: struct pci_bus *pci_bus_get(struct pci_bus *bus); void pci_bus_put(struct pci_bus *bus); are only used in drivers/pci/ and do not need to be seen by the rest of the kernel. Move them to drivers/pci/pci.h so they're private to the PCI subsystem. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Kelsey Skunberg <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2019-07-30PCI: Make pci_hotplug_io_size, mem_size, and bus_size privateKelsey Skunberg2-4/+3
These symbols: extern unsigned long pci_hotplug_io_size; extern unsigned long pci_hotplug_mem_size; extern unsigned long pci_hotplug_bus_size; are only used in drivers/pci/ and do not need to be seen by the rest of the kernel. Move them to drivers/pci/pci.h so they're private to the PCI subsystem. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Kelsey Skunberg <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2019-07-30PCI: Make pci_save_vc_state(), pci_restore_vc_state(), etc privateKelsey Skunberg2-5/+5
These Virtual Channel interfaces: int pci_save_vc_state(struct pci_dev *dev); void pci_restore_vc_state(struct pci_dev *dev); void pci_allocate_vc_save_buffers(struct pci_dev *dev); are only used in drivers/pci/ and do not need to be seen by the rest of the kernel. Move them to drivers/pci/pci.h so they're private to the PCI subsystem. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Kelsey Skunberg <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2019-07-30PCI: Make pci_get_host_bridge_device(), pci_put_host_bridge_device() privateKelsey Skunberg2-3/+3
These interfaces: struct device *pci_get_host_bridge_device(struct pci_dev *dev); void pci_put_host_bridge_device(struct device *dev); are only used in drivers/pci/ and do not need to be seen by the rest of the kernel. Move them to drivers/pci/pci.h so they're private to the PCI subsystem. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Kelsey Skunberg <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2019-07-30PCI: Make pci_check_pme_status(), pci_pme_wakeup_bus() privateKelsey Skunberg2-2/+2
These interfaces: bool pci_check_pme_status(struct pci_dev *dev); void pci_pme_wakeup_bus(struct pci_bus *bus); are only used in drivers/pci/ and do not need to be seen by the rest of the kernel. Move them to drivers/pci/pci.h so they're private to the PCI subsystem. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Kelsey Skunberg <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2019-07-30PCI: Make PCI_PM_* delay times privateKelsey Skunberg2-5/+5
These delay time definitions: #define PCI_PM_D2_DELAY 200 #define PCI_PM_D3_WAIT 10 #define PCI_PM_D3COLD_WAIT 100 #define PCI_PM_BUS_WAIT 50 are only used in drivers/pci/ and do not need to be seen by the rest of the kernel. Move them to drivers/pci/pci.h so they're private to the PCI subsystem. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Kelsey Skunberg <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2019-07-24PCI: Use devm_add_action_or_reset()Fuqian Huang1-2/+1
devm_add_action_or_reset() is a helper function which internally calls devm_add_action(). If the devm_add_action() fails, it will execute the action mentioned and return the error code. Use devm_add_action_or_reset() to reduce source code size (avoid writing the action twice) and reduce the likelihood of bugs. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Fuqian Huang <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2019-07-23PCI: Unexport pci_bus_semKelsey Skunberg1-1/+0
pci_bus_sem is not used by a loadable kernel module and does not need to be exported. It was exported by ce29ca3ea407 ("PCI: acpiphp: remove all functions in slot, even without ACPI _EJx"), which added a use of pci_bus_sem in acpiphp, which could be built as a module at that time. But since 6037a803b05e ("PCI: acpiphp: Convert acpiphp to be builtin only, not modular"), it can no longer be built as a module. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Kelsey Skunberg <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2019-07-23PCI: Unexport pci_bus_get() and pci_bus_put()Kelsey Skunberg1-2/+0
pci_bus_get() and pci_bus_put() are not used by a loadable kernel module and do not need to be exported. These were exported by fe830ef62ac6 ("PCI: Introduce pci_bus_{get|put}() to manage PCI bus reference count"), but there are no loadable modules in the tree that use them. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Kelsey Skunberg <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Acked-by: Greg Kroah-Hartman <[email protected]>
2019-07-23PCI: Remove pci_block_cfg_access() et al (unused)Kelsey Skunberg1-5/+0
Remove the following unused functions from include/linux/pci.h: pci_block_cfg_access() pci_block_cfg_access_in_atomic() pci_unblock_cfg_access() These were added by fb51ccbf217c ("PCI: Rework config space blocking services"), though no callers were added. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Kelsey Skunberg <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Reviewed-by: Lukas Bulwahn <[email protected]>
2019-07-21Linus 5.3-rc1Linus Torvalds1-2/+2
2019-07-21Merge tag 'devicetree-fixes-for-5.3' of ↵Linus Torvalds11-122/+119
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull Devicetree fixes from Rob Herring: "Fix several warnings/errors in validation of binding schemas" * tag 'devicetree-fixes-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: dt-bindings: pinctrl: stm32: Fix missing 'clocks' property in examples dt-bindings: iio: ad7124: Fix dtc warnings in example dt-bindings: iio: avia-hx711: Fix avdd-supply typo in example dt-bindings: pinctrl: aspeed: Fix AST2500 example errors dt-bindings: pinctrl: aspeed: Fix 'compatible' schema errors dt-bindings: riscv: Limit cpus schema to only check RiscV 'cpu' nodes dt-bindings: Ensure child nodes are of type 'object'
2019-07-21Merge branch 'work.misc' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs Pull vfs documentation typo fix from Al Viro. * 'work.misc' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: typo fix: it's d_make_root, not d_make_inode...
2019-07-21Merge tag '5.3-smb3-fixes' of git://git.samba.org/sfrench/cifs-2.6Linus Torvalds8-31/+126
Pull cifs fixes from Steve French: "Two fixes for stable, one that had dependency on earlier patch in this merge window and can now go in, and a perf improvement in SMB3 open" * tag '5.3-smb3-fixes' of git://git.samba.org/sfrench/cifs-2.6: cifs: update internal module number cifs: flush before set-info if we have writeable handles smb3: optimize open to not send query file internal info cifs: copy_file_range needs to strip setuid bits and update timestamps CIFS: fix deadlock in cached root handling
2019-07-21iommu/amd: fix a crash in iova_magazine_free_pfnsQian Cai1-1/+1
The commit b3aa14f02254 ("iommu: remove the mapping_error dma_map_ops method") incorrectly changed the checking from dma_ops_alloc_iova() in map_sg() causes a crash under memory pressure as dma_ops_alloc_iova() never return DMA_MAPPING_ERROR on failure but 0, so the error handling is all wrong. kernel BUG at drivers/iommu/iova.c:801! Workqueue: kblockd blk_mq_run_work_fn RIP: 0010:iova_magazine_free_pfns+0x7d/0xc0 Call Trace: free_cpu_cached_iovas+0xbd/0x150 alloc_iova_fast+0x8c/0xba dma_ops_alloc_iova.isra.6+0x65/0xa0 map_sg+0x8c/0x2a0 scsi_dma_map+0xc6/0x160 pqi_aio_submit_io+0x1f6/0x440 [smartpqi] pqi_scsi_queue_command+0x90c/0xdd0 [smartpqi] scsi_queue_rq+0x79c/0x1200 blk_mq_dispatch_rq_list+0x4dc/0xb70 blk_mq_sched_dispatch_requests+0x249/0x310 __blk_mq_run_hw_queue+0x128/0x200 blk_mq_run_work_fn+0x27/0x30 process_one_work+0x522/0xa10 worker_thread+0x63/0x5b0 kthread+0x1d2/0x1f0 ret_from_fork+0x22/0x40 Fixes: b3aa14f02254 ("iommu: remove the mapping_error dma_map_ops method") Signed-off-by: Qian Cai <[email protected]> Reviewed-by: Christoph Hellwig <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2019-07-21hexagon: switch to generic version of pte allocationMike Rapoport1-32/+2
The hexagon implementation pte_alloc_one(), pte_alloc_one_kernel(), pte_free_kernel() and pte_free() is identical to the generic except of lack of __GFP_ACCOUNT for the user PTEs allocation. Switch hexagon to use generic version of these functions. Signed-off-by: Mike Rapoport <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2019-07-21Merge tag 'ntb-5.3' of git://github.com/jonmason/ntbLinus Torvalds19-60/+1458
Pull NTB updates from Jon Mason: "New feature to add support for NTB virtual MSI interrupts, the ability to test and use this feature in the NTB transport layer. Also, bug fixes for the AMD and Switchtec drivers, as well as some general patches" * tag 'ntb-5.3' of git://github.com/jonmason/ntb: (22 commits) NTB: Describe the ntb_msi_test client in the documentation. NTB: Add MSI interrupt support to ntb_transport NTB: Add ntb_msi_test support to ntb_test NTB: Introduce NTB MSI Test Client NTB: Introduce MSI library NTB: Rename ntb.c to support multiple source files in the module NTB: Introduce functions to calculate multi-port resource index NTB: Introduce helper functions to calculate logical port number PCI/switchtec: Add module parameter to request more interrupts PCI/MSI: Support allocating virtual MSI interrupts ntb_hw_switchtec: Fix setup MW with failure bug ntb_hw_switchtec: Skip unnecessary re-setup of shared memory window for crosslink case ntb_hw_switchtec: Remove redundant steps of switchtec_ntb_reinit_peer() function NTB: correct ntb_dev_ops and ntb_dev comment typos NTB: amd: Silence shift wrapping warning in amd_ntb_db_vector_mask() ntb_hw_switchtec: potential shift wrapping bug in switchtec_ntb_init_sndev() NTB: ntb_transport: Ensure qp->tx_mw_dma_addr is initaliazed NTB: ntb_hw_amd: set peer limit register NTB: ntb_perf: Clear stale values in doorbell and command SPAD register NTB: ntb_perf: Disable NTB link after clearing peer XLAT registers ...
2019-07-20typo fix: it's d_make_root, not d_make_inode...Al Viro1-1/+1
Signed-off-by: Al Viro <[email protected]>
2019-07-20dt-bindings: pinctrl: stm32: Fix missing 'clocks' property in examplesRob Herring1-0/+4
Now that examples are validated against the DT schema, an error with required 'clocks' property missing is exposed: Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.example.dt.yaml: \ pinctrl@40020000: gpio@0: 'clocks' is a required property Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.example.dt.yaml: \ pinctrl@50020000: gpio@1000: 'clocks' is a required property Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.example.dt.yaml: \ pinctrl@50020000: gpio@2000: 'clocks' is a required property Add the missing 'clocks' properties to the examples to fix the errors. Fixes: 2c9239c125f0 ("dt-bindings: pinctrl: Convert stm32 pinctrl bindings to json-schema") Cc: Linus Walleij <[email protected]> Cc: Maxime Coquelin <[email protected]> Cc: [email protected] Cc: [email protected] Acked-by: Alexandre TORGUE <[email protected]> Signed-off-by: Rob Herring <[email protected]>
2019-07-20dt-bindings: iio: ad7124: Fix dtc warnings in exampleRob Herring1-33/+38
With the conversion to DT schema, the examples are now compiled with dtc. The ad7124 binding example has the following warning: Documentation/devicetree/bindings/iio/adc/adi,ad7124.example.dts:19.11-21: \ Warning (reg_format): /example-0/adc@0:reg: property has invalid length (4 bytes) (#address-cells == 1, #size-cells == 1) There's a default #size-cells and #address-cells values of 1 for examples. For examples needing different values such as this one on a SPI bus, they need to provide a SPI bus parent node. Fixes: 26ae15e62d3c ("Convert AD7124 bindings documentation to YAML format.") Cc: Jonathan Cameron <[email protected]> Cc: [email protected] Signed-off-by: Rob Herring <[email protected]>
2019-07-20dt-bindings: iio: avia-hx711: Fix avdd-supply typo in exampleRob Herring1-1/+1
Now that examples are validated against the DT schema, a typo in avia-hx711 example generates a warning: Documentation/devicetree/bindings/iio/adc/avia-hx711.example.dt.yaml: weight: 'avdd-supply' is a required property Fix the typo. Fixes: 5150ec3fe125 ("avia-hx711.yaml: transform DT binding to YAML") Cc: Andreas Klinger <[email protected]> Cc: Jonathan Cameron <[email protected]> Cc: [email protected] Signed-off-by: Rob Herring <[email protected]>
2019-07-20dt-bindings: pinctrl: aspeed: Fix AST2500 example errorsRob Herring1-4/+1
The schema examples are now validated against the schema itself. The AST2500 pinctrl schema has a couple of errors: Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.example.dt.yaml: \ example-0: $nodename:0: 'example-0' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.example.dt.yaml: \ pinctrl: aspeed,external-nodes: [[1, 2]] is too short Fixes: 0a617de16730 ("dt-bindings: pinctrl: aspeed: Convert AST2500 bindings to json-schema") Cc: Andrew Jeffery <[email protected]> Cc: Linus Walleij <[email protected]> Cc: Joel Stanley <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Acked-by: Andrew Jeffery <[email protected]> Signed-off-by: Rob Herring <[email protected]>
2019-07-20dt-bindings: pinctrl: aspeed: Fix 'compatible' schema errorsRob Herring2-2/+6
The Aspeed pinctl schema have errors in the 'compatible' schema: Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml: \ properties:compatible:enum: ['aspeed', 'ast2400-pinctrl', 'aspeed', 'g4-pinctrl'] has non-unique elements Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml: \ properties:compatible:enum: ['aspeed', 'ast2500-pinctrl', 'aspeed', 'g5-pinctrl'] has non-unique elements Flow style sequences have to be quoted if the vales contain ','. Fix this by using the more common one line per entry formatting. Fixes: 0a617de16730 ("dt-bindings: pinctrl: aspeed: Convert AST2500 bindings to json-schema") Fixes: 07457937bb5c ("dt-bindings: pinctrl: aspeed: Convert AST2400 bindings to json-schema") Cc: Andrew Jeffery <[email protected]> Cc: Linus Walleij <[email protected]> Cc: Joel Stanley <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Acked-by: Andrew Jeffery <[email protected]> Signed-off-by: Rob Herring <[email protected]>
2019-07-20dt-bindings: riscv: Limit cpus schema to only check RiscV 'cpu' nodesRob Herring1-82/+61
Matching on the 'cpus' node was a bad choice because the schema is incorrectly applied to non-RiscV cpus nodes. As we now have a common cpus schema which checks the general structure, it is also redundant to do so in the Risc-V CPU schema. The downside is one could conceivably mix different architecture's cpu nodes or have typos in the compatible string. The latter problem pretty much exists for every schema. Acked-by: Paul Walmsley <[email protected]> Signed-off-by: Rob Herring <[email protected]>
2019-07-20dt-bindings: Ensure child nodes are of type 'object'Rob Herring6-0/+8
Properties which are child node definitions need to have an explict type. Otherwise, a matching (DT) property can silently match when an error is desired. Fix this up tree-wide. Once this is fixed, the meta-schema will enforce this on any child node definitions. Cc: Chen-Yu Tsai <[email protected]> Cc: David Woodhouse <[email protected]> Cc: Brian Norris <[email protected]> Cc: Marek Vasut <[email protected]> Cc: Richard Weinberger <[email protected]> Cc: Vignesh Raghavendra <[email protected]> Cc: Linus Walleij <[email protected]> Cc: Maxime Coquelin <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Acked-by: Miquel Raynal <[email protected]> Acked-by: Maxime Ripard <[email protected]> Acked-by: Mark Brown <[email protected]> Acked-by: Alexandre TORGUE <[email protected]> Signed-off-by: Rob Herring <[email protected]>
2019-07-20Merge branch 'for-linus' of ↵Linus Torvalds20-29/+2183
git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input Pull more input updates from Dmitry Torokhov: - Apple SPI keyboard and trackpad driver for newer Macs - ALPS driver will ignore trackpoint-only devices to give the trackpoint driver a chance to handle them properly - another Lenovo is switched over to SMbus from PS/2 - assorted driver fixups. * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input: Input: alps - fix a mismatch between a condition check and its comment Input: psmouse - fix build error of multiple definition Input: applespi - remove set but not used variables 'sts' Input: add Apple SPI keyboard and trackpad driver Input: alps - don't handle ALPS cs19 trackpoint-only device Input: hyperv-keyboard - remove dependencies on PAGE_SIZE for ring buffer Input: adp5589 - initialize GPIO controller parent device Input: iforce - remove empty multiline comments Input: synaptics - fix misuse of strlcpy Input: auo-pixcir-ts - switch to using devm_add_action_or_reset() Input: gtco - bounds check collection indent level Input: mtk-pmic-keys - add of_node_put() before return Input: sun4i-lradc-keys - add of_node_put() before return Input: synaptics - whitelist Lenovo T580 SMBus intertouch
2019-07-20Merge tag 'dma-mapping-5.3-1' of git://git.infradead.org/users/hch/dma-mappingLinus Torvalds8-26/+83
Pull dma-mapping fixes from Christoph Hellwig: "Fix various regressions: - force unencrypted dma-coherent buffers if encryption bit can't fit into the dma coherent mask (Tom Lendacky) - avoid limiting request size if swiotlb is not used (me) - fix swiotlb handling in dma_direct_sync_sg_for_cpu/device (Fugang Duan)" * tag 'dma-mapping-5.3-1' of git://git.infradead.org/users/hch/dma-mapping: dma-direct: correct the physical addr in dma_direct_sync_sg_for_cpu/device dma-direct: only limit the mapping size if swiotlb could be used dma-mapping: add a dma_addressing_limited helper dma-direct: Force unencrypted DMA under SME for certain DMA masks
2019-07-20Merge branch 'x86-urgent-for-linus' of ↵Linus Torvalds33-215/+226
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fixes from Thomas Gleixner: "A set of x86 specific fixes and updates: - The CR2 corruption fixes which store CR2 early in the entry code and hand the stored address to the fault handlers. - Revert a forgotten leftover of the dropped FSGSBASE series. - Plug a memory leak in the boot code. - Make the Hyper-V assist functionality robust by zeroing the shadow page. - Remove a useless check for dead processes with LDT - Update paravirt and VMware maintainers entries. - A few cleanup patches addressing various compiler warnings" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/entry/64: Prevent clobbering of saved CR2 value x86/hyper-v: Zero out the VP ASSIST PAGE on allocation x86, boot: Remove multiple copy of static function sanitize_boot_params() x86/boot/compressed/64: Remove unused variable x86/boot/efi: Remove unused variables x86/mm, tracing: Fix CR2 corruption x86/entry/64: Update comments and sanity tests for create_gap x86/entry/64: Simplify idtentry a little x86/entry/32: Simplify common_exception x86/paravirt: Make read_cr2() CALLEE_SAVE MAINTAINERS: Update PARAVIRT_OPS_INTERFACE and VMWARE_HYPERVISOR_INTERFACE x86/process: Delete useless check for dead process with LDT x86: math-emu: Hide clang warnings for 16-bit overflow x86/e820: Use proper booleans instead of 0/1 x86/apic: Silence -Wtype-limits compiler warnings x86/mm: Free sme_early_buffer after init x86/boot: Fix memory leak in default_get_smp_config() Revert "x86/ptrace: Prevent ptrace from clearing the FS/GS selector" and fix the test
2019-07-20Merge branch 'perf-urgent-for-linus' of ↵Linus Torvalds20-142/+1029
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull perf tooling updates from Thomas Gleixner: "A set of perf improvements and fixes: perf db-export: - Improvements in how COMM details are exported to databases for post processing and use in the sql-viewer.py UI. - Export switch events to the database. BPF: - Bump rlimit(MEMLOCK) for 'perf test bpf' and 'perf trace', just like selftests/bpf/bpf_rlimit.h do, which makes errors due to exhaustion of this limit, which are kinda cryptic (EPERM sometimes) less frequent. perf version: - Fix segfault due to missing OPT_END(), noticed on PowerPC. perf vendor events: - Add JSON files for IBM s/390 machine type 8561. perf cs-etm (ARM): - Fix two cases of error returns not bing done properly: Invalid ERR_PTR() use and loss of propagation error codes" * 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (28 commits) perf version: Fix segfault due to missing OPT_END() perf vendor events s390: Add JSON files for machine type 8561 perf cs-etm: Return errcode in cs_etm__process_auxtrace_info() perf cs-etm: Remove errnoeous ERR_PTR() usage in cs_etm__process_auxtrace_info perf scripts python: export-to-postgresql.py: Export switch events perf scripts python: export-to-sqlite.py: Export switch events perf db-export: Export switch events perf db-export: Factor out db_export__threads() perf script: Add scripting operation process_switch() perf scripts python: exported-sql-viewer.py: Use new 'has_calls' column perf scripts python: exported-sql-viewer.py: Remove redundant semi-colons perf scripts python: export-to-postgresql.py: Add has_calls column to comms table perf scripts python: export-to-sqlite.py: Add has_calls column to comms table perf db-export: Also export thread's current comm perf db-export: Factor out db_export__comm() perf scripts python: export-to-postgresql.py: Export comm details perf scripts python: export-to-sqlite.py: Export comm details perf db-export: Export comm details perf db-export: Fix a white space issue in db_export__sample() perf db-export: Move export__comm_thread into db_export__sample() ...
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