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2019-01-25KVM: x86: Fix single-step debuggingAlexander Popov1-2/+1
The single-step debugging of KVM guests on x86 is broken: if we run gdb 'stepi' command at the breakpoint when the guest interrupts are enabled, RIP always jumps to native_apic_mem_write(). Then other nasty effects follow. Long investigation showed that on Jun 7, 2017 the commit c8401dda2f0a00cd25c0 ("KVM: x86: fix singlestepping over syscall") introduced the kvm_run.debug corruption: kvm_vcpu_do_singlestep() can be called without X86_EFLAGS_TF set. Let's fix it. Please consider that for -stable. Signed-off-by: Alexander Popov <[email protected]> Cc: [email protected] Fixes: c8401dda2f0a00cd25c0 ("KVM: x86: fix singlestepping over syscall") Signed-off-by: Paolo Bonzini <[email protected]>
2019-01-25x86/kvm/hyper-v: don't announce GUEST IDLE MSR supportVitaly Kuznetsov1-1/+0
HV_X64_MSR_GUEST_IDLE_AVAILABLE appeared in kvm_vcpu_ioctl_get_hv_cpuid() by mistake: it announces support for HV_X64_MSR_GUEST_IDLE (0x400000F0) which we don't support in KVM (yet). Fixes: 2bc39970e932 ("x86/kvm/hyper-v: Introduce KVM_GET_SUPPORTED_HV_CPUID") Signed-off-by: Vitaly Kuznetsov <[email protected]> Signed-off-by: Paolo Bonzini <[email protected]>
2019-01-25dt-bindings: firmware: tegra186-bpmp: Remove name propertyThierry Reding1-1/+0
This property is not used by device trees and was likely supposed to be a hint as to what the BPMP node should be named, rather than describing a property of the BPMP node. Suggested-by: Jon Hunter <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2019-01-25dt-bindings: firmware: Add bindings for Tegra210 BPMPTimo Alho1-0/+35
The BPMP is a specific processor in Tegra210 chip, which is designed for boot process handling, assisting in entering deep low power states (suspend to ram), and offloading DRAM memory clock scaling on some platforms. Signed-off-by: Timo Alho <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2019-01-25arm64: tegra: p2771-0000: Use TEGRA186_ prefix for GPIO namesThierry Reding1-7/+11
The new prefix allows the GPIOs to be uniquely identified on a per-chip basis, which makes it easier to distinguish Tegra186 specific GPIOs from those of later chips such as Tegra194 which supports a very different set of GPIOs. Signed-off-by: Thierry Reding <[email protected]>
2019-01-25arm64: tegra: p3310: Use TEGRA186_ prefix for GPIO namesThierry Reding1-4/+6
The new prefix allows the GPIOs to be uniquely identified on a per-chip basis, which makes it easier to distinguish Tegra186 specific GPIOs from those of later chips such as Tegra194 which supports a very different set of GPIOs. Signed-off-by: Thierry Reding <[email protected]>
2019-01-25arm64: tegra: p2597: Sort nodes by unit-addressThierry Reding1-9/+9
Some of these nodes got inserted in the wrong place. Restore ordering by unit-address. Signed-off-by: Thierry Reding <[email protected]>
2019-01-25arm64: tegra: p2972: Sort nodes properlyThierry Reding1-5/+5
At some point during rebases these were shuffled around. Put them in the right order again (sorted by unit-address). Signed-off-by: Thierry Reding <[email protected]>
2019-01-25arm64: dts: zcu100-revC: Give wifi some time after power-onJan Kiszka1-0/+1
Somewhere along recent changes to power control of the wl1831, power-on became very unreliable on the Ultra96, failing like this: wl1271_sdio: probe of mmc2:0001:1 failed with error -16 wl1271_sdio: probe of mmc2:0001:2 failed with error -16 After playing with some dt parameters and comparing to other users of this chip, it turned out we need some power-on delay to make things stable again. In contrast to those other users which define 200 ms, Ultra96 is already happy with 10 ms. Fixes: 5869ba0653b9 ("arm64: zynqmp: Add support for Xilinx zcu100-revC") Signed-off-by: Jan Kiszka <[email protected]> Acked-by: Ulf Hansson <[email protected]> Signed-off-by: Michal Simek <[email protected]>
2019-01-25arm64: tegra: Add regulators for Tegra210 DarcyMark Zhang1-0/+465
Add regulators to the Tegra210 Darcy DTS file including support for the MAX77620 PMIC. Signed-off-by: Mark Zhang <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2019-01-25arm64: tegra: Add pinmux for Darcy boardMark Zhang1-0/+1300
Add pinmux node for Tegra210 Darcy board. Signed-off-by: Mark Zhang <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2019-01-25arm64: tegra: Add gpio-keys nodes for DarcyMark Zhang1-0/+16
Add gpio-keys nodes for the power button. Signed-off-by: Mark Zhang <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2019-01-25arm64: tegra: Add support for NVIDIA Shield TVMark Zhang3-0/+87
Add initial device-tree support for NVIDIA Shield TV (a.k.a. Darcy) based upon Tegra210 SoC with 3 GiB of LPDDR4 RAM. Signed-off-by: Mark Zhang <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2019-01-25arm64: tegra: Use GIC_SPI for PMIC interrupt on SmaugThierry Reding1-1/+1
Instead of hardcoding the value (0), reuse the symbolic name from dt-bindings/interrupt-controller/arm-gic.h. Acked-by: Jon Hunter <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2019-01-25dt-bindings: tegra: Add Shield TV device tree binding documentationMark Zhang1-0/+2
Add the device tree binding documentation for NVIDIA Shield TV. Signed-off-by: Mark Zhang <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2019-01-25arm64: tegra: Fix IRQ type of PMIC on SmaugJoseph Lo1-1/+1
Fix IRQ type of PMIC which should be configured as high-level trigger. Signed-off-by: Joseph Lo <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2019-01-25arm64: tegra: Fix register range of apbmisc on Tegra210Joseph Lo1-1/+1
Fix the register range of apbmisc, that originally inherited from Tegra124. Reported-by: Mark Zhang <[email protected]> Signed-off-by: Joseph Lo <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2019-01-25arm64: tegra: Remove property gpio-keys,nameMark Zhang1-1/+0
gpio-keys,name is not a valid property supported by gpio-keys driver so remove it from DTS. Signed-off-by: Mark Zhang <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2019-01-25ARM: dts: sun8i-a23-q8: Set compatible string for LCD panelChen-Yu Tsai1-0/+4
The Q8 tablets follow the A23/A33 tablet reference design, and normally use a "generic" 800x480 LCD panel. The actual panel may vary between production runs, and there are no visible markings denoting its model. This patch uses a panel that has the same dimensions and timings that are close to what was provided in the vendor fex files. Since there are also A33 Q8 tablets with 1024x600 panels, this patch only sets the compatible string for A23 Q8 tablets. Signed-off-by: Chen-Yu Tsai <[email protected]> Signed-off-by: Maxime Ripard <[email protected]>
2019-01-25ARM: dts: sun8i-q8-common: Enable display pipeline with RGB LCD panelChen-Yu Tsai1-0/+37
The Q8 design for A23/A33 tablets have an 18-bit RGB LCD panel connected to the LCD interface on the SoC, the DC1SW output on the PMIC providing power for the LCD, and PH7 toggling the reset pin for the panel. This patch adds a device node for the panel, describing the above, and enables the display pipeline. The actual model or compatible string for the panel should be added in the tablet device tree file. Signed-off-by: Chen-Yu Tsai <[email protected]> Signed-off-by: Maxime Ripard <[email protected]>
2019-01-25ARM: dts: sun8i-a23: Add compatible strings to display pipeline device nodesChen-Yu Tsai1-0/+20
Now that the compatible strings for the display pipeline on the A23 have been added to the bindings, add the corresponding compatibles to the device nodes already in the A23/A33 shared dtsi. While the A23 has the TCON ch1 clock defined in the CCU, and the channel 1 registers are available, it does not have any means to use channel 1 due to a lack of downstream encoders, and the enable bit for channel 1 is hard-wired to 0 (off). Hence the ch1 clock is left out. As the MIPI DSI output device is not officially documented, and there are no reference devices to test it, it is not covered by this patch. Signed-off-by: Chen-Yu Tsai <[email protected]> Signed-off-by: Maxime Ripard <[email protected]>
2019-01-25ARM: dts: sun8i-a33: Move display pipeline nodes to a23/a33 common dtsiChen-Yu Tsai2-156/+185
The display pipeline has the same structure, resources and connections on both the A23 and A33. The differences include: - compatible strings - extra clock, reset control, and IO region for SAT in the backend only found on the A33 - missing ch1 clock for the TCON However, while the A23 has the TCON ch1 clock defined in the CCU, and the channel 1 registers are available, it does not have any means to use channel 1 due to a lack of downstream encoders, and the enable bit for channel 1 is hard-wired to 0 (off). As the MIPI DSI output device is not officially documented, and there are no A23 reference devices to test it, it is not covered by this patch. Signed-off-by: Chen-Yu Tsai <[email protected]> Signed-off-by: Maxime Ripard <[email protected]>
2019-01-25ARM: dts: sun8i-a23-a33: Move NAND controller device node to sort by addressChen-Yu Tsai1-15/+13
The NAND controller device node was inserted into the wrong position, probably due to a rebase or merge, as the file's structure does not provide enough context for git to accurately match the previous device node block. Fixes: d7b843df13ea ("ARM: dts: sun8i: add NAND controller node for A23/A33") Signed-off-by: Chen-Yu Tsai <[email protected]> Signed-off-by: Maxime Ripard <[email protected]>
2019-01-25cfg80211: extend range deviation for DMGChaitanya Tata1-2/+2
Recently, DMG frequency bands have been extended till 71GHz, so extend the range check till 20GHz (45-71GHZ), else some channels will be marked as disabled. Signed-off-by: Chaitanya Tata <[email protected]> Signed-off-by: Johannes Berg <[email protected]>
2019-01-25cfg80211: reg: remove warn_on for a normal caseChaitanya Tata1-2/+7
If there are simulatenous queries of regdb, then there might be a case where multiple queries can trigger request_firmware_no_wait and can have parallel callbacks being executed asynchronously. In this scenario we might hit the WARN_ON. So remove the warn_on, as the code already handles multiple callbacks gracefully. Signed-off-by: Chaitanya Tata <[email protected]> Signed-off-by: Johannes Berg <[email protected]>
2019-01-25mac80211: Add attribute aligned(2) to struct 'action'Mathieu Malaterre1-1/+1
During refactor in commit 9e478066eae4 ("mac80211: fix MU-MIMO follow-MAC mode") a new struct 'action' was declared with packed attribute as: struct { struct ieee80211_hdr_3addr hdr; u8 category; u8 action_code; } __packed action; But since struct 'ieee80211_hdr_3addr' is declared with an aligned keyword as: struct ieee80211_hdr { __le16 frame_control; __le16 duration_id; u8 addr1[ETH_ALEN]; u8 addr2[ETH_ALEN]; u8 addr3[ETH_ALEN]; __le16 seq_ctrl; u8 addr4[ETH_ALEN]; } __packed __aligned(2); Solve the ambiguity of placing aligned structure in a packed one by adding the aligned(2) attribute to struct 'action'. This removes the following warning (W=1): net/mac80211/rx.c:234:2: warning: alignment 1 of 'struct <anonymous>' is less than 2 [-Wpacked-not-aligned] Cc: Johannes Berg <[email protected]> Suggested-by: Johannes Berg <[email protected]> Signed-off-by: Mathieu Malaterre <[email protected]> Signed-off-by: Johannes Berg <[email protected]>
2019-01-25mac80211: don't initiate TDLS connection if station is not associated to APBalaji Pothunoori1-0/+4
Following call trace is observed while adding TDLS peer entry in driver during TDLS setup. Call Trace: [<c1301476>] dump_stack+0x47/0x61 [<c10537d2>] __warn+0xe2/0x100 [<fa22415f>] ? sta_apply_parameters+0x49f/0x550 [mac80211] [<c1053895>] warn_slowpath_null+0x25/0x30 [<fa22415f>] sta_apply_parameters+0x49f/0x550 [mac80211] [<fa20ad42>] ? sta_info_alloc+0x1c2/0x450 [mac80211] [<fa224623>] ieee80211_add_station+0xe3/0x160 [mac80211] [<c1876fe3>] nl80211_new_station+0x273/0x420 [<c170f6d9>] genl_rcv_msg+0x219/0x3c0 [<c170f4c0>] ? genl_rcv+0x30/0x30 [<c170ee7e>] netlink_rcv_skb+0x8e/0xb0 [<c170f4ac>] genl_rcv+0x1c/0x30 [<c170e8aa>] netlink_unicast+0x13a/0x1d0 [<c170ec18>] netlink_sendmsg+0x2d8/0x390 [<c16c5acd>] sock_sendmsg+0x2d/0x40 [<c16c6369>] ___sys_sendmsg+0x1d9/0x1e0 Fixing this by allowing TDLS setup request only when we have completed association. Signed-off-by: Balaji Pothunoori <[email protected]> Signed-off-by: Johannes Berg <[email protected]>
2019-01-25nl80211: fix NLA_POLICY_NESTED() argumentsJohannes Berg1-1/+1
syzbot reported an out-of-bounds read when passing certain malformed messages into nl80211. The specific place where this happened isn't interesting, the problem is that nested policy parsing was referring to the wrong maximum attribute and thus the policy wasn't long enough. Fix this by referring to the correct attribute. Since this is really not necessary, I'll come up with a separate patch to just pass the policy instead of both, in the common case we can infer the maxattr from the size of the policy array. Reported-by: [email protected] Cc: [email protected] Fixes: 9bb7e0f24e7e ("cfg80211: add peer measurement with FTM initiator API") Signed-off-by: Johannes Berg <[email protected]>
2019-01-24ibmveth: Do not process frames after calling napi_rescheduleThomas Falcon1-2/+0
The IBM virtual ethernet driver's polling function continues to process frames after rescheduling NAPI, resulting in a warning if it exhausted its budget. Do not restart polling after calling napi_reschedule. Instead let frames be processed in the following instance. Signed-off-by: Thomas Falcon <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-01-24net: dev_is_mac_header_xmit() true for ARPHRD_RAWIPMaciej Żenczykowski1-0/+1
__bpf_redirect() and act_mirred checks this boolean to determine whether to prefix an ethernet header. Signed-off-by: Maciej Żenczykowski <[email protected]> Acked-by: Daniel Borkmann <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-01-24net: usb: asix: ax88772_bind return error when hw_reset failZhang Run1-2/+7
The ax88772_bind() should return error code immediately when the PHY was not reset properly through ax88772a_hw_reset(). Otherwise, The asix_get_phyid() will block when get the PHY Identifier from the PHYSID1 MII registers through asix_mdio_read() due to the PHY isn't ready. Furthermore, it will produce a lot of error message cause system crash.As follows: asix 1-1:1.0 (unnamed net_device) (uninitialized): Failed to write reg index 0x0000: -71 asix 1-1:1.0 (unnamed net_device) (uninitialized): Failed to send software reset: ffffffb9 asix 1-1:1.0 (unnamed net_device) (uninitialized): Failed to write reg index 0x0000: -71 asix 1-1:1.0 (unnamed net_device) (uninitialized): Failed to enable software MII access asix 1-1:1.0 (unnamed net_device) (uninitialized): Failed to read reg index 0x0000: -71 asix 1-1:1.0 (unnamed net_device) (uninitialized): Failed to write reg index 0x0000: -71 asix 1-1:1.0 (unnamed net_device) (uninitialized): Failed to enable software MII access asix 1-1:1.0 (unnamed net_device) (uninitialized): Failed to read reg index 0x0000: -71 ... Signed-off-by: Zhang Run <[email protected]> Reviewed-by: Yang Wei <[email protected]> Tested-by: Marcel Ziswiler <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-01-24MAINTAINERS: Update cavium networking driversSudarsana Reddy Kalluru1-21/+21
Following Marvell's acquisition of Cavium, we need to update all the Cavium drivers maintainer's entries to point to our new e-mail addresses. Signed-off-by: Sudarsana Reddy Kalluru <[email protected]> Signed-off-by: Ameen Rahman <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-01-24Merge tag 'hyperv-fixes-signed' of ↵David S. Miller4-68/+129
git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux Sasha Levin says: ==================== Hyper-V hv_netvsc commits for 5.0 Three patches from Haiyang Zhang to fix settings hash key using ethtool, and Adrian Vladu's first patch fixing a few spelling mistakes. ==================== Signed-off-by: David S. Miller <[email protected]>
2019-01-24Merge tag 'linux-can-fixes-for-5.0-20190122' of ↵David S. Miller3-16/+42
git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can Marc Kleine-Budde says: ==================== pull-request: can 2019-01-22 this is a pull request of 4 patches for net/master. The first patch by is by Manfred Schlaegl and reverts a patch that caused wrong warning messages in certain use cases. The next patch is by Oliver Hartkopp for the bcm that adds sanity checks for the timer value before using it to detect potential interger overflows. The last two patches are for the flexcan driver, YueHaibing's patch fixes the the return value in the error path of the flexcan_setup_stop_mode() function. The second patch is by Uwe Kleine-König and fixes a NULL pointer deref on older flexcan cores in flexcan_chip_start(). ==================== Signed-off-by: David S. Miller <[email protected]>
2019-01-24Merge branch 'mlx4_core-fixes'David S. Miller2-31/+50
Tariq Toukan says: ==================== mlx4_core fixes for 5.0-rc This patchset includes two fixes for the mlx4_core driver. First patch by Aya fixes inaccurate parsing of some FW fields, mistakenly including additional (mostly reserved) bits. Second patch by Jack fixes a wrong (yet harmless) error handling of calls to copy_to_user() during the CQs init stage. Series generated against net commit: 49a57857aeea Linux 5.0-rc3 ==================== Signed-off-by: David S. Miller <[email protected]>
2019-01-24net/mlx4_core: Fix error handling when initializing CQ bufs in the driverJack Morgenstein1-2/+4
Procedure mlx4_init_user_cqes() handles returns by copy_to_user incorrectly. copy_to_user() returns the number of bytes not copied. Thus, a non-zero return should be treated as a -EFAULT error (as is done elsewhere in the kernel). However, mlx4_init_user_cqes() error handling simply returns the number of bytes not copied (instead of -EFAULT). Note, though, that this is a harmless bug: procedure mlx4_alloc_cq() (which is the only caller of mlx4_init_user_cqes()) treats any non-zero return as an error, but that returned error value is processed internally, and not passed further up the call stack. In addition, fixes the following sparse warning: warning: incorrect type in argument 1 (different address spaces) expected void [noderef] <asn:1>*to got void *buf Fixes: e45678973dcb ("{net, IB}/mlx4: Initialize CQ buffers in the driver when possible") Reported by: Dan Carpenter <[email protected]> Signed-off-by: Jack Morgenstein <[email protected]> Signed-off-by: Tariq Toukan <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-01-24net/mlx4_core: Add masking for a few queries on HCA capsAya Levin1-29/+46
Driver reads the query HCA capabilities without the corresponding masks. Without the correct masks, the base addresses of the queues are unaligned. In addition some reserved bits were wrongly read. Using the correct masks, ensures alignment of the base addresses and allows future firmware versions safe use of the reserved bits. Fixes: ab9c17a009ee ("mlx4_core: Modify driver initialization flow to accommodate SRIOV for Ethernet") Fixes: 0ff1fb654bec ("{NET, IB}/mlx4: Add device managed flow steering firmware API") Signed-off-by: Aya Levin <[email protected]> Signed-off-by: Tariq Toukan <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2019-01-24arm64: dts: qcom: qcs404: Add QUP I2C and SPI nodesBjorn Andersson1-0/+235
Define all six QUP controllers, both as SPI and I2C, allowing boards to enable these as needed. Associated pinmux states are also defined, to require only pinconf states to be specified by the boards, as they are enabled. Note that SPI has not been tested. Reviewed-by: Vinod Koul <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2019-01-24arm64: dts: qcom: qcs404: Define remaining UARTsBjorn Andersson1-0/+84
Add the BLSP2 BAM and add the remaining four UARTs found on the QCS404 platform. Note that these has not been tested. Reviewed-by: Vinod Koul <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2019-01-24arm64: dts: qcom: qcs404: Specify pinctrl state for UARTBjorn Andersson2-0/+28
BLSP1 UART2 is used as debug uart on the EVB development board, define pinmux state for the UART in the platform dtsi and pinconf state for it in the board dts. Reviewed-by: Vinod Koul <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2019-01-24arm64: dts: qcom: sdm845: Fix lpasscc regBjorn Andersson1-1/+1
Fix up the lpasscc address and size, missed during the conversion to address- and size-cells of 2. Reviewed-by: Douglas Anderson <[email protected]> Reported-by: Doug Anderson <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2019-01-24arm64: dts: qcom: sdm845: Remove the duplicate header inclusionSai Prakash Ranjan1-2/+1
Remove the duplicate inclusion of qcom,gcc-sdm845.h mistakenly introduced by commit 6e17f8140521 ("arm64: dts: sdm845: add prng-ee node"). Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Sai Prakash Ranjan <[email protected]> [bjorn: Also fix sort order of lpasscc include, while we're there] Signed-off-by: Bjorn Andersson <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2019-01-24arm64: dts: qcom: sdm845: Add reserve-memory nodesSibi Sankar1-0/+10
Add reserve-memory nodes for mpss and mba required for remoteproc mss pil. Reviewed-by: Bjorn Andersson <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Sibi Sankar <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2019-01-24arm64: dts: qcom: sdm845: Add gpio-ranges to TLMM nodeEvan Green1-0/+1
Add the gpio-ranges property to the TLMM node so that GPIO hogs work. Reviewed-by: Stephen Boyd <[email protected]> Signed-off-by: Evan Green <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2019-01-24arm64: dts: qcom: sdm845: Extend ranges and describe DMA spaceBjorn Andersson1-1/+2
For devices attached to an IOMMU, translation between IOVA and physical addresses is no longer 1:1 and dma-ranges should be specified to describe the available IOVA address space. On SDM845 the busses are implemented with 36 address bits, so dma-ranges must be defined to reduce the size of the IOVA address space from the 48 bits supported by the SMMU. Without this DMA allocations may end up with IOVAs outside the valid range, that gets truncated by the bus between the device and its translation unit. Also extend ranges to describe the available address space. Tested-by: Douglas Anderson <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Reviewed-by: Stephen Boyd <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2019-01-24arm64: dts: qcom: sdm845: Increase address and size cells for socBjorn Andersson1-150/+150
The busses on SDM845 provides 36 address bits, extend the address and size cells to make it possible to describe this in "ranges" and "dma-ranges". While touching all reg properties, addresses are padded to 8 digits. Tested-by: Douglas Anderson <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Reviewed-by: Stephen Boyd <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2019-01-24arm64: dts: sdm845: Add rpmh powercontroller nodeRajendra Nayak1-0/+51
Add the DT node for the rpmhpd powercontroller. Acked-by: Viresh Kumar <[email protected]> Reviewed-by: Stephen Boyd <[email protected]> Signed-off-by: Rajendra Nayak <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2019-01-24arm64: dts: msm8996: Add rpmpd device nodeRajendra Nayak1-0/+34
Add rpmpd device node and its OPP table Reviewed-by: Ulf Hansson <[email protected]> Reviewed-by: Stephen Boyd <[email protected]> Signed-off-by: Rajendra Nayak <[email protected]> Signed-off-by: Viresh Kumar <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2019-01-24arm64: dts: sdm845: Add WCN3990 WLAN module device nodeGovind Singh2-0/+34
Add device node for the ath10k SNOC platform driver probe and add resources required for WCN3990 on SDM845 soc. Reviewed-by: Brian Norris <[email protected]> Tested-by: Brian Norris <[email protected]> Signed-off-by: Govind Singh <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2019-01-24arm64: dts: qcom: sdm845: Add PDC Global reset driver nodeSibi Sankar1-0/+7
This patch adds the node to support PDC Global reset driver on SDM845 SoCs Reviewed-by: Bjorn Andersson <[email protected]> Signed-off-by: Sibi Sankar <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Signed-off-by: Andy Gross <[email protected]>
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