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2016-08-10drm: Add page_flip_target CRTC hook v2Michel Dänzer2-4/+40
Mostly the same as the existing page_flip hook, but takes an additional parameter specifying the target vertical blank period when the flip should take effect. v2: * Add curly braces around else statement corresponding to an if block with curly braces (Alex Deucher) * Call drm_crtc_vblank_put in the error case (Daniel Vetter) * Clarify entry point documentation comment (Daniel Vetter) Acked-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-10gpu: drm: radeon: radeon_i2c: don't print error when adding adapter failsWolfram Sang1-6/+2
The core will do this for us now. Signed-off-by: Wolfram Sang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-10gpu: drm: amd: amdgpu: amdgpu_i2c: don't print error when adding adapter failsWolfram Sang1-3/+1
The core will do this for us now. Signed-off-by: Wolfram Sang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-10drm/amdgpu: use more than 64KB fragment size if possibleChristian König1-4/+8
We align to 64KB, but when userspace aligns even more we can easily use more. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-10drm/amdgpu: flip frag_ptes and update_ptsChristian König1-87/+79
We can add the fragment params before we split the update for the page tables. That should save a few CPU cycles for larger updates. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-10drm/amdgpu: add adev to the pte_update_paramsChristian König1-36/+29
No need to carry that forward as a separate parameter. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-10drm/amdgpu: rename amdgpu_vm_update_paramsChristian König1-47/+44
Well those are actually page table entry parameters. This also makes the variable names used a bit shorter. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-10drm/amdgpu: cleanup VM fragment definesChristian König2-5/+5
We can actually do way more than just the 64KB we currently used as default. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-10drm/amdgpu: remove unused VM definesChristian König1-2/+0
Not used for a long time. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-10drm/amd/amdgpu: Simplify bitfield operations in gfx v8Tom St Denis2-230/+48
This patch introduces a new macro WREG32_FIELD which is used to write to a register with a new value in a field. It's designed to replace the pattern: tmp = RREG32(mmFoo); tmp &= ~REG__FIELD_MASK; tmp |= new_value << REG__FIELD__SHIFT; WREG32(mmFoo, tmp) with: WREG32_FIELD(Foo, FIELD, new_value); Unlike WREG32_P() it understands offsets/masks and doesn't require the caller to shift the value (or mask properly). It's applied where suitable in the gfx_v8_0.c driver to start with. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-10drm/amd/amdgpu: Simplify various gfx v8 functionsTom St Denis1-41/+20
Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-10drm/amd/amdgpu: Correct whitespace in GFX v8Tom St Denis1-25/+16
Fix various whitespace issues in gfx v8 driver. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-10drm/amdgpu: Change the virtual_display type from int to char*.Emily Deng5-7/+35
For virtual display feature, as there may be multiple GPUs, for user could choose whiche GPU need to enable this feature, change the type of virtual_display from int to char*. The variable will be set like this virtual_display="xxxx:xx:xx.x;xxxx:xx:xx.x;". Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu: add virtual dce support for icelandAlex Deucher1-2/+56
Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu/virtual_dce: add case for topaz for disable_dceAlex Deucher1-1/+4
This asic has no DCE block. Also clarify the error message for unmatched chips. Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu: move vsync_timer_enabled setup to dce virtual early_initAlex Deucher3-2/+1
Put it in one place. Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu: Set ip_blocks according variable amdgpu_virtual_display.Emily Deng3-50/+113
For virtual display feature, if user set the option "amdgpu.virtual_display=1" when load amdgpu.ko. Then need to set the ip_blocks with virtual display ip blocks. And when enable virtual display, the amdgpu_dal need to be set to zero. Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu: Define one variable for virtual display.Emily Deng2-0/+5
For virtual display feature, define on variable in amdgpu.ko. When want to enable virtual display feature, need set the option "amdgpu.virtual_display=1". And then disable vga render and crtc if have DCE engine. Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu: Define virtual display ip blocks.Emily Deng2-0/+623
For virtual display feature, define virtual display ip blocks, and set dce_virtual_ip_funcs to DCE block. Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu: Add DRM_MODE_CONNECTOR_VIRTUAL connector in amdgpu_connector_add.Emily Deng1-0/+91
For virtual display feature, add one connector type in amdgpu_connector_add. Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu: Call pageflip irq funtion when receiced vsync interrupt.Emily Deng1-3/+7
For virtual display feature, as there is no dce engine, so no pageflip irq generated. So directly call pageflip irq funtion when received vysn interrupt. Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu: Use software timer to generate vsync interrupt.Emily Deng3-2/+37
For virtual display feature, use the software timer to simulate the vsync interrupt. Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu: Disable VGA render and crtc when init GMC.Emily Deng7-11/+173
For virtual display feature, when the GPU has DCE engine, need to disable the VGA render and CRTC, or it will hang when initialize GMC. Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu: To define whether the GPU has DCE engine.Emily Deng2-0/+29
For virtual display feature, when the GPU has DCE engine, need to disable the VGA render and CRTC, or it will hang when initialize GMC. So first detect whether the GPU has DCE engine. Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu: Initialize dce_virtual_crtc_funcs. (v2)Emily Deng1-4/+28
For virtual display feature, initialize dce_virtual_crtc_funcs. v2: agd: rebase on upstream Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu: Initialize dce_virtual_crtc_helper_funcsEmily Deng1-9/+128
For virtual display feature, initialize dce_virtual_crtc_helper_funcs. Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu: Initialize crtc, pageflip irq funcs (v2)Emily Deng1-12/+118
For virtual display feature, initialize dce_virtual_crtc_irq_funcs, dce_virtual_pageflip_irq_funcs. As it has no dce engine, so the pageflip interrupt won't be generated, and the vsync interrupt will be generated by smu's periodic timer or software timer which will be implemented later. v2: agd: rebase on upstream Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu: Initialize dce_virtual_display_funcs.Emily Deng1-14/+208
For virtual display feature, initialize dce_virtual_display_funcs, which will be used in function dce_virtual_set_display_funcs. Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu: Initialize dce_virtual_ip_funcsEmily Deng4-2/+343
For virtual display feature, first need to initialize dce_virtual_ip_funcs, which will be used when set ip blocks. Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu: Add virtual connector and encoder macros.Emily Deng1-0/+7
For virtual display feature, add virtual connector and encoder macros. Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu: Don't retry 7 times in amdgpu_atombios_dp_get_dpcd()Lyude1-11/+10
When this code was written, we didn't retry DP aux transactions on any error, which required retrying important transactions like this in individual drivers. Since that's no longer the case, retrying here is not necessary. As well, we retry any aux transaction on any error 32 times. 7 * 32 = 224, which means this loop causes us to retry grabbing the dpcd 224 times. This is definitely far more then we actually need to do. Reviewed-by: Christian König <[email protected]> Signed-off-by: Lyude <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu: Don't print error on aux transaction timeoutsLyude1-1/+0
Since it's normal for DRM to retry our aux transaction helpers multiple times in a row, up to 32 times for each attempted transaction, we're making a lot of noise that is no longer necessary now that DRM will just print the return code we give it. Reviewed-by: Christian König <[email protected]> Signed-off-by: Lyude <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/radeon: Don't retry 7 times in radeon_dp_dpcd()Lyude1-11/+10
When this code was written, we didn't retry DP aux transactions on any error, which required retrying important transactions like this in individual drivers. Since that's no longer the case, retrying here is not necessary. As well, we retry any aux transaction on any error 32 times. 7 * 32 = 224, which means this loop causes us to retry grabbing the dpcd 224 times. This is definitely far more then we actually need to do. Reviewed-by: Christian König <[email protected]> Signed-off-by: Lyude <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/radeon: Don't print error on aux transaction timeoutsLyude1-1/+0
Since it's normal for DRM to retry our aux transaction helpers multiple times in a row, up to 32 times for each attempted transaction, we're making a lot of noise that is no longer necessary now that DRM will just print the return code we give it. Reviewed-by: Christian König <[email protected]> Signed-off-by: Lyude <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/ttm: Remove unused parameter evict from ttm_bo_move_memcpyMichel Dänzer7-14/+8
Reviewed-by: Christian König <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/ttm: Remove unused parameter evict from ttm_bo_move_ttmMichel Dänzer6-12/+10
Reviewed-by: Christian König <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/ttm: Wait for a BO to become idle before unbinding it from GTTMichel Dänzer6-9/+19
Fixes hangs under memory pressure, e.g. running the piglit test tex3d-maxsize concurrently with other tests. Fixes: 17d33bc9d6ef ("drm/ttm: drop waiting for idle in ttm_bo_evict.") Reviewed-by: Christian König <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu: move all Kconfig options to amdgpu/KconfigAlex Deucher2-3/+2
For consistency. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amd/powerplay: enable powerplay as default on CZ/STHuang Rui1-3/+1
Enable powerplay as default on Carrizo and Stoney. And it can be disabled with amdgpu.powerplay=0. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Huang Rui <[email protected]> Cc: Rex Zhu <[email protected]> Cc: Flora Cui <[email protected]> Cc: Ken Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amd/powerplay: change structure variable name.Rex Zhu1-2/+2
Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amd/powerplay: delete code set/unset deep_sleep/power_containment.Rex Zhu3-10/+1
they were controled by module parameter. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Ken Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu: enable VCE soft resetChunming Zhou2-4/+0
Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu: remove RB1_BUSY bit checkingRex Zhu1-1/+5
This is a workaround to let VCE soft reset work. RB1_BUSY bit is always set, so remove its checking now, and we will depend on RB0_BUSY currently. After we find the root cause of RB1_BUSY, we can add it back. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu: fix harvest config checking in vce3 check_soft_resetChunming Zhou1-3/+0
Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amdgpu: irq resume should be immediately after gpu resumeChunming Zhou1-1/+1
Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amd/amdgpu: Partially revert change to UVD v3 CGTom St Denis1-3/+3
Partially undo changes made by commit: drm/amd/amdgpu: don't track state in UVD clockgating To keep bypass even if CG flags are not set. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amd/amdgpu: Enable VCE MGCG for StoneyTom St Denis1-1/+2
Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amd/amdgpu: Enable VCE MGCG for CarrizoTom St Denis1-1/+2
Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amd/amdgpu: Don't set VCE CG in startupTom St Denis1-4/+0
It's handled by DPM/PP properly. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-08-08drm/amd/amdgpu: Fix VCE CG order and resume defaultsTom St Denis1-24/+12
CG was being enabled in reverse sense from dpm/powerplay. Also fix the default CLK_EN signal to enable all of the blocks. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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