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2018-10-09drm/amd/pp: Expose the smu support for SDMA PG cntlRex Zhu3-0/+27
SDMA IP can be power up/down via smu message Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-09drm/amd/pp: Avoid divide-by-zero in fan_ctrl_set_fan_speed_rpmRex Zhu2-0/+2
The minRPM speed maybe equal to zero. so need to check input RPM not equal to 0, otherwise cause divide-by-zero driver crash. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-09drm/amd/pp: Fix fan's RPM setting not work on VI/Vega10Rex Zhu2-4/+4
set the target rpm value to wrong register. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-09drm/amdgpu: Fix comments error in sdma_v4_1_update_power_gatingRex Zhu1-1/+1
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-09drm/amd/powerplay: enable MGPU fan boost feature on Vega20Evan Quan1-0/+15
Added Vega20 specific implementation for MGPU fan boost feature. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-09drm/amd/powerplay: helper interfaces for MGPU fan boost featureEvan Quan5-0/+66
MGPU fan boost feature is enabled only when two or more dGPUs in the system. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-09drm/amdgpu: added AMD GPU instance counting V2Evan Quan3-0/+73
Count all GPU instances from AMD(including iGPUs and dGPUs) in the system. V2: drop unnecessary initialization for other gpu_info members except mutex Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-09drm/amdgpu/vega20: make power profile output more consistentAlex Deucher1-1/+1
Make the profile name line match previous generations more closely. E.g., 0 3D_FULL_SCREEN : vs: 0(3D_FULL_SCREEN ) Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-09drm/amdgpu: change Raven always on CUs to 4Evan Quan1-2/+6
For Vega10 and Vega20, the always on CUs are 12. For Raven, it's 4. Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-09drm/amdgpu: added vega20 LBPW support v2Evan Quan1-1/+104
Enable LBPW support on vega20. v2: squash in warning fix (Alex) Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-09drm/amd/powerplay/vega20: enable fan RPM and pwm settings V2Evan Quan5-4/+207
Manual fan RPM and pwm setting on vega20 are available now. V2: correct the register for fan speed setting and avoid divide-by-zero Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-09drm/amd/powerplay/vega20: tell the correct gfx voltage V2Evan Quan3-0/+18
Export the correct gfx voltage by hwmon interface. V2: update the register naming for consistency Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-09drm/amd/powerplay/vega20: correct the hwmon interface ppt limit outputEvan Quan2-0/+14
The ppt limit read out by hwmon interface is always 0. Correct this hwmon interface output. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-10-09MAINTAINERS: Add Maxime Ripard as drm-misc maintainerSean Paul1-1/+1
Unfortunately Gustavo has decided to step down as drm-misc maintainer to focus on other projects. Thanks Gustavo for your dedication and hard work! Fortunately for us, we have a wealth of people qualified to assume a -misc maintainer role. Maxime has done an outstanding job with sun4i and in the community in general. I'm really excited that he agreed to take on this responsibility and I look forward to working with him! Cc: Dave Airlie <[email protected]> Cc: Gustavo Padovan <[email protected]> Cc: Maarten Lankhorst <[email protected]> Cc: Maxime Ripard <[email protected]> Acked-by: Maarten Lankhorst <[email protected]> Acked-by: Maxime Ripard <[email protected]> Acked-by: Dave Airlie <[email protected]> Signed-off-by: Sean Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-10-08drm/msm: a6xx: Fix improper u64 divisionSean Paul1-4/+7
This patch uses the proper do_div() macro to perform u64 division and guards against overflow if the result is too large for the unsigned long return type Fixes: a2c3c0a54d4c drm/msm/a6xx: Add devfreq support for a6xx Cc: Sharat Masetty <[email protected]> Signed-off-by: Sean Paul <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-10-08drm/msm: a5xx: Remove unneeded parensSean Paul1-2/+2
A small fixup I posted with my v2 patch [1] that was dropped. [1]- https://lists.freedesktop.org/archives/freedreno/2018-October/003647.html Signed-off-by: Sean Paul <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-10-08Merge branch 'for-upstream/mali-dp' of git://linux-arm.org/linux-ld into ↵Dave Airlie1-1/+3
drm-next I've realised that the commit 3dae1c0919d8 ("drm/arm/malidp: Implemented the size validation for AFBC framebuffers") got bungled up in the upstreaming process and it was missing an important line from the function that calculates the size of the AFBC framebuffer Signed-off-by: Dave Airlie <[email protected]> From: Liviu Dudau <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-10-07drm/msm/a6xx: Remove CP perfcounter selects from the protected listJordan Crouse1-3/+1
The CP performance counter selects were accidentally marked as protected so they couldn't be written from PM4 streams. Remove the protection because user space does have an interest in setting up their own counters. Signed-off-by: Jordan Crouse <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-10-07drm/msm: dpu: Fix memory leak caused by dropped referenceSean Paul1-3/+1
We are currently leaking a drm_crtc_commit struct for every atomic commit containing plane state. The dpu plane destroy function cleans up the fb reference manually, but fails to release the commit ref. As a result, we just keep allocating drm_crtc_commits without ever freeing them. Fortunately there's a helper function which will clean up all of our mess at once, so use that. Thanks to Doug Anderson for reporting the memory leak (and leaving breadcrumbs from kmemleak!). Reported-by: Doug Anderson <[email protected]> Signed-off-by: Sean Paul <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-10-07drm/msm: a5xx: Fix improper u64 divisionSean Paul1-5/+7
This patch uses the proper do_div() macro to perform u64 division and guards against overflow if the result is too large for the unsigned long return type Fixes: de0a3d094de0 drm/msm: re-factor devfreq code Cc: Sharat Masetty <[email protected]> Signed-off-by: Sean Paul <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-10-07drm/msm: update generated headersRob Clark8-342/+1149
Signed-off-by: Rob Clark <[email protected]>
2018-10-05drm: malidp: Add the size of the superblocks when calculating totalLiviu Dudau1-1/+3
size for AFBC buffers The size of the superblocks being added to the total AFBC buffer size got lost in the upstreaming process. Add it back. Reviewed-by: Ayan Kumar Halder <[email protected]> Signed-off-by: Liviu Dudau <[email protected]>
2018-10-05drm/imx: fix build failure without CONFIG_DRM_FBDEV_EMULATIONArnd Bergmann1-2/+0
The variable is declared in an #ifdef section, but the user is now unconditional, which leads to a build failure: drivers/gpu/drm/imx/imx-drm-core.c: In function 'imx_drm_bind': drivers/gpu/drm/imx/imx-drm-core.c:264:6: error: 'legacyfb_depth' undeclared (first use in this function); did you mean 'lockdep_depth'? Remove the remaining #ifdef as well. Fixes: f53705fd9803 ("drm/imx: Use drm_fbdev_generic_setup()") Signed-off-by: Arnd Bergmann <[email protected]> Signed-off-by: Noralf Trønnes <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-10-04drm/msm/a6xx: Add devfreq support for a6xxSharat Masetty4-5/+67
Implement routines to estimate GPU busy time and fetching the current frequency for the polling interval. This is required by the devfreq framework which recommends a frequency change if needed. The driver code then tries to set this new frequency on the GPU by sending an Out Of Band(OOB) request to the GMU. Signed-off-by: Sharat Masetty <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-10-04drm/msm: re-factor devfreq codeSharat Masetty3-23/+41
The devfreq framework requires the drivers to provide busy time estimations. The GPU driver relies on the hardware performance counteres for the busy time estimations, but different hardware revisions have counters which can be sourced from different clocks. So the busy time estimation will be target dependent. Additionally on targets where the clocks are completely controlled by the on chip microcontroller, fetching and setting the current GPU frequency will be different. This patch aims to embrace these differences by re-factoring the devfreq code a bit. Signed-off-by: Sharat Masetty <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-10-04drm/msm/a6xx: Add gmu_read64() register read opSharat Masetty1-0/+10
Add a simple function to read 64 registers in the GMU domain Signed-off-by: Sharat Masetty <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-10-04drm/msm: suspend devfreq on initSharat Masetty1-0/+2
Devfreq turns on and starts recommending power level as soon as it is initialized. The GPU is still not powered on by the time the devfreq init happens and this leads to problems on GPU's where register access is needed to get/set power levels. So we start suspended and only restart devfreq when GPU is powered on. Signed-off-by: Sharat Masetty <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-10-04Merge branch 'for-upstream/mali-dp' of git://linux-arm.org/linux-ld into ↵Dave Airlie7-73/+520
drm-next misc mali-dp updates. Signed-off-by: Dave Airlie <[email protected]> From: Liviu Dudau <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-10-04Merge tag 'tilcdc-4.20' of https://github.com/jsarha/linux into drm-nextDave Airlie2-13/+4
drm/tilcdc changes for Linux v4.20 suspend/resume update. Signed-off-by: Dave Airlie <[email protected]> From: Jyri Sarha <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-10-04BackMerge v4.19-rc6 into drm-nextDave Airlie234-1256/+1707
I have some pulls based on rc6, and I prefer to have an explicit backmerge. Signed-off-by: Dave Airlie <[email protected]>
2018-10-04Merge tag 'exynos-drm-next-for-v4.20' of ↵Dave Airlie12-208/+249
git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next Add out-bridge support - This patch series enables out-bridge for LVDS bridge device support, and also includes two cleanups and one relevant dt binding update for this. Add Samsung 16x16 tiled format support - This patch series adds Samsung 16x16 tiled format to scaler and gsc drivers. As for this, it adds Samsung specific format to drm_forcc.h header. For the git-pull request with relevant patches, I requested ack-by[1] to relevant maintainers but there was no any response. I'm pretty sure no problem to go to mainline though Exynos tree because the only user of it is Exynos. (airlied: this looked fine to me) [1] https://patchwork.freedesktop.org/patch/243921/ Add configurable plane alpha and pixel blend mode support - This patch series makes mixer driver to be configuragle for pixel blend mode and plane alpha, which also includes one fixup to set all default values correctly after reset. One cleanup - This patch replaces drm_atomic_helper_suspend/resume() with drm_mode_config_helper_suspend/resume() to remove exynos specific suspend_state. Signed-off-by: Dave Airlie <[email protected]> From: Inki Dae <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-10-04Merge tag 'omapdrm-4.20-2' of ↵Dave Airlie11-147/+210
git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux into drm-next omapdrm fixes and cleanups for 4.20 - fix memory barrier bug in DMM driver - fix interrupt management in DMM driver - partial workaround for errata i878 - fix use of freed memory - some cleanups Signed-off-by: Dave Airlie <[email protected]> From: Tomi Valkeinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-10-04Merge tag 'drm-misc-next-fixes-2018-10-03' of ↵Dave Airlie2-2/+51
git://anongit.freedesktop.org/drm/drm-misc into drm-next - Add EXPERT config option to allow phys mem leak from fbdev for blob drivers (Neil) Cc: Neil Armstrong <[email protected]> Signed-off-by: Dave Airlie <[email protected]> From: Sean Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20181003195957.GA64584@art_vandelay
2018-10-03drm/msm/a6xx: Add inactive_period for a6xxJordan Crouse1-0/+1
The target definition for a630 didn't set a reasonable value for inactive_period so it defaulted to zero and we were essentially powering down after every submission. Set it back to the default value to keep the GPU from bouncing too much during regular workloads. Signed-off-by: Jordan Crouse <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-10-03drm/msm: Replace drm_dev_unref with drm_dev_putThomas Zimmermann1-4/+4
This patch unifies the naming of DRM functions for reference counting of struct drm_device. The resulting code is more aligned with the rest of the Linux kernel interfaces. Signed-off-by: Thomas Zimmermann <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-10-03drm/msm: Replace drm_gem_object_{un/reference} with put, get functionsThomas Zimmermann6-8/+8
This patch unifies the naming of DRM functions for reference counting of struct drm_gem_object. The resulting code is more aligned with the rest of the Linux kernel interfaces. Signed-off-by: Thomas Zimmermann <[email protected]> Reviewed-by: Jordan Crouse <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-10-03drm/msm: Replace drm_framebuffer_{un/reference} with put, get functionsThomas Zimmermann1-2/+2
This patch unifies the naming of DRM functions for reference counting of struct drm_framebuffer. The resulting code is more aligned with the rest of the Linux kernel interfaces. Signed-off-by: Thomas Zimmermann <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-10-03drm/msm/a6xx: Poll for HFI responsesJordan Crouse3-120/+57
The only HFI communication with the GMU on sdm845 happens during initialization and all commands are synchronous. A fancy interrupt tasklet and associated infrastructure is entirely not eeded and puts us at the mercy of the scheduler. Instead poll for the message signal and handle the response immediately and go on our way. Signed-off-by: Jordan Crouse <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-10-03msm/gpu/a6xx: Force of_dma_configure to setup DMA for GMUJordan Crouse1-1/+1
The point of the 'force_dma' parameter for of_dma_configure is to force the device to be set up even if DMA capability is not described by the firmware which is exactly the use case we have for GMU - we need SMMU to get set up but we have no other dma capabilities since memory is managed by the GPU driver. Currently we pass false so of_dma_configure() fails and subsequently GMU and GPU probe does as well. Fixes: 4b565ca5a2c ("drm/msm: Add A6XX device support") Signed-off-by: Jordan Crouse <[email protected]> Tested-by: Sibi Sankar <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-10-03drm/msm/a5xx: Skip hardware preemption init if no preemptionSharat Masetty1-3/+7
In the case where preemption is not enabled, this patch simply skips preemption related initialization in hardware init sequence. Signed-off-by: Sharat Masetty <[email protected]> Reviewed-by: Jordan Crouse <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-10-03drm/msm: fix unsigned comparison with less than zeroColin Ian King1-1/+1
The return from the call to _mixer_stages can be a negative error code however this is being assigned to an unsigned variable 'stages' hence the check is always false. Fix this by making 'stages' an int. Detected by Coccinelle ("Unsigned expression compared with zero: stages < 0") Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-10-03drm/msm/a6xx: Fix PDC register overlapJordan Crouse3-69/+78
The current design greedily takes a big chunk of the PDC register space instead of just the GPU specific sections which conflicts with other drivers and generally makes a mess of things. Furthermore we only need to map the GPU PDC sections just once during init so map the memory inside the function that uses it and adjust the pointers and register offsets accordingly. Signed-off-by: Jordan Crouse <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-10-03drm/msm/a6xx: Rename gmu phandle to qcom,gmuJordan Crouse1-1/+1
>From the review for the DT bindings for the GPU/GMU it was suggested that the phandle for the GMU be 'qcom,gmu' instead of just 'gmu'. Signed-off-by: Jordan Crouse <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-10-03drm/msm/gpu: fix parameters in function msm_gpu_crashstate_captureAnders Roxell1-2/+2
When CONFIG_DEV_COREDUMP isn't defined msm_gpu_crashstate_capture doesn't pass the correct parameters. drivers/gpu/drm/msm/msm_gpu.c: In function ‘recover_worker’: drivers/gpu/drm/msm/msm_gpu.c:479:34: error: passing argument 2 of ‘msm_gpu_crashstate_capture’ from incompatible pointer type [-Werror=incompatible-pointer-types] msm_gpu_crashstate_capture(gpu, submit, comm, cmd); ^~~~~~ drivers/gpu/drm/msm/msm_gpu.c:388:13: note: expected ‘char *’ but argument is of type ‘struct msm_gem_submit *’ static void msm_gpu_crashstate_capture(struct msm_gpu *gpu, char *comm, ^~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/msm/msm_gpu.c:479:2: error: too many arguments to function ‘msm_gpu_crashstate_capture’ msm_gpu_crashstate_capture(gpu, submit, comm, cmd); ^~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/msm/msm_gpu.c:388:13: note: declared here static void msm_gpu_crashstate_capture(struct msm_gpu *gpu, char *comm, In current code the function msm_gpu_crashstate_capture parameters. Fixes: cdb95931dea3 ("drm/msm/gpu: Add the buffer objects from the submit to the crash dump") Signed-off-by: Anders Roxell <[email protected]> Reviewed-By: Jordan Crouse <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-10-03drm/msm/a6xx: Send the right perf index value to GMUSharat Masetty1-1/+1
The index of the perf table was being set in the wrong bit position in the register. With this fix, the GPU clock can be seen running at desired frequency. Signed-off-by: Sharat Masetty <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-10-03drm/msm/rd: fix crash with long process cmdlinesRob Clark1-3/+3
The [v]snprintf() functions return the size that *would have* been written into the buffer, rather than the size *actually* written. Which results in us trying to memcpy() past the end of the stack. What we really want is [v]scnprintf(). Signed-off-by: Rob Clark <[email protected]>
2018-10-03drm/msm: dpu: Don't reset dpu_enc->cur_master on .disable()Sean Paul1-2/+2
cur_master in dpu_encoder is assigned at modeset and cleared on .disable(). Unfortunately dpms (or enable/disable) does not guarantee a modeset, so cur_master is NULL when we try to re-enable it. This patch moves the NULL assignment to setup_display where it will be re-assigned later in the function. Tested-by: Bruce Wang <[email protected]> Reviewed-by: Jeykumar Sankaran <[email protected]> Signed-off-by: Sean Paul <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-10-03drm/msm/dpu: Revise _dpu_plane_get_aspaceBruce Wang1-29/+6
Remove unneeded checks from _dpu_plane_get_aspace. v3: change _dpu_plane_get_aspace to return a struct *msm_gem_address_space instead passing in a pointer of the same type to edit. Remove uneeded arguments. Reviewed-by: Jordan Crouse <[email protected]> Signed-off-by: Bruce Wang <[email protected]> Signed-off-by: Sean Paul <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-10-03drm/msm/dpu: Make dpu_plane_danger_signal_ctrl voidBruce Wang1-22/+4
Removed all impossible checks from the function, which eliminates the need for a return value. This function is also never used outside of dpu_plane.c, so the function is made static. v3: Using helper function _dpu_plane_get_kms() instead of doing it locally. Signed-off-by: Bruce Wang <[email protected]> Reviewed-by: Sean Paul <[email protected]> Signed-off-by: Sean Paul <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-10-03drm/msm/dpu: Change _dpu_crtc_vblank_enable_no_lock to voidBruce Wang1-35/+7
Removes redundant tests for _dpu_crtc_vblank_enable_no_lock. Function return type is now void and all function calls have been changed accordingly. Signed-off-by: Bruce Wang <[email protected]> Reviewed-by: Sean Paul <[email protected]> Signed-off-by: Sean Paul <[email protected]> Signed-off-by: Rob Clark <[email protected]>
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