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Add a dtsi file for RT3883 SoC and a sample dts file.
Signed-off-by: John Crispin <[email protected]>
Acked-by: Grant Likely <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5189/
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Add a dtsi file for RT2880 SoC and a sample dts file.
Signed-off-by: John Crispin <[email protected]>
Acked-by: Grant Likely <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5188/
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* remove nodes for cores whose drivers are not upstream yet
* add compat string for an additional soc
* fix a whitespace error
Signed-off-by: John Crispin <[email protected]>
Acked-by: Grant Likely <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5186/
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This patch adds binding documentation for the
compatible values of the Ralink MIPS SoCs.
Signed-off-by: Gabor Juhos <[email protected]>
Signed-off-by: John Crispin <[email protected]>
Acked-by: Grant Likely <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5187/
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Signed-off-by: John Crispin <[email protected]>
Acked-by: Grant Likely <[email protected]>
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Add cpu-feature-overrides.h for RT288x, RT305x and RT3883.
Signed-off-by: Gabor Juhos <[email protected]>
Signed-off-by: John Crispin <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5175/
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Add support code for mt7620 SOC.
The code detects the SoC and registers the clk / pinmux settings.
Signed-off-by: John Crispin <[email protected]>
Acked-by: Gabor Juhos <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5177/
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Add support code for rt3883 SOC.
The code detects the SoC and registers the clk / pinmux settings.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Gabor Juhos <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5185/
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Add support code for rt2880 SOC.
The code detects the SoC and registers the clk / pinmux settings.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Gabor Juhos <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5176/
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Add a field for the uart muxing mask and set it inside the rt305x setup code.
Signed-off-by: John Crispin <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5744/
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This will be used for RT3662/RT3883.
Signed-off-by: Gabor Juhos <[email protected]>
Acked-by: John Crispin <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5173/
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These structures are exported via struct ralink_pinmux rt_gpio_pinmux and can
hence be static.
Signed-off-by: John Crispin <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5172/
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Add proper namespacing to the variable.
Signed-off-by: John Crispin <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5171/
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RT2880 has a different location for the early serial port.
Signed-off-by: John Crispin <[email protected]>
Acked-by: Gabor Juhos <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5170/
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Add a few missing defines that are needed to make memory detection work on the
RT5350.
Signed-off-by: John Crispin <[email protected]>
Acked-by: Gabor Juhos <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5169/
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Trivial patch that adds a comment that makes the code more readable.
Signed-off-by: John Crispin <[email protected]>
Acked-by: Gabor Juhos <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5168/
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Add a few missing clocks.
Signed-off-by: John Crispin <[email protected]>
Acked-by: Gabor Juhos <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5167/
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Add a few missing defines that are needed to make USB and clock detection work
on the RT3352.
Signed-off-by: John Crispin <[email protected]>
Acked-by: Gabor Juhos <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5166/
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The Ralink IRQ code was not handling the PCI IRQ yet. Add this functionaility
to make PCI work on rt3883.
Signed-off-by: John Crispin <[email protected]>
Signed-off-by: Gabor Juhos <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5165/
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Previously this functionality was only available to users of the mips_machine
api. Moving the code to prom.c allows us to also add a OF wrapper.
Signed-off-by: John Crispin <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5164/
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Current GPIO chip implementation in octeon-irq is still broken, even after upstream
commit 87161ccdc61862c8b49e75c21209d7f79dc758e9 (MIPS: Octeon: Fix broken interrupt
controller code). It works for GPIO IRQs that have reset-default configuration, but
not for edge-triggered ones.
The problem is in octeon_irq_gpio_map_common(), which passes modified "hw" variable
(which has range of possible values 16..31) as "gpio_line" parameter to
octeon_irq_set_ciu_mapping(), which saves it in private data of the IRQ chip. Later,
neither octeon_irq_gpio_setup() is able to re-configure GPIOs (cvmx_write_csr() is
writing to non-existent CVMX_GPIO_BIT_CFGX), nor octeon_irq_ciu_gpio_ack() is able
to acknowledge such IRQ, because "mask" is incorrect.
Fix is trivial and has been tested on Cavium Octeon II -based board, including
both level-triggered and edge-triggered GPIO IRQs.
Signed-off-by: Alexander Sverdlin <[email protected]>
Cc: David Daney <[email protected]>
Acked-by: David Daney <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/4980/
Acked-by: John Crispin <[email protected]>
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Convert all uses of devm_request_and_ioremap() to the newly introduced
devm_ioremap_resource() which provides more consistent error handling.
Signed-off-by: Silviu-Mihai Popescu <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/4986/
Acked-by: John Crispin <[email protected]>
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The operations on the bitmap pointers are protected by "memory"
clobbering raw_local_irq_{save,restore}(), so there is no need for
volatile here. By removing the volatile we get better code generation
out of the compiler.
Signed-off-by: David Daney <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/4966/
Acked-by: John Crispin <[email protected]>
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Currently, init_new_context() only for each online CPU, this may cause
memory corruption when CPU hotplug and fork() happens at the same time.
To avoid this, we make init_new_context() cover each possible CPU.
Scenario:
1, CPU#1 is being offline;
2, On CPU#0, do_fork() call dup_mm() and copy a mm_struct to the child;
3, On CPU#0, dup_mm() call init_new_context(), since CPU#1 is offline
and init_new_context() only covers the online CPUs, child has the
same asid as its parent on CPU#1 (however, child's asid should be 0);
4, CPU#1 is being online;
5, Now, if both parent and child run on CPU#1, memory corruption (e.g.
segfault, bus error, etc.) will occur.
Signed-off-by: Huacai Chen <[email protected]>
Acked-by: David Daney <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/4995/
Acked-by: John Crispin <[email protected]>
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This and the next patch resolve memory corruption problems while CPU
hotplug. Without these patches, memory corruption can triggered easily
as below:
On a quad-core MIPS platform, use "spawn" of UnixBench-5.1.3 (http://
code.google.com/p/byte-unixbench/) and a CPU hotplug script like this
(hotplug.sh):
while true; do
echo 0 >/sys/devices/system/cpu/cpu1/online
echo 0 >/sys/devices/system/cpu/cpu2/online
echo 0 >/sys/devices/system/cpu/cpu3/online
sleep 1
echo 1 >/sys/devices/system/cpu/cpu1/online
echo 1 >/sys/devices/system/cpu/cpu2/online
echo 1 >/sys/devices/system/cpu/cpu3/online
sleep 1
done
Run "hotplug.sh" and then run "spawn 10000", spawn will get segfault
after a few minutes.
This patch:
Currently, clear_page()/copy_page() are generated by Micro-assembler
dynamically. But they are unavailable until uasm_resolve_relocs() has
finished because jump labels are illegal before that. Since these
functions are shared by every CPU, we only call build_clear_page()/
build_copy_page() only once at boot time. Without this patch, programs
will get random memory corruption (segmentation fault, bus error, etc.)
while CPU Hotplug (e.g. one CPU is using clear_page() while another is
generating it in cpu_cache_init()).
For similar reasons we modify build_tlb_refill_handler()'s invocation.
V2:
1, Rework the code to make CPU#0 can be online/offline.
2, Introduce cpu_has_local_ebase feature since some types of MIPS CPU
need a per-CPU tlb_refill_handler().
Signed-off-by: Huacai Chen <[email protected]>
Signed-off-by: Hongbing Hu <[email protected]>
Acked-by: David Daney <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/4994/
Acked-by: John Crispin <[email protected]>
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The Kconfig symbol MIPS_DISABLE_OBSOLETE_IDE was added in v2.6.10. It
has never been used. Let's remove it.
The symbol was originally introduced by the following commit
commit 2bfa662b64a7ee593f3039c1d3fd81a7766a63cd
Author: Pete Popov <[email protected]>
Date: Tue Oct 12 06:24:19 2004 +0000
- Db1550 bug fixes
- updated defconfig
- updated Kconfig to use DMA_COHERENT since new silicon is coherent
Signed-off-by: Paul Bolle <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5064/
Acked-by: John Crispin <[email protected]>
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The Kconfig symbol MIPS_BOARDS_GEN is unused since v2.6.27. It should
now be removed.
Signed-off-by: Paul Bolle <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5063/
Acked-by: John Crispin <[email protected]>
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The support for PB1100, PB1500, and PB1550 got merged into the code for
DB1000 and DB1550 code in v3.7. When that was done the three related
Kconfig symbols were dropped. But not all related Kconfig macros were
removed. Do so now.
Note that the PB1100 code in the Au1100 LCD driver is removed entirely
and not converted to use its current Kconfig macro. That is done because
the macros it uses (PB1100_G_CONTROL, PB1100_G_CONTROL_BL, and
PB1100_G_CONTROL_VDD) are never defined. Actually only one of these was
ever defined (PB1100_G_CONTROL) but that define was removed in v2.6.34.
So, as far as I can tell, this code could have never compiled.
Signed-off-by: Paul Bolle <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5040/
Acked-by: John Crispin <[email protected]>
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The commit c783390a0ecef08df5c804f8c5f647431a04f502 [MIPS: oprofile:
Support for XLR/XLS processors] causes a compilation failure when
oprofile is enabled and SMP is not configured.
arch/mips/oprofile/op_model_mipsxx.c: In function 'mipsxx_cpu_setup':
arch/mips/oprofile/op_model_mipsxx.c:181:2: error: implicit declaration of function 'cpu_logical_map'
To fix this, update oprofile_skip_cpu to not call cpu_logical_map when
CONFIG_SMP is not defined.
Signed-off-by: Jayachandran C <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5037/
Acked-by: John Crispin <[email protected]>
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The definitions are not used anywhere else, and merging it will
make adding the new USB definitions for XLPII series easier.
While there, cleanup some whitespace in usb-init.c. There is no
change to logic due to this commit.
Signed-off-by: Jayachandran C <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5027/
Acked-by: John Crispin <[email protected]>
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This enables us to have a default device tree per SoC family to be built
into the kernel. The default device tree for XLP3xx has been added as part
of this change. Later this can be used to provide support default boards
for XLP2xx and XLP9xx SoCs.
Kconfig options are provided for each default device tree so that just the
needed ones can be selected to be built into the kernel.
Signed-off-by: Jayachandran C <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5023/
Acked-by: John Crispin <[email protected]>
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Remove unused functions and redundant comments from
arch/mips/include/asm/netlogic/haldefs.h
Signed-off-by: Jayachandran C <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5029/
Acked-by: John Crispin <[email protected]>
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Update asm/netlogic/haldefs.h to extend register access functions
nlm_{read,write}_reg64() for 32-bit compilation. When compiled for 32-bit
the functions will read 64 IO registers with interrupts disabled.
Signed-off-by: Jayachandran C <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5026/
Acked-by: John Crispin <[email protected]>
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The index for a device interrupt in the PIC interrupt routing table
changes for different chips in the XLP family. Avoid using the fixed
entries and derive the index value from the SoC device header.
Add workarounds for some devices which do not report the IRT index
correctly.
Signed-off-by: Jayachandran C <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5025/
Acked-by: John Crispin <[email protected]>
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Use standard function to print cpumask. Also fixup the name of the
variable used and make it static.
Signed-off-by: Jayachandran C <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5024/
Acked-by: John Crispin <[email protected]>
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Remove the definitions of {read,write}_c0_{eirr,eimr}. These functions
are now unused after the PIC and IRQ code has been updated to use
optimized EIMR/EIRR functions which work on both 32-bit and 64-bit.
Signed-off-by: Jayachandran C <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5021/
Acked-by: John Crispin <[email protected]>
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Remove the irq save/restore from write_c0_eimr(), as it is always called
with interrupts off.
This allows us to remove workaround in write_c0_eimr() to fix up the
flags used by local_irq_save. This fixup worked on XLR, but will break
when 32-bit support is added to r2 cpus like XLP.
Signed-off-by: Jayachandran C <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5022/
Acked-by: John Crispin <[email protected]>
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All the header file does is provide the internal structure of clk,
which shouldn't be used by anyone except clk.c itself anyway.
Signed-off-by: Jonas Gorski <[email protected]>
Acked-by: Greg Kroah-Hartman <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5055/
Acked-by: John Crispin <[email protected]>
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BCM6362 support booting from SPI flash and NAND.
Signed-off-by: Jonas Gorski <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5012/
Acked-by: John Crispin <[email protected]>
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The PCIe controller is almost the same as the BCM6328 one, with only
the SERDES register being at a different location.
Signed-off-by: Jonas Gorski <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5011/
Acked-by: John Crispin <[email protected]>
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The SPI controller shares the same register layout as the 6358 one.
Signed-off-by: Jonas Gorski <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5010/
Acked-by: John Crispin <[email protected]>
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Add basic support for detecting and booting the BCM6362.
Signed-off-by: Jonas Gorski <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5009/
Acked-by: John Crispin <[email protected]>
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Instead of trying to use a correlation of cpu prid and chip id and
hoping they will always be unique, use the cpu prid to determine the
chip id register location and just read out the chip id.
Signed-off-by: Jonas Gorski <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5008/
Acked-by: John Crispin <[email protected]>
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The REVID is only 8 bit wide.
Signed-off-by: Jonas Gorski <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5007/
Acked-by: John Crispin <[email protected]>
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BCM6338 and BCM6348, and BCM6358 and everything after that share the
same register layout. To not have to redefine them for each new chip
and keep the code size small, only use the definitions for the first
chip with the certain layout.
Signed-off-by: Jonas Gorski <[email protected]>
Patchwork: http://patchwork.linux-mips.org/patch/5006/
Acked-by: John Crispin <[email protected]>
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This patch tries to reduce the amount of cmpxchg calls in the writer
failed path by checking the counter value first before issuing the
instruction. If ->count is not set to RWSEM_WAITING_BIAS then there is
no point wasting a cmpxchg call.
Furthermore, Michel states "I suppose it helps due to the case where
someone else steals the lock while we're trying to acquire
sem->wait_lock."
Two very different workloads and machines were used to see how this
patch improves throughput: pgbench on a quad-core laptop and aim7 on a
large 8 socket box with 80 cores.
Some results comparing Michel's fast-path write lock stealing
(tps-rwsem) on a quad-core laptop running pgbench:
| db_size | clients | tps-rwsem | tps-patch |
+---------+----------+----------------+--------------+
| 160 MB | 1 | 6906 | 9153 | + 32.5
| 160 MB | 2 | 15931 | 22487 | + 41.1%
| 160 MB | 4 | 33021 | 32503 |
| 160 MB | 8 | 34626 | 34695 |
| 160 MB | 16 | 33098 | 34003 |
| 160 MB | 20 | 31343 | 31440 |
| 160 MB | 30 | 28961 | 28987 |
| 160 MB | 40 | 26902 | 26970 |
| 160 MB | 50 | 25760 | 25810 |
------------------------------------------------------
| 1.6 GB | 1 | 7729 | 7537 |
| 1.6 GB | 2 | 19009 | 23508 | + 23.7%
| 1.6 GB | 4 | 33185 | 32666 |
| 1.6 GB | 8 | 34550 | 34318 |
| 1.6 GB | 16 | 33079 | 32689 |
| 1.6 GB | 20 | 31494 | 31702 |
| 1.6 GB | 30 | 28535 | 28755 |
| 1.6 GB | 40 | 27054 | 27017 |
| 1.6 GB | 50 | 25591 | 25560 |
------------------------------------------------------
| 7.6 GB | 1 | 6224 | 7469 | + 20.0%
| 7.6 GB | 2 | 13611 | 12778 |
| 7.6 GB | 4 | 33108 | 32927 |
| 7.6 GB | 8 | 34712 | 34878 |
| 7.6 GB | 16 | 32895 | 33003 |
| 7.6 GB | 20 | 31689 | 31974 |
| 7.6 GB | 30 | 29003 | 28806 |
| 7.6 GB | 40 | 26683 | 26976 |
| 7.6 GB | 50 | 25925 | 25652 |
------------------------------------------------------
For the aim7 worloads, they overall improved on top of Michel's
patchset. For full graphs on how the rwsem series plus this patch
behaves on a large 8 socket machine against a vanilla kernel:
http://stgolabs.net/rwsem-aim7-results.tar.gz
Signed-off-by: Davidlohr Bueso <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
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- make warning smp-safe
- result of atomic _unless_zero functions should be checked by caller
to avoid use-after-free error
- trivial whitespace fix.
Link: https://lkml.org/lkml/2013/4/12/391
Tested: compile x86, boot machine and run xfstests
Signed-off-by: Anatol Pomozov <[email protected]>
[ Removed line-break, changed to use WARN_ON_ONCE() - Linus ]
Signed-off-by: Linus Torvalds <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
Pull more vfs updates from Al Viro:
"A couple of fixes + getting rid of __blkdev_put() return value"
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
proc: Use PDE attribute setting accessor functions
make blkdev_put() return void
block_device_operations->release() should return void
mtd_blktrans_ops->release() should return void
hfs: SMP race on directory close()
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git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux
Pull parisc updates from Helge Deller:
"Main fixes and updates in this patch series are:
- we faced kernel stack corruptions because of multiple delivery of
interrupts
- added kernel stack overflow checks
- added possibility to use dedicated stacks for irq processing
- initial support for page sizes > 4k
- more information in /proc/interrupts (e.g. TLB flushes and number
of IPI calls)
- documented how the parisc gateway page works
- and of course quite some other smaller cleanups and fixes."
* 'parisc-for-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
parisc: tlb flush counting fix for SMP and UP
parisc: more irq statistics in /proc/interrupts
parisc: implement irq stacks
parisc: add kernel stack overflow check
parisc: only re-enable interrupts if we need to schedule or deliver signals when returning to userspace
parisc: implement atomic64_dec_if_positive()
parisc: use long branch in fork_like macro
parisc: fix NATIVE set up in build
parisc: document the parisc gateway page
parisc: fix partly 16/64k PAGE_SIZE boot
parisc: Provide default implementation for dma_{alloc, free}_attrs
parisc: fix whitespace errors in arch/parisc/kernel/traps.c
parisc: remove the second argument of kmap_atomic
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git://git.kernel.org/pub/scm/linux/kernel/git/sstabellini/xen
Pull ARM Xen SMP updates from Stefano Stabellini:
"This contains a bunch of Xen/ARM specific changes, including some
fixes, SMP support for Xen on ARM, and moving the xenvm machine from
mach-vexpress to mach-virt.
The non-Xen files that are touched are arch/arm/Kconfig, to select
ARM_PSCI on XEN, and arch/arm/boot/dts/Makefile, to build the xenvm
DTB if CONFIG_ARCH_VIRT.
Highlights:
- Move xenvm to mach-virt.
- Implement SMP support in Xen on ARM.
- Add support for machine reboot and power off via Xen hypercalls"
* tag '3.9-rc3-smp-6-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/sstabellini/xen:
xen/arm: remove duplicated include from enlighten.c
xen/arm: use sched_op hypercalls for machine reboot and power off
xenvm: add a simple PSCI node and a second cpu
xen/arm: XEN selects ARM_PSCI
xen: move the xenvm machine to mach-virt
xen/arm: SMP support
xen/arm: implement HYPERVISOR_vcpu_op
xen/arm: actually pass a non-NULL percpu pointer to request_percpu_irq
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