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2016-07-15drm/amd/powerplay: fix the incorrect return valueHuang Rui1-2/+2
The return value 0 (false) means fail to find GPIO in atomctrl_get_pp_assign_pin. "-1" returns true as bool actually. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Cc: <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-15drm/amd/powerplay: add atomctrl_get_voltage_evv function in ppatomctrlHuang Rui2-0/+47
The atomctrl_get_voltage_evv function will be used on iceland HW manager. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-15drm/amdgpu: add new definitions into ppsmc.h for icelandHuang Rui1-0/+4
Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-15drm/amd/powerplay: add SMU register macro for future useHuang Rui1-0/+29
Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-15drm/amdgpu: add ucode_start_address into cgs_firmware_infoHuang Rui2-0/+8
The ucode_start_address would be used on powerplay of iceland. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-15drm/amdgpu: no need load microcode at sdma if powerplay is enabledHuang Rui1-13/+15
SDMA firmware will be loaded by SMU manager if powerplay is enabled. So it needn't load at SDMA. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-15drm/amdgpu: rename smumgr to smum for dpmHuang Rui3-2/+2
Rename smumgr.h to smum.h, because smum.h is to align with the dpm of other chips and we will use "iceland_smumgr" at powerplay in following patches. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-15drm/amdgpu: disable GFX PG on CZ/BR/STAlex Deucher1-14/+0
Still some stability issues under certain workloads. Reviewed-by: Tom St Denis <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-15drivers: gpu: drm: amd: powerplay: hwmgr: Remove unused variableMatthias Beyer1-6/+3
Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Matthias Beyer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-14drm/amdgpu: return -ENOSPC when running out of UVD handlesChristian König1-1/+1
This is a minor interface change, but clearly won't break anything. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-14drm/amdgpu: trace need_flush in grab_vm as wellChristian König2-9/+11
Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-14drm/amdgpu: always signal all fencesChristian König1-2/+5
A little fallout from "drm/amdgpu: sanitize fence numbers", we sometimes need to signal all fences in the ring. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-14drm/amdgpu: check flush fence context instead of same ring v2Christian König1-3/+6
Otherwise we can run into the following situation: 1. Process A grabs ID 1 for ring 0. 2. Process B grabs ID 1 for ring 0. 3. Process A grabs ID 1 for ring 1. 4. Process A tries to reuse ID1 for ring 0 but things he doesn't need to flush. v2: check the context of the flush fence instead of messing with the owner field. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-14drm/radeon: support backlight control for UNIPHY3Alex Deucher1-0/+1
Same interface as other UNIPHY blocks Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2016-07-14drm/amdgpu: support backlight control for UNIPHY3Alex Deucher1-0/+1
Same interface as other UNIPHY blocks Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2016-07-14drm/amdgpu: remove usec timeout loop from IB testsChristian König5-56/+17
We already waited for the fence, so waiting for the registers is completely pointless and just copy & pasted from the ring test. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-14drm/amdgpu: cleanup hw reference handling in the IB testsChristian König9-19/+7
Reference should be taken when we make the assignment, not anywhere else. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-14drm/amdgpu: cleanup UVD coding styleChristian König1-4/+3
Cleanup 80 chars limit. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Alexandre Demers <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-14drm/amdgpu: allow multiple sessions in the same VCE IBChristian König1-26/+27
We always used updated firmware for amdgpu, so this actually should work fine. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-14drm/amdgpu: cleanup VCE coding styleChristian König1-26/+21
Fix 80 chars issues and remove some dead code as well. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-14drm/amdgpu: sanitize fence numbersChristian König1-2/+8
Looks like the VCE block sometimes still sends nonsense fence numbers on startup. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-08drm/amdgpu/powerplay: endian fixes for ppatomctrl.cAlex Deucher1-122/+127
Atom tables are in LE format. Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/powerplay: don't add invalid voltage.Rex Zhu1-6/+6
if atomctrl_get_voltage_evv_on_sclk_ai returns non zero (fail) in the expansion of the PP_ASSERT_WITH_CODE macro the continue will actually do nothing, So invalid voltage will be added to ppbable. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add read/write function for GC CAC programmingRex Zhu5-0/+40
Create a GC_CAC_IND_INDEX/DATA pair of funcitons to program all the CAC registers Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/powerplay: add definitions related to di/dt feature for fiji and ↵Rex Zhu2-0/+26
polaris. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/powerplay: add shared definitions for di/dt feature.Rex Zhu2-0/+83
v1: delete some comflict definitions between polaris and fiji. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: remove gfx8 registers that vary between asicsKen Wang1-22/+0
those register mask definitions are different in polaris compare to former gfx 8 gpus, so remove them from misusing. Signed-off-by: Ken Wang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/powerplay: add mvdd dpm support.Rex Zhu1-3/+2
SMC requires master switch bit to be set. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: get number of shade engine by cgs interface.Rex Zhu2-0/+4
the num of shade engine was needed to measure the activity of the graphics core and to enable di/dt feature. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: remove more of the ring backup codeAlex Deucher7-101/+4
Not used anymore. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/powerplay: Unify family definesTom St Denis3-13/+6
s/AMD_FAMILY_/AMDGPU_FAMILY_/ Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: clean up ring_backup code, no need moreChunming Zhou3-103/+2
Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: ib test first after gpu resetChunming Zhou1-10/+10
Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: recovery hw jobs when gpu reset V3Chunming Zhou2-2/+5
V3: directly use pd_addr. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: abstract amdgpu_vm_is_gpu_resetChunming Zhou1-1/+8
Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add a bool to specify if needing vm flush V2Chunming Zhou4-47/+36
which avoids job->vm_pd_addr be changed. V2: pass job structure to amdgpu_vm_grab_id and amdgpu_vm_flush directly. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: add amd_sched_job_recoveryChunming Zhou2-0/+34
Which is to recover hw jobs when gpu reset. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: force completion for gpu resetChunming Zhou1-2/+3
After all hw jobs are reset, hw fence is meaningless, so force_completion Cc: William Lewis <[email protected]> Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: block ttm first before parking schedulerChunming Zhou1-2/+3
Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd: add amd_sched_hw_job_resetChunming Zhou2-0/+15
amd_sched_hw_job_reset will remove callback from hw fence. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd: add parent for sched fenceChunming Zhou3-0/+3
Parent of sched fence is hw fence which is to signal sched fence. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: remove evict vramChunming Zhou1-3/+0
Previous vm fault is since page talbe losts connection with vmid after gpu reset. Now the issue is fixed by recovery. No need more. If we want to save vram for some EDC card, we will need to consider a complete solution. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: put old hw fence of job if gpu resetChunming Zhou1-0/+2
Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: remove fence parameter from amd_sched_job_initChristian König4-12/+7
We return the fence as part of the job structur anyway, no need to do this twice. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: earlier free SA resourcesChristian König3-2/+4
Keep the time we don't have a fence associated with the resource smaller. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: shorten amdgpu_job_free_resourcesChristian König1-3/+5
The fence and the sync object are not hardware resources. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amdgpu: fix user fence handling once moreChristian König4-14/+9
Same problem as with the VM page tables. The user fence address must be determined before the job is scheduled, not when the IB is executed. This fixes a security problem where user fences could be used to overwrite any part of VRAM. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/amdgpu: Add bank selection for MMIO debugfs (v3)Tom St Denis1-3/+32
(v2) Added INSTANCE selector (v3) Changed order of bank selectors Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/amdgpu: Add gca config debug entry (v4)Tom St Denis1-0/+70
A binary entry that lists GCA configuration data (and can be read by umr). (v2) Use kmalloc instead of vmalloc (v3) Minor indentation correction (v4) agd: Squash in kmalloc fix Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2016-07-07drm/amd/gfx: add instance field to select_se_sh (v3)Tom St Denis5-29/+39
Add ability to specify instance in select_se_sh callback. Defaults to 0xffffffff all over the driver. (v2) Don't enable INSTANCE_BROADCAST by default (v3) Style changes Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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