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2022-03-05drm/msm/a6xx: Fix missing ARRAY_SIZE() checkRob Clark1-4/+8
Fixes: f6d62d091cfd ("drm/msm/a6xx: add support for Adreno 660 GPU") Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-03-04drm/msm: Add MSM_SUBMIT_FENCE_SN_INRob Clark3-8/+41
Add a way for userspace to specify the sequence number fence used to track completion of the submit. As the seqno fence is simply an incrementing counter which is local to the submitqueue, it is easy for userspace to know the next value. This is useful for native userspace drivers in a vm guest, as the guest to host roundtrip can have high latency. Assigning the fence seqno in the guest userspace allows the guest to continue without waiting for response from the host. Signed-off-by: Rob Clark <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-03-04drm/msm/a6xx: Zap counters across context switchRob Clark1-0/+29
Any app controlled perfcntr collection (GL_AMD_performance_monitor, etc) does not require counters to maintain state across context switches. So clear them if systemwide profiling is not active. Signed-off-by: Rob Clark <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-03-04drm/msm: Add SYSPROF param (v2)Rob Clark6-0/+81
Add a SYSPROF param for system profiling tools like Mesa's pps-producer (perfetto) to control behavior related to system-wide performance counter collection. In particular, for profiling, one wants to ensure that GPU context switches do not effect perfcounter state, and might want to suppress suspend (which would cause counters to lose state). v2: Swap the order in msm_file_private_set_sysprof() [sboyd] and initialize the sysprof_active refcount to one (because the under/ overflow checking in refcount_t doesn't expect a 0->1 transition) meaning that values greater than 1 means sysprof is active. Signed-off-by: Rob Clark <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-03-04drm/msm: Add SET_PARAM ioctlRob Clark10-12/+54
It was always expected to have a use for this some day, so we left a placeholder. Now we do. (And I expect another use in the not too distant future when we start allowing userspace to allocate GPU iova.) Signed-off-by: Rob Clark <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-03-04drm/msm: Update generated headersRob Clark23-1118/+894
Update headers from mesa commit: commit 7e63fa2bb13cf14b765ad06d046789ee1879b5ef Author: Rob Clark <[email protected]> AuthorDate: Wed Mar 2 17:11:10 2022 -0800 freedreno/registers: Add a couple regs we need for kernel Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15221> Signed-off-by: Rob Clark <[email protected]> [for display bits:] Reviewed-by: Abhinav Kumar <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-03-04drm/amdgpu: initialize the vmid_wait with the stub fenceChristian König2-1/+2
This way we don't need to check for NULL any more. Signed-off-by: Christian König <[email protected]> Reviewed-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-04drm/amdgpu: properly embed the IBs into the jobChristian König2-8/+5
We now have standard macros for that. Signed-off-by: Christian König <[email protected]> Reviewed-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-04drm/amdgpu: use job and ib structures directly in CS parsersChristian König9-114/+130
Instead of providing the ib index provide the job and ib pointers directly to the patch and parse functions for UVD and VCE. Also move the set/get functions for IB values to the IB declerations. Signed-off-by: Christian König <[email protected]> Acked-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-04drm/amdgpu: header cleanupChristian König10-100/+132
No function change, just move a bunch of definitions from amdgpu.h into separate header files. Signed-off-by: Christian König <[email protected]> Acked-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-04drm/amd/amdgpu: set disabled vcn to no_schdulerJingwen Chen1-0/+2
[Why] after the reset domain introduced, the sched.ready will be init after hw_init, which will overwrite the setup in vcn hw_init, and lead to vcn ib test fail. [How] set disabled vcn to no_scheduler Fixes: 5fd8518d187ed0 ("drm/amdgpu: Move scheduler init to after XGMI is ready") Signed-off-by: Jingwen Chen <[email protected]> Acked-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-04drm/amdgpu: install ctx entities with cmpxchgChristian König1-1/+7
Since we removed the context lock we need to make sure that not two threads are trying to install an entity at the same time. Signed-off-by: Christian König <[email protected]> Fixes: 461fa7b0ac565e ("drm/amdgpu: remove ctx->lock") Reviewed-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-04drm/amdkfd: implement get_atc_vmid_pasid_mapping_info for gfx10.3Yifan Zhang1-1/+15
This patch implements get_atc_vmid_pasid_mapping_info for gfx10.3 Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-04drm/amdkfd: judge get_atc_vmid_pasid_mapping_info before callYifan Zhang1-8/+10
Fix the NULL point issue: [ 3076.255609] BUG: kernel NULL pointer dereference, address: 0000000000000000 [ 3076.255624] #PF: supervisor instruction fetch in kernel mode [ 3076.255637] #PF: error_code(0x0010) - not-present page [ 3076.255649] PGD 0 P4D 0 [ 3076.255660] Oops: 0010 [#1] SMP NOPTI [ 3076.255669] CPU: 20 PID: 2415 Comm: kfdtest Tainted: G W OE 5.11.0-41-generic #45~20.04.1-Ubuntu [ 3076.255691] Hardware name: AMD Splinter/Splinter-RPL, BIOS VS2326337N.FD 02/07/2022 [ 3076.255706] RIP: 0010:0x0 [ 3076.255718] Code: Unable to access opcode bytes at RIP 0xffffffffffffffd6. [ 3076.255732] RSP: 0018:ffffb64283e3fc10 EFLAGS: 00010297 [ 3076.255744] RAX: 0000000000000000 RBX: 0000000000000008 RCX: 0000000000000027 [ 3076.255759] RDX: ffffb64283e3fc1e RSI: 0000000000000008 RDI: ffff8c7a87f60000 [ 3076.255776] RBP: ffffb64283e3fc78 R08: ffff8c7d88518ac0 R09: ffffb64283e3fa60 [ 3076.255791] R10: 0000000000000001 R11: 0000000000000001 R12: 000000000000000f [ 3076.255805] R13: ffff8c7bdcea5800 R14: ffff8c7a9f3f3000 R15: ffff8c7a8696bc00 [ 3076.255820] FS: 0000000000000000(0000) GS:ffff8c7d88500000(0000) knlGS:0000000000000000 [ 3076.255839] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 3076.255851] CR2: ffffffffffffffd6 CR3: 0000000109e3c000 CR4: 0000000000750ee0 [ 3076.255866] PKRU: 55555554 [ 3076.255873] Call Trace: [ 3076.255884] dbgdev_wave_reset_wavefronts+0x72/0x160 [amdgpu] [ 3076.256025] process_termination_cpsch.cold+0x26/0x2f [amdgpu] [ 3076.256182] ? ktime_get_mono_fast_ns+0x4e/0xa0 [ 3076.256196] kfd_process_dequeue_from_all_devices+0x49/0x70 [amdgpu] [ 3076.256328] kfd_process_notifier_release+0x187/0x2b0 [amdgpu] [ 3076.256451] ? mn_itree_inv_end+0xdc/0x110 [ 3076.256463] __mmu_notifier_release+0x74/0x1f0 [ 3076.256474] exit_mmap+0x170/0x200 [ 3076.256484] ? __handle_mm_fault+0x677/0x920 [ 3076.256496] ? _cond_resched+0x19/0x30 [ 3076.256507] mmput+0x5d/0x130 [ 3076.256518] do_exit+0x332/0xaf0 [ 3076.256526] ? handle_mm_fault+0xd7/0x2b0 [ 3076.256537] do_group_exit+0x43/0xa0 [ 3076.256548] __x64_sys_exit_group+0x18/0x20 [ 3076.256559] do_syscall_64+0x38/0x90 [ 3076.256569] entry_SYSCALL_64_after_hwframe+0x44/0xa9 Signed-off-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-04drm/amdgpu/vcn: Add vcn firmware logRuijing Dong9-1/+163
vcn fwlog is for debugging purpose only, by default, it is disabled. Signed-off-by: Ruijing Dong <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-04drm/amdgpu/vcn: Update fw shared data structureRuijing Dong5-35/+61
Add fw log in fw shared data structure. Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Ruijing Dong <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-04drm/amdgpu: Add DFC CAP support for aldebaranDavid Yu2-1/+2
Add DFC CAP support for aldebaran Initialize cap microcode in psp_init_sriov_microcode, the ta microcode will be initialized in psp_vxx_init_microcode Signed-off-by: David Yu <[email protected]> Reviewed-by: Shaoyun.liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-04drm/amdgpu: Set correct DMA mask for aldebaranHarish Kasiviswanathan1-3/+4
Aldebaran has 48-bit physical address support Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Harish Kasiviswanathan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-04drm/amdgpu: Refactor mode2 reset logic for v13.0.2Lijo Lazar2-20/+54
Use IP version and refactor reset logic to apply to a list of devices. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Le Ma <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-04drm/amd/display: 3.2.175Aric Cyr1-1/+1
drm/amd/display: 3.2.175 This version brings along following fixes: - Remove invalid RDPCS Programming in DAL - Make functional resource functions non-static - Reset VIC if HDMI_VIC is present - Add frame alternate 3D & restrict HW packed on dongles - Reg to turn on/off PSR Power seq in FSM - Modify plane removal sequence to avoid hangs - Pass HostVM enable flag into DCN3.1 DML - DC Validation failures - Program OPP before ODM - Refactor fixed VS w/a for PHY tests - Pass deep sleep disabled allow info to dmub fw - Refine the EDID override - [FW Promotion] Release 0.0.106.0 - Add verify_link_cap back for hdmi Acked-by: Alan Liu <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-04drm/amd/display: add verify_link_cap back for hdmiCharlene Liu1-1/+2
[why] hdmi specific: add verify link cap after retrive link cap. Reviewed-by: Alvin Lee <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Charlene Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-04drm/amd/display: [FW Promotion] Release 0.0.106.0Anthony Koo1-2/+2
Acked-by: Alan Liu <[email protected]> Signed-off-by: Anthony Koo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-04drm/amd/display: refine the EDID overridejinzh1-0/+3
[Why] We already get the SBIOS EDID via ACPI on KMD, but after that, we just use the monitor EDID to set it HDR caps [How] Make the SBIOS EDID override to read_edid() That can change the read EDID caps from the right EDID Reviewed-by: Aric Cyr <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: jinzh <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-04drm/amd/display: Pass deep sleep disabled allow info to dmub fwRobin Chen1-0/+1
[Why] The deep sleep mode need to be disabled in some PSR scenario. Reviewed-by: Anthony Koo <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Robin Chen <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-04drm/amd/display: Refactor fixed VS w/a for PHY testsGeorge Shen1-5/+11
[Why/How] Refactor original w/a to unify naming and simplify logic. This also re-enables the code that was previously skipped due to the disabling of the previous workaround logic. Reviewed-by: Wenjing Liu <[email protected]> Reviewed-by: Nevenko Stupar <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: George Shen <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-04drm/amd/display: Program OPP before ODMWesley Chalmers1-24/+25
[WHY] HW expects OPP to be configured before ODM is enabled. Failure to do so can cause errors. Reviewed-by: Aric Cyr <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Wesley Chalmers <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-04drm/amd/display: Pass HostVM enable flag into DCN3.1 DMLMichael Strauss1-0/+1
[WHY] Calculations differ with HostVM enabled/disabled, causing underflow in configs with high refresh displays + scaling due to lower available BW [HOW] Check riommu_active in order to pass correct HostVM enablement to DML Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Alan Liu <[email protected]> Signed-off-by: Michael Strauss <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-04drm/exynos: fimd: add BGR support for exynos4/5Martin Jücker2-2/+44
In the downstream kernels for exynos4 and exynos5 devices, there is an undocumented register that controls the order of the RGB output. It can be set to either normal order or reversed, which enables BGR support for those SoCs. This patch enables the BGR support for all the SoCs that were found to have at least one device with this logic in the corresponding downstream kernels. Signed-off-by: Martin Jücker <[email protected]> Signed-off-by: Inki Dae <[email protected]>
2022-03-04drm/exynos: Search for TE-gpio in DSI panel's nodeMarek Szyprowski1-1/+1
TE-gpio, if defined, is placed in the panel's node, not the parent DSI node. Change the devm_gpiod_get_optional() to gpiod_get_optional() and pass proper device node to it. The code already has a proper cleanup path, so it looks that the devm_* variant has been applied accidentally during the conversion to gpiod API. Fixes: ee6c8b5afa62 ("drm/exynos: Replace legacy gpio interface for gpiod interface") Signed-off-by: Marek Szyprowski <[email protected]> Fixed a typo. Signed-off-by: Inki Dae <[email protected]>
2022-03-04drm/exynos: Don't fail if no TE-gpio is defined for DSI driverMarek Szyprowski1-1/+3
TE-gpio is optional and if it is not found then gpiod_get_optional() returns NULL. In such case the code will continue and try to convert NULL gpiod to irq what in turn fails. The failure is then propagated and driver is not registered. Fix this by returning early from exynos_dsi_register_te_irq() if no TE-gpio is found. Fixes: ee6c8b5afa62 ("drm/exynos: Replace legacy gpio interface for gpiod interface") Signed-off-by: Marek Szyprowski <[email protected]> Signed-off-by: Inki Dae <[email protected]>
2022-03-04drm/exynos: gsc: Use platform_get_irq() to get the interruptLad Prabhakar1-7/+3
platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static allocation of IRQ resources in DT core code, this causes an issue when using hierarchical interrupt domains using "interrupts" property in the node as this bypassed the hierarchical setup and messed up the irq chaining. In preparation for removal of static setup of IRQ resource from DT core code use platform_get_irq(). Signed-off-by: Lad Prabhakar <[email protected]> Signed-off-by: Inki Dae <[email protected]>
2022-03-04drm/exynos/fimc: Use platform_get_irq() to get the interruptLad Prabhakar1-8/+5
platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static allocation of IRQ resources in DT core code, this causes an issue when using hierarchical interrupt domains using "interrupts" property in the node as this bypassed the hierarchical setup and messed up the irq chaining. In preparation for removal of static setup of IRQ resource from DT core code use platform_get_irq(). Signed-off-by: Lad Prabhakar <[email protected]> Signed-off-by: Inki Dae <[email protected]>
2022-03-04drm/exynos/exynos_drm_fimd: Use platform_get_irq_byname() to get the interruptLad Prabhakar1-9/+4
platform_get_resource_byname(pdev, IORESOURCE_IRQ, ..) relies on static allocation of IRQ resources in DT core code, this causes an issue when using hierarchical interrupt domains using "interrupts" property in the node as this bypassed the hierarchical setup and messed up the irq chaining. In preparation for removal of static setup of IRQ resource from DT core code use platform_get_irq_byname(). Signed-off-by: Lad Prabhakar <[email protected]> Signed-off-by: Inki Dae <[email protected]>
2022-03-04drm/exynos: mixer: Use platform_get_irq() to get the interruptLad Prabhakar1-8/+6
platform_get_resource(pdev, IORESOURCE_IRQ, ..) relies on static allocation of IRQ resources in DT core code, this causes an issue when using hierarchical interrupt domains using "interrupts" property in the node as this bypassed the hierarchical setup and messed up the irq chaining. In preparation for removal of static setup of IRQ resource from DT core code use platform_get_irq(). Signed-off-by: Lad Prabhakar <[email protected]> Signed-off-by: Inki Dae <[email protected]>
2022-03-04drm/exynos/exynos7_drm_decon: Use platform_get_irq_byname() to get the interruptLad Prabhakar1-9/+3
platform_get_resource_byname(pdev, IORESOURCE_IRQ, ..) relies on static allocation of IRQ resources in DT core code, this causes an issue when using hierarchical interrupt domains using "interrupts" property in the node as this bypassed the hierarchical setup and messed up the irq chaining. In preparation for removal of static setup of IRQ resource from DT core code use platform_get_irq_byname(). Signed-off-by: Lad Prabhakar <[email protected]> Signed-off-by: Inki Dae <[email protected]>
2022-03-04Merge tag 'drm-msm-next-2022-03-01' of ↵Dave Airlie82-990/+2045
https://gitlab.freedesktop.org/drm/msm into drm-next We're experimenting a bit with the process this time, with Dmitry collecting display patches and merging them into msm-next with me handling the gpu/etc side of things. Summary of interesting new bits and pieces * dpu + dp support for sc8180x * dp support for sm8350 * dpu + dsi support for qcm2290 * 10nm dsi phy tuning support * bridge support for dp encoder * gpu support for additional 7c3 SKUs * assorted cleanups and fixes Signed-off-by: Dave Airlie <[email protected]> From: Rob Clark <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGu=Jdrw6DqYOYPTMks7=zatrsvdR=o6DpjqZ=TQQhFZuw@mail.gmail.com
2022-03-04Merge tag 'drm-intel-gt-next-2022-03-03' of ↵Dave Airlie71-627/+2318
git://anongit.freedesktop.org/drm/drm-intel into drm-next Cross-subsystem Changes: - drm-next backmerge for buddy allocator changes Driver Changes: - Skip i915_perf init for DG2 as it is not yet enabled (Ram) - Add missing workarounds for DG2 (Clint) - Add 64K page/align support for platforms like DG2 that require it (Matt A, Ram, Bob) - Add accelerated migration support for DG2 (Matt A) - Add flat CCS support for XeHP SDV (Abdiel, Ram) - Add Compute Command Streamer (CCS) engine support for XeHP SDV (Michel, Daniele, Aravind, Matt R) - Don't support parallel submission on compute / render (Matt B, Matt R) - Disable i915 build on PREEMPT_RT until RT behaviour fixed (Sebastian) - Remove RPS interrupt support for TGL+ (Jose) - Fix S/R with PM_EARLY for non-GTT mappable objects on DG2 (Matt, Lucas) - Skip stolen memory init if it is fully reserved (Jose) - Use iosys_map for GuC data structures that may be in LMEM BAR or SMEM (Lucas) - Do not complain about stale GuC reset notifications for banned contexts (John) - Move context descriptor fields to intel_lrc.h - Start adding support for small BAR (Matt A) - Clarify vma lifetime (Thomas) - Simplify subplatform detection on TGL (Jose) - Correct the param count for unset GuC SLPC param (Vinay, Umesh) - Read RP_STATE_CAP correctly on Gen12 with GuC SLPC (Vinay) - Initialize GuC submission locks and queues early (Daniele) - Fix GuC flag query helper function to not modify state (John) - Drop fake lmem support now we have real hardware available (Lucas) - Move misplaced W/A to their correct locations (Srinivasan) - Use get_reset_domain() helper (Tejas) - Move context descriptor fields to intel_lrc.h (Matt R) - Selftest improvements (Matt A) Signed-off-by: Dave Airlie <[email protected]> From: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-03-04Merge tag 'drm-misc-next-2022-03-03' of ↵Dave Airlie50-572/+1051
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for v5.18: UAPI Changes: Cross-subsystem Changes: - Improve performance of some fbdev ops, in some cases up to 6x faster. Core Changes: - Some small DP fixes. - Find panels in subnodes of OF devices, and add of_get_drm_panel_display_mode to retrieve mode. - Add drm_object_property_get_default_value and use it for resetting zpos in plane state reset, removing the need for individual drivers to do it. - Same for color encoding and color range props. - Update panic handling todo doc. - Add todo that format conversion helpers should be sped up similarly to fbdev ops. Driver Changes: - Add panel orientation property to simpledrm for quirked panels. - Assorted small fixes to tiny/repaper, nouveau, stm, omap, ssd130x. - Add crc support to stm/ltdc. - Add MIPI DBI compatible SPI driver - Assorted small fixes to tiny panels and bridge drivers. - Add AST2600 support to aspeed. Signed-off-by: Dave Airlie <[email protected]> From: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-03-04Merge tag 'du-next-20220303' of git://linuxtv.org/pinchartl/media into drm-nextDave Airlie13-618/+16
- R-Car LVDS support for M3-W+ (R8A77961) SoC - R-Car DU misc fixes and cleanups Signed-off-by: Dave Airlie <[email protected]> From: Laurent Pinchart <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-03-04Merge tag 'drm/tegra/for-5.18-rc1' of ↵Dave Airlie9-65/+140
https://gitlab.freedesktop.org/drm/tegra into drm-next drm/tegra: Changes for v5.18-rc1 This contains a couple more minor fixes that didn't seem urgent enough for v5.17. On top of that this improves YUV format support on older chips. Signed-off-by: Dave Airlie <[email protected]> From: Thierry Reding <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-03-03drm: rcar-du: Don't restart group when enabling plane on Gen3Laurent Pinchart2-9/+6
On Gen3 hardware enabling a VSP plane doesn't change any register that requires DRES to take effect. Avoid a group restart in that case. Signed-off-by: Laurent Pinchart <[email protected]> Reviewed-by: Kieran Bingham <[email protected]>
2022-03-03drm: rcar-du: Don't select VSP1 sink on Gen3Laurent Pinchart1-2/+4
The VSP1 sink selection through register DEFR8 is only available on Gen2 hardware. Skip it on Gen3. Signed-off-by: Laurent Pinchart <[email protected]> Reviewed-by: Kieran Bingham <[email protected]>
2022-03-03drm: rcar-du: Drop LVDS device tree backward compatibilityLaurent Pinchart9-607/+4
The rcar-du driver goes to great lengths to preserve device tree backward compatibility for the LVDS encoders by patching old device trees at runtime. The last R-Car Gen2 platform was converted to the new bindings commit edb0c3affe5214a2 ("ARM: dts: r8a7793: Convert to new LVDS DT bindings"), in v4.17, and the last RZ/G1 platform converted in commit 6a6a797625b5fe85 ("ARM: dts: r8a7743: Convert to new LVDS DT bindings"), in v5.0. Both are older than commit 58256143cff7c2e0 ("clk: renesas: Remove R-Car Gen2 legacy DT clock support"), in v5.5, which removes support for legacy bindings for clocks. The LVDS compatibility code is thus not needed anymore. Drop it. Signed-off-by: Laurent Pinchart <[email protected]> Reviewed-by: Kieran Bingham <[email protected]>
2022-03-03drm: rcar-du: lvds: Add r8a77961 supportNikita Yushchenko1-0/+1
The M3-W+ SoC has the same LVDS encoder as other R-Car Gen3 chips. Add support for M3-W+ (R8A77961) SoC to the LVDS encoder driver. Signed-off-by: Nikita Yushchenko <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]>
2022-03-03dt-bindings: display: bridge: renesas,lvds: Document r8a77961 bindingsNikita Yushchenko1-0/+1
Document the R-Car M3-W+ (R8A77961) SoC in the R-Car LVDS encoder bindings. Signed-off-by: Nikita Yushchenko <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Laurent Pinchart <[email protected]>
2022-03-03drm/ssd130x: remove redundant initialization of pointer modeColin Ian King1-1/+1
Pointer mode is being assigned a value that is never read, it is being re-assigned later with a new value. The initialization is redundant and can be removed. Cleans up clang scan build warning: drivers/gpu/drm/solomon/ssd130x.c:582:27: warning: Value stored to 'mode' during its initialization is never read [deadcode.DeadStores] Signed-off-by: Colin Ian King <[email protected]> Acked-by: Javier Martinez Canillas <[email protected]> Signed-off-by: Javier Martinez Canillas <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-03-03dt-bindings: display/msm: add missing brace in dpu-qcm2290.yamlDmitry Baryshkov1-1/+2
Add missing brace in dpu-qcm2290.yaml. While we are at it, also fix indentation for another brace, so it matches the corresponding line. Reported-by: Rob Herring <[email protected]> Cc: Loic Poulain <[email protected]> Reviewed-by: Bjorn Andersson <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Fixes: 164f69d9d45a ("dt-bindings: msm: disp: add yaml schemas for QCM2290 DPU bindings") Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Abhinav Kumar <[email protected]> Reviewed-by: Stephen Boyd <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]>
2022-03-02drm/amdgpu: remove redundant null checkWeiguo Li1-6/+0
Remove the redundant null check since the caller ensures that 'ctx' is never NULL. Reviewed-by: Christian König <[email protected]> Signed-off-by: Weiguo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-02drm/amdgpu/sdma5: drop unused cyan skillfish firmwareAlex Deucher1-7/+1
Leftover from bring up. Not used anymore. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-02drm/amdgpu/gfx10: drop unused cyan skillfish firmwareAlex Deucher1-11/+1
Leftover from bring up. Not used anymore. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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