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2022-03-25drm/amd/display: Add fSMC_MSG_SetDtbClk supportOliver Logush2-5/+18
[why] Needed to support dcn315 Reviewed-by: Charlene Liu <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Oliver Logush <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-25drm/amd/display: FEC check in timing validationChiawen Huang1-0/+4
[Why] disable/enable leads FEC mismatch between hw/sw FEC state. [How] check FEC status to fastboot on/off. Reviewed-by: Anthony Koo <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Chiawen Huang <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-25drm/amd/display: Reduce stack sizeRodrigo Siqueira1-1/+7
Linux kernel enabled more compilation restrictions related to the stack size, which caused compilation failures in our code. This commit reduces the allocation size by allocating the required memory dynamically. Reviewed-by: Harry Wentland <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-25drm/amd/display: fix audio format not updated after edid updatedCharlene Liu1-2/+2
[why] for the case edid change only changed audio format. driver still need to update stream. Reviewed-by: Alvin Lee <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Charlene Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-25drm/amd/display: Fix p-state allow debug index on dcn31Nicholas Kazlauskas1-0/+2
[Why] It changed since dcn30 but the hubbub31 constructor hasn't been modified to reflect this. [How] Update the value in the constructor to 0x6 so we're checking the right bits for p-state allow. It worked before by accident, but can falsely assert 0 depending on HW state transitions. The most frequent of which appears to be when all pipes turn off during IGT tests. Cc: Harry Wentland <[email protected]> Fixes: e7031d8258f1b4 ("drm/amd/display: Add pstate verification and recovery for DCN31") Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Eric Yang <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-25drm/amdgpu/pm: add asic smu support checkStanley.Yang1-0/+6
It must check asic whether support smu before call smu powerplay function, otherwise it may cause null point on no support smu asic. Signed-off-by: Stanley.Yang <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-25drm/amdgpu: add workarounds for VCN TMZ issue on CHIP_RAVENLang Yu1-0/+71
It is a hardware issue that VCN can't handle a GTT backing stored TMZ buffer on CHIP_RAVEN series ASIC. Move such a TMZ buffer to VRAM domain before command submission as a workaround. v2: - Use patch_cs_in_place callback. v3: - Bail out early if unsecure IBs. Suggested-by: Christian König <[email protected]> Signed-off-by: Lang Yu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2022-03-25drm/amdgpu/gmc: use PCI BARs for APUs in passthroughAlex Deucher5-7/+8
If the GPU is passed through to a guest VM, use the PCI BAR for CPU FB access rather than the physical address of carve out. The physical address is not valid in a guest. v2: Fix HDP handing as suggested by Michel Reviewed-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-25drm/amdgpu: fix off by one in amdgpu_gfx_kiq_acquire()Dan Carpenter1-1/+1
This post-op should be a pre-op so that we do not pass -1 as the bit number to test_bit(). The current code will loop downwards from 63 to -1. After changing to a pre-op, it loops from 63 to 0. Fixes: 71c37505e7ea ("drm/amdgpu/gfx: move more common KIQ code to amdgpu_gfx.c") Signed-off-by: Dan Carpenter <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-25drm/amdgpu/pm: fix the Stable pstate Test in amdgpu_testYifan Zhang1-1/+1
If GFX DPM is disbaled, Stable pstate Test in amdgpu_test fails. Check GFX DPM statue before change clock level Log: [ 46.595274] [drm] Initialized amdgpu 3.46.0 20150101 for 0000:02:00.0 on minor 0 [ 46.599929] fbcon: amdgpudrmfb (fb0) is primary device [ 46.785753] Console: switching to colour frame buffer device 240x67 [ 46.811765] amdgpu 0000:02:00.0: [drm] fb0: amdgpudrmfb frame buffer device [ 131.398407] amdgpu 0000:02:00.0: amdgpu: Failed to set performance level! Signed-off-by: Yifan Zhang <[email protected]> Acked-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-25drm/amdgpu: conduct a proper cleanup of PDB boGuchun Chen1-1/+1
Use amdgpu_bo_free_kernel instead of amdgpu_bo_unref to perform a proper cleanup of PDB bo. v2: update subject to be more accurate Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-25drm/amdgpu: prevent memory wipe in suspend/shutdown stageGuchun Chen1-1/+3
On GPUs with RAS enabled, below call trace is observed when suspending or shutting down device. The cause is we have enabled memory wipe flag for BOs on such GPUs by default, and such BOs will go to memory wipe by amdgpu_fill_buffer, however, because ring is off already, it fails to clean up the memory and throw this error message. So add a suspend/shutdown check before wipping memory. [drm:amdgpu_fill_buffer [amdgpu]] *ERROR* Trying to clear memory with ring turned off. v2: fix coding style issue Fixes: fc6ea4bee13071 ("drm/amdgpu: Wipe all VRAM on free when RAS is enabled") Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Christian König <[email protected]> Acked-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-22drm/amd: Add USBC connector IDAurabindo Pillai1-0/+1
[Why&How] Add a dedicated AMDGPU specific ID for use with newer ASICs that support USB-C output Signed-off-by: Aurabindo Pillai <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-21Merge tag 'amd-drm-next-5.18-2022-03-18' of ↵Dave Airlie117-2944/+3944
https://gitlab.freedesktop.org/agd5f/linux into drm-next amd-drm-next-5.18-2022-03-18: amdgpu: - Aldebaran fixes - SMU 13.0.5 fixes - DCN 3.1.5 fixes - DCN 3.1.6 fixes - Pipe split fixes - More display FP cleanup - DP 2.0 UHBR fix - DC GPU reset fix - DC deep color ratio fix - SMU robustness fixes - Runtime PM fix for APUs - IGT reload fixes - SR-IOV fix - Misc fixes and cleanups amdkfd: - CRIU fixes - SVM fixes UAPI: - Properly handle SDMA transfers with CRIU Proposed user mode change: https://github.com/checkpoint-restore/criu/pull/1709 Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-03-18Merge tag 'drm-intel-next-fixes-2022-03-17' of ↵Dave Airlie5-6/+10
git://anongit.freedesktop.org/drm/drm-intel into drm-next - Do not re-enable PSR after it was marked as not reliable (Jose) - Add missing boundary check in vm_access to avoid out-of-bounds access (Mastan) - Naming fix for HPD short pulse handling for eDP (Jose) Signed-off-by: Dave Airlie <[email protected]> From: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-03-16drm/i915/display: Do not re-enable PSR after it was marked as not reliableJosé Roberto de Souza1-0/+4
If a error happens and sink_not_reliable is set, PSR should be disabled for good but that is not happening. It would be disabled by the function handling the PSR error but then on the next fastset it would be enabled again in _intel_psr_post_plane_update(). It would only be disabled for good in the next modeset where has_psr will be set false. v2: - release psr lock before continue Fixes: 9ce5884e5139 ("drm/i915/display: Only keep PSR enabled if there is active planes") Reported-by: Khaled Almahallawy <[email protected]> Reported-by: Charlton Lin <[email protected]> Cc: Jouni Högander <[email protected]> Signed-off-by: José Roberto de Souza <[email protected]> Reviewed-by: Jouni Högander <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 15f26bdc81f7f03561aaea5a10d87bd6638e1459) Signed-off-by: Joonas Lahtinen <[email protected]>
2022-03-16drm/i915/display: Fix HPD short pulse handling for eDPJosé Roberto de Souza3-5/+5
Commit 13ea6db2cf24 ("drm/i915/edp: Ignore short pulse when panel powered off") completely broke short pulse handling for eDP as it is usually generated by sink when it is displaying image and there is some error or status that source needs to handle. When power panel is enabled, this state is enough to power aux transactions and VDD override is disabled, so intel_pps_have_power() is always returning false causing short pulses to be ignored. So here better naming this function that intends to check if aux lines are powered to avoid the endless cycle mentioned in the commit being fixed and fixing the check for what it is intended. v2: - renamed to intel_pps_have_panel_power_or_vdd() - fixed indentation Fixes: 13ea6db2cf24 ("drm/i915/edp: Ignore short pulse when panel powered off") Cc: Anshuman Gupta <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Uma Shankar <[email protected]> Cc: Ville Syrjälä <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: José Roberto de Souza <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 8f0c1c0949b609acfad62b8d5f742a3b5e7b05ab) Signed-off-by: Joonas Lahtinen <[email protected]>
2022-03-15drm/amdgpu: Use drm_mode_copy()Ville Syrjälä2-5/+5
struct drm_display_mode embeds a list head, so overwriting the full struct with another one will corrupt the list (if the destination mode is on a list). Use drm_mode_copy() instead which explicitly preserves the list head of the destination mode. Even if we know the destination mode is not on any list using drm_mode_copy() seems decent as it sets a good example. Bad examples of not using it might eventually get copied into code where preserving the list head actually matters. Obviously one case not covered here is when the mode itself is embedded in a larger structure and the whole structure is copied. But if we are careful when copying into modes embedded in structures I think we can be a little more reassured that bogus list heads haven't been propagated in. @is_mode_copy@ @@ drm_mode_copy(...) { ... } @depends on !is_mode_copy@ struct drm_display_mode *mode; expression E, S; @@ ( - *mode = E + drm_mode_copy(mode, &E) | - memcpy(mode, E, S) + drm_mode_copy(mode, E) ) @depends on !is_mode_copy@ struct drm_display_mode mode; expression E; @@ ( - mode = E + drm_mode_copy(&mode, &E) | - memcpy(&mode, E, S) + drm_mode_copy(&mode, E) ) @@ struct drm_display_mode *mode; @@ - &*mode + mode Cc: Alex Deucher <[email protected]> Cc: Harry Wentland <[email protected]> Cc: Leo Li <[email protected]> Cc: Rodrigo Siqueira <[email protected]> Cc: [email protected] Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/radeon: Use drm_mode_copy()Ville Syrjälä1-2/+2
struct drm_display_mode embeds a list head, so overwriting the full struct with another one will corrupt the list (if the destination mode is on a list). Use drm_mode_copy() instead which explicitly preserves the list head of the destination mode. Even if we know the destination mode is not on any list using drm_mode_copy() seems decent as it sets a good example. Bad examples of not using it might eventually get copied into code where preserving the list head actually matters. Obviously one case not covered here is when the mode itself is embedded in a larger structure and the whole structure is copied. But if we are careful when copying into modes embedded in structures I think we can be a little more reassured that bogus list heads haven't been propagated in. @is_mode_copy@ @@ drm_mode_copy(...) { ... } @depends on !is_mode_copy@ struct drm_display_mode *mode; expression E, S; @@ ( - *mode = E + drm_mode_copy(mode, &E) | - memcpy(mode, E, S) + drm_mode_copy(mode, E) ) @depends on !is_mode_copy@ struct drm_display_mode mode; expression E; @@ ( - mode = E + drm_mode_copy(&mode, &E) | - memcpy(&mode, E, S) + drm_mode_copy(&mode, E) ) @@ struct drm_display_mode *mode; @@ - &*mode + mode Cc: Alex Deucher <[email protected]> Cc: [email protected] Signed-off-by: Ville Syrjälä <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amdgpu: Use ternary operator in `vcn_v1_0_start()`Paul Menzel1-7/+2
Remove the boilerplate of declaring a variable and using an if else statement by using the ternary operator. Reviewed-by: James Zhu <[email protected]> Signed-off-by: Paul Menzel <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amdgpu: Remove pointless on stack mode copiesVille Syrjälä1-17/+17
These on stack copies of the modes appear to be pointless. Just look at the originals directly. Cc: Harry Wentland <[email protected]> Cc: Leo Li <[email protected]> Cc: Rodrigo Siqueira <[email protected]> Cc: Alex Deucher <[email protected]> Cc: [email protected] Cc: Nikola Cornij <[email protected]> Cc: Aurabindo Pillai <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amd/pm: fix indenting in __smu_cmn_reg_print_error()Dan Carpenter1-8/+8
Smatch complains that the dev_err_ratelimited() is indented one tab more than the surrounding lines. drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu_cmn.c:174 __smu_cmn_reg_print_error() warn: inconsistent indenting It looks like it's not a bug, just that the indenting needs to be cleaned up. Reviewed-by: Luben Tuikov <[email protected]> Signed-off-by: Dan Carpenter <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amdgpu/dc: fix typos in commentsJulia Lawall1-3/+3
Various spelling mistakes in comments. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amdgpu: fix typos in commentsJulia Lawall1-2/+2
Various spelling mistakes in comments. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amd/pm: fix typos in commentsJulia Lawall1-1/+1
Various spelling mistakes in comments. Detected with the help of Coccinelle. Signed-off-by: Julia Lawall <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amdgpu: Add stolen reserved memory for MI25 SRIOV.Yongqiang Sun1-0/+9
MI25 SRIOV guest driver loading failed due to allocated memory overlaps with firmware reserved area. Allocate stolen reserved memory for MI25 SRIOV specifically to avoid the memory overlap. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Yongqiang Sun <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amdgpu: Merge get_reserved_allocation to get_vbios_allocations.Yongqiang Sun3-21/+13
Some ASICs need reserved memory for firmware or other components, which is not allowed to be used by driver. amdgpu_gmc_get_reserved_allocation is to handle additional areas. To avoid any missing calling, merged amdgpu_gmc_get_reserved_allocation to amdgpu_gmc_get_vbios_allocations. Acked-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Yongqiang Sun <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amdkfd: evict svm bo worker handle errorPhilip Yang2-14/+36
Migrate vram to ram may fail to find the vma if process is exiting and vma is removed, evict svm bo worker sets prange->svm_bo to NULL and warn svm_bo ref count != 1 only if migrating vram to ram successfully. Signed-off-by: Philip Yang <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amdgpu/vcn: fix vcn ring test failure in igt reload testTianci Yin1-0/+2
[why] On Renoir, vcn ring test failed on the second time insmod in the reload test. After investigation, it proves that vcn only can disable dpg under dpg unpause mode (dpg unpause mode is default for dec only, dpg pause mode is for dec/enc). [how] unpause dpg in dpg stopping procedure. Reviewed-by: James Zhu <[email protected]> Signed-off-by: Tianci Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amdgpu: only allow secure submission on rings which support thatLang Yu13-2/+19
Only GFX ring, SDMA ring and VCN decode ring support secure submission at the moment. Suggested-by: Christian König <[email protected]> Signed-off-by: Lang Yu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amdgpu: fixed the warnings reported by kernel test robotyipechai3-62/+2
The reported warnings are as follows: 1.warning:no-previous-prototype-for-amdgpu_hdp_ras_fini. 2.warning:no-previous-prototype-for-amdgpu_mmhub_ras_fini. Amdgpu_hdp_ras_fini and amdgpu_mmhub_ras_fini are unused in the code, they are the only functions in amdgpu_hdp.c and amdgpu_mmhub.c. After removing these two functions, both amdgpu_hdp.c and amdgpu_mmhub.c are empty, so these two files can be deleted to fix the warning. Signed-off-by: yipechai <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amd/display: 3.2.177Aric Cyr1-1/+1
This version brings along following fixes: - Added I2C escape to support query exist - Functionality to get pipe from stream context - debugfs entry fixes - Block zstate when more than one plane enabled - Update to engine ddc - Reading lante status during LT fixes - Null point filters - [FW Promotion] Release 0.0.108.0 Acked-by: Agustin Gutierrez <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amd/display: [FW Promotion] Release 0.0.108.0Anthony Koo1-2/+2
Reviewed-by: Aric Cyr <[email protected]> Acked-by: Agustin Gutierrez <[email protected]> Signed-off-by: Anthony Koo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amd/display: Add save/restore PANEL_PWRSEQ_REF_DIV2Charlene Liu3-3/+91
[why] DCN31 has this in zstate save/restore sequence. need for non_zstate supported ASIC [how] add this PANEL_PWRSEQ_REF_DIV2 to existing panel_cntl_hw_init structure. Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Agustin Gutierrez <[email protected]> Signed-off-by: Charlene Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amd/display: Wait for hubp read line for PollockBecle Lee6-0/+46
[Why] Underflow occurred while hubp ret pipe read is idle and the second pipe is powered up and added. Flickering and underflow are only observed on Pollock. [How] Check the hubp ret pipe read prior to unlock pipes. Reviewed-by: Hersen Wu <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Agustin Gutierrez <[email protected]> Signed-off-by: Becle Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amd/display: Add null pointer filterJing Zhou1-2/+4
[Why & How] Add null pointer filter for logical integrity. Reviewed-by: Charlene Liu <[email protected]> Acked-by: Agustin Gutierrez <[email protected]> Signed-off-by: Jing Zhou <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amd/display: Retry when fail reading lane status during LTWayne Lin1-11/+19
[Why] In dp_get_lane_status_and_lane_adjust(), we call core_link_read_dpcd() to get lane status but we ignore the return value of the function. If there is problem with AUX and we eventually can only get partial data from monitor, we might misuse the data to jude the link training result. Which could have us trapped in the dc_link_dp_perform_link_training() since we thought that we can still give a try on another link setting. [How] In dp_get_lane_status_and_lane_adjust(), take return value of core_link_read_dpcd() into account. If we fail to read all requested data, we treat lanes status as previous one and repeat LT steps again. Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Agustin Gutierrez <[email protected]> Signed-off-by: Wayne Lin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amd/display: Add new enum for EDID statusDale Zhao2-0/+4
[Why] We must support a new type of partial edid return in the future [How] Add interface and case hander for partial edid Reviewed-by: Charlene Liu <[email protected]> Acked-by: Agustin Gutierrez <[email protected]> Signed-off-by: Dale Zhao <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amd/display: Block zstate when more than one plane enabledEric Yang1-6/+10
[Why] Currently Z10 save/restore only covers 1 plane case. If we enter Z10 with 2 planes enabled, 1 of the 2 planes will not be restored. causing black screen. [How] Disable Zstate when more than 1 plane is enabled. Right now Z9 enable but Z10 disable is not a supported config, so we disable both. Reviewed-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Nevenko Stupar <[email protected]> Acked-by: Agustin Gutierrez <[email protected]> Signed-off-by: Eric Yang <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amd/display: Update engine ddcJing Zhou1-0/+1
[Why] Crash caused by a ddc update failure [How] Update engine ddc before release engine. Reviewed-by: Wyatt Wood <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Agustin Gutierrez <[email protected]> Signed-off-by: Jing Zhou <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amd/display: Fix a few parts in debugfs entryWayne Lin1-1/+9
[Why & How] 1. To leverage and simplify the igt tool. Change the value of retrain when calling preferred training settings. Now, writing value to link settings triggers link training immediately. 2. Add dc lock when triggering link training in edp_ilr_write() Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Agustin Gutierrez <[email protected]> Signed-off-by: Wayne Lin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amd/display: Add function to get the pipe from the stream contextLeo (Hanghong) Ma2-0/+16
[Why] We need a helper function in dc to grab the pipe from the stream context. [How] Add it. Reviewed-by: Martin Leung <[email protected]> Acked-by: Agustin Gutierrez <[email protected]> Signed-off-by: Leo (Hanghong) Ma <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amd/display: Add I2C escape to support query device exist.JinZe.Xu4-0/+50
[How] 1. Search OEM I2C info from BIOS and compare with input parameter. 2. If BIOS doesn't record it, just try to read one byte. Reviewed-by: Aric Cyr <[email protected]> Acked-by: Agustin Gutierrez <[email protected]> Signed-off-by: JinZe.Xu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amdgpu: Move reset domain init before calling RREG32Philip Yang1-9/+9
amdgpu_detect_virtualization reads register, amdgpu_device_rreg access adev->reset_domain->sem if kernel defined CONFIG_LOCKDEP, below is the random boot hang backtrace on Vega10. It may get random NULL pointer access backtrace if amdgpu_sriov_runtime is true too. Move amdgpu_reset_create_reset_domain before calling to RREG32. BUG: kernel NULL pointer dereference, address: #PF: supervisor read access in kernel mode #PF: error_code(0x0000) - not-present page PGD 0 P4D 0 Oops: 0000 [#1] PREEMPT SMP NOPTI Workqueue: events work_for_cpu_fn RIP: 0010:down_read_trylock+0x13/0xf0 Call Trace: <TASK> amdgpu_device_skip_hw_access+0x38/0x80 [amdgpu] amdgpu_device_rreg+0x1b/0x170 [amdgpu] amdgpu_detect_virtualization+0x73/0x100 [amdgpu] amdgpu_device_init.cold.60+0xbe/0x16b1 [amdgpu] ? pci_bus_read_config_word+0x43/0x70 amdgpu_driver_load_kms+0x15/0x120 [amdgpu] amdgpu_pci_probe+0x1a1/0x3a0 [amdgpu] Fixes: d0fb18b535679a ("drm/amdgpu: Move reset sem into reset_domain") Signed-off-by: Philip Yang <[email protected]> Reviewed-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amd: fix gfx hang on renoir in IGT reload testTianci.Yin1-0/+4
[why] CP hangs in igt reloading test on renoir, more precisely, hangs on the second time insmod. [how] mode2 reset can make it recover, and mode2 reset only effects gfx core, dcn and the screen will not be impacted. Acked-by: Alex Deucher <[email protected]> Signed-off-by: Tianci.Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amdgpu: only check for _PR3 on dGPUsAlex Deucher1-2/+4
We don't support runtime pm on APUs. They support more dynamic power savings using clock and powergating. Reviewed-by: Mario Limonciello <[email protected]> Tested-by: Mario Limonciello <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amd/pm: use pm mutex to protect ecc info tableStanley.Yang1-1/+6
Signed-off-by: Stanley.Yang <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amdgpu: drop xmgi23 error query/reset supportHawking Zhang1-22/+0
xgmi_ras is only initialized when host to GPU interface is PCIE. in such case, xgmi23 is disabled and protected by security firmware. Host access will results to security violation Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amdgpu: fix aldebaran xgmi topology for vfJonathan Kim1-2/+4
VFs must also distinguish whether or not the TA supports full duplex or half duplex link records in order to report the correct xGMI topology. Signed-off-by: Jonathan Kim <[email protected]> Reviewed-by: Shaoyun Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amdgpu/display: enable scatter/gather display for DCN 3.1.6Alex Deucher1-0/+1
Enable scatter/gather display for DCN 3.1.6. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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