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Add pinctrl groups for both GPT input capture channels.
Signed-off-by: Steve Longerbeam <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The reset pin to the port expander chip (MAX7310) is controlled by a gpio,
so define a reset-gpios property to control it. There are three MAX7310's
on the SabreAuto CPU card (max7310_[abc]), but all use the same pin for
their reset. Since all can't acquire the same pin, assign it to max7310_b,
that chip is needed by more functions (usb and adv7180).
Signed-off-by: Steve Longerbeam <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The sabreauto uses a steering pin to select between the SDA signal on
i2c3 bus, and a data-in pin for an SPI NOR chip. Use i2cmux to control
this steering pin. Idle state of the i2cmux selects SPI NOR. This is not
a classic way to use i2cmux, since one side of the mux selects something
other than an i2c bus, but it works and is probably the cleanest
solution. Note that if one thread is attempting to access SPI NOR while
another thread is accessing i2c3, the SPI NOR access will fail since the
i2cmux has selected the SDA pin rather than SPI NOR data-in. This couldn't
be avoided in any case, the board is not designed to allow concurrent
i2c3 and SPI NOR functions (and the default device-tree does not enable
SPI NOR anyway).
Devices hanging off i2c3 should now be defined under i2cmux, so
that the steering pin can be properly controlled to access those
devices. The port expanders (MAX7310) are thus moved into i2cmux.
Signed-off-by: Steve Longerbeam <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Enables the OV5642 parallel-bus sensor, and the OV5640 MIPI CSI-2 sensor.
The OV5642 connects to the parallel-bus mux input port on ipu1_csi0_mux.
The OV5640 connects to the input port on the MIPI CSI-2 receiver on
mipi_csi.
Until the OV5652 sensor module compatible with the SabreSD becomes
available for testing, the ov5642 node is currently disabled.
Signed-off-by: Steve Longerbeam <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Adds the OV5642 parallel-bus sensor, and the OV5640 MIPI CSI-2 sensor.
Both hang off the same i2c2 bus, so they require different (and non-
default) i2c slave addresses.
The OV5642 connects to the parallel-bus mux input port on ipu1_csi0_mux.
The OV5640 connects to the input port on the MIPI CSI-2 receiver on
mipi_csi.
The OV5642 node is disabled temporarily while the subdev driver is
cleaned up and submitted later.
Signed-off-by: Steve Longerbeam <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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There is a pin conflict with GPIO_6. This pin functions as a power
input pin to the OV5642 camera sensor, but ENET uses it as the h/w
workaround for erratum ERR006687, to wake-up the ARM cores on normal
RX and TX packet done events. So we need to remove the h/w workaround
to support the OV5642. The result is that the CPUidle driver will no
longer allow entering the deep idle states on the sabrelite.
This is a partial revert of
commit 6261c4c8f13e ("ARM: dts: imx6qdl-sabrelite: use GPIO_6 for FEC
interrupt.")
commit a28eeb43ee57 ("ARM: dts: imx6: tag boards that have the HW workaround
for ERR006687")
Signed-off-by: Steve Longerbeam <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Signed-off-by: Steve Longerbeam <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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This patch adds the device tree graph connecting the input multiplexers
to the IPU CSIs and the MIPI-CSI2 gasket on i.MX6. The MIPI_IPU
multiplexers are added as children of the iomuxc-gpr syscon device node.
On i.MX6Q/D two two-input multiplexers in front of IPU1 CSI0 and IPU2
CSI1 allow to select between CSI0/1 parallel input pads and the MIPI
CSI-2 virtual channels 0/3.
On i.MX6DL/S two five-input multiplexers in front of IPU1 CSI0 and IPU1
CSI1 allow to select between CSI0/1 parallel input pads and any of the
four MIPI CSI-2 virtual channels.
Changes from Steve Longerbeam:
- Removed some dangling/unused endpoints (ipu2_csi0_from_csi2ipu)
- Renamed the mipi virtual channel endpoint labels, from "mipi_csiX_..."
to "mipi_vcX...".
- Added input endpoint anchors to the video muxes for the connections
from parallel sensors.
Signed-off-by: Philipp Zabel <[email protected]>
Signed-off-by: Steve Longerbeam <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add to the MIPI CSI2 receiver node: compatible strings,
interrupt sources, and clocks.
Signed-off-by: Steve Longerbeam <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The IOMUXC General Purpose Register space contains various bitfields
that control video bus multiplexers. Describe them using a mmio-mux
node. The placement of the IPU CSI video mux controls differs between
i.MX6D/Q and i.MX6S/DL.
Signed-off-by: Philipp Zabel <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The imx6 PCI driver ignores the GPIO polarity from 'reset-gpio' and
considers that the PCI reset is active low, unless the
property 'reset-gpio-active-high' is present.
Fix the device tree description by explicitly passing the
'GPIO_ACTIVE_LOW' flag to the 'reset-gpio' property.
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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imx7d-sdb has a BCM4339 BT chip connected to UART6.
Add support for it.
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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imx7d-sdb has a BCM4339 Wifi chip connected to USDHC2.
Add support for it.
While at it, move the WL_REG_ON pin to the correct pinctrl node.
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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It is not recommended to place the regulator nodes inside 'simple-bus',
so adjust them accordingly.
The motivation for rearranging this is to make it easier to add new
regulator nodes in the future.
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The FEC driver ignores the GPIO polarity from 'phy-reset-gpios' and
considers that the Ethernet PHY is active low, unless the
property 'phy-reset-active-high' is present.
Fix the device tree description by explicitly passing the
'GPIO_ACTIVE_LOW' flag to the 'phy-reset-gpios' property.
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Andrew Lunn <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Change "WDOD1" to "WDOG1" in watchdog pin names.
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Two of the Ethernet switches on this board have EEPROMs connected.
Add the eeprom-length property to the device tree, making it possible
to access the EEPROM using ethtool -e.
Signed-off-by: Andrew Lunn <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Property 'enable-active-low' does not exist. Only 'enable-active-high' is
valid, and when this property is absent the gpio regulator will act as
active low by default.
So remove the unexisting 'enable-active-low' property.
Currently the GPIO flag is GPIO_ACTIVE_HIGH. In order to make
the dts description accurate, pass the GPIO_ACTIVE_LOW flag instead.
This change is safe because the gpio regulator driver does not take the
GPIO flag polarity into account.
Signed-off-by: Fabio Estevam <[email protected]>
Acked-by: Lothar Waßmann <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Property 'enable-active-low' does not exist. Only 'enable-active-high' is
valid, and when this property is absent the gpio regulator will act as
active low by default.
So remove the unexisting 'enable-active-low' property.
Currently the GPIO flag is 0, which means active-high. In order to make
the dts description accurate, pass the GPIO_ACTIVE_LOW flag instead.
This change is safe because the gpio regulator driver does not take the
GPIO flag polarity into account.
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Currently the following eMMC error is seen:
mmc1: mmc_select_hs200 failed, error -74
On imx7d-pico the eMMC VCCQ is fixed at 3.15V, so pass the 'no-1-8-v'
property to properly describe that 1.8V operation is not possible.
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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imx7d-pico has the WDOG1_B pin connected to the PMIC, so add the
wdog1 node and use the 'fsl,ext-reset-output' property to
properly describe it.
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The at24 driver allows to register I2C EEPROM chips using different vendor
and devices, but the I2C subsystem does not take the vendor into account
when matching using the I2C table since it only has device entries.
But when matching using an OF table, both the vendor and device has to be
taken into account so the driver defines only a set of compatible strings
using the "atmel" vendor as a generic fallback for compatible I2C devices.
So add this generic fallback to the device node compatible string to make
the device to match the driver using the OF device ID table.
Signed-off-by: Javier Martinez Canillas <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Most of DT files in ARM use #include "..." to make pre-processor
include DT in the same directory, but we have some exceptional files
that use #include <...> for that.
Fix them to remove -I$(srctree)/arch/$(SRCARCH)/boot/dts path from
dtc_cpp_flags.
Signed-off-by: Masahiro Yamada <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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"bcrmf" is a typo and "wifi" is the preferred form to describe
such node, so change it accordingly.
Reported-by: Andreas Färber <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Andreas Färber <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Currently the following eMMC error is seen:
mmc1: mmc_select_hs200 failed, error -74
mmc1: new MMC card at address 0001
mmcblk1: mmc1:0001 V10008 7.05 GiB
mmcblk1boot0: mmc1:0001 V10008 partition 1 4.00 MiB
mmcblk1boot1: mmc1:0001 V10008 partition 2 4.00 MiB
mmcblk1rpmb: mmc1:0001 V10008 partition 3 4.00 MiB
On imx7s-warp the eMMC VCCQ is fixed at 3.15V, so pass the 'no-1-8-v'
property to properly describe that 1.8V operation is not possible.
With this change HS200 error is gone and another benefit is that the
card can operate in DDR52 mode now:
mmc1: new DDR MMC card at address 0001
mmcblk1: mmc1:0001 V10008 7.05 GiB
mmcblk1boot0: mmc1:0001 V10008 partition 1 4.00 MiB
mmcblk1boot1: mmc1:0001 V10008 partition 2 4.00 MiB
mmcblk1rpmb: mmc1:0001 V10008 partition 3 4.00 MiB
Suggested-by: Stefan Agner <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add the initial support for imx7d-pico board.
Add support for eMMC, USB host, USB device, PMIC, Ethernet and audio.
For more information about this board, please visit:
http://www.technexion.org/products/pico/pico-som/pico-imx7-emmc
Signed-off-by: Vanessa Maegima <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The PWM driver has now capability to specify the PWM polarity
which is e.g. for backlight control. Allow to make use of PWM
polarity by specifying pwm-cells to be 3 in the base dt.
Signed-off-by: Stefan Agner <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Enable PCIe peripheral on this board.
Cc: [email protected]
Cc: Dong Aisheng <[email protected]>
Cc: Sascha Hauer <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Russell King <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Andrey Smirnov <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Cc: [email protected]
Cc: Dong Aisheng <[email protected]>
Cc: Sascha Hauer <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Russell King <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Andrey Smirnov <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add node for U38, a 74LV595PW serial-in shift register that acts as a
GPIO expander on the board.
Cc: [email protected]
Cc: Dong Aisheng <[email protected]>
Cc: Sascha Hauer <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Russell King <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Andrey Smirnov <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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List GPR block as compatible "fsl,imx6q-iomuxc-gpr" to support drivers
requesting it that way (PCIe driver is one example).
Cc: [email protected]
Cc: Dong Aisheng <[email protected]>
Cc: Sascha Hauer <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Russell King <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Andrey Smirnov <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add node for GPC and specify as a parent interrupt controller for SoC bus.
Cc: [email protected]
Cc: Dong Aisheng <[email protected]>
Cc: Sascha Hauer <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Russell King <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Andrey Smirnov <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Now that support for 'anatop-enable-bit' has been added to ANADIG
driver, reintroduce 'anatop-enable-bit' for all applicable LDOs.
Cc: [email protected]
Cc: Dong Aisheng <[email protected]>
Cc: Sascha Hauer <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Mark Rutland <[email protected]>
Cc: Russell King <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Andrey Smirnov <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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On imx6sx-sdb rev B/C the VDD_ARM_IN and VDD_SOC_IN supplies are connected
together and both are supplied by the SW1A PMIC output, so model this
correctly in the device tree.
Suggested-by: Marek Vasut <[email protected]>
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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When running a stress playback/stop loop test on a mx6colibri channel
swaps can be noticed randomly.
Increasing the SGTL5000 LRCLK pad strength to its maximum value fixes
the issue, so add the 'lrclk-strength' property to avoid the audio
channel swaps.
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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When running a stress playback/stop loop test on a mx6wandboard channel
swaps can be noticed randomly.
Increasing the SGTL5000 LRCLK pad strength to its maximum value fixes
the issue, so add the 'lrclk-strength' property to avoid the audio
channel swaps.
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The USDHC instances need the USDHC NAND and IPG clock in order to
operate. Reference them properly by replacing the dummy clocks with
the actual clocks.
Note that both clocks are currently implicitly enabled since they
are part of the i.MX 7 clock drivers init_on list. This might
change in the future.
Signed-off-by: Stefan Agner <[email protected]>
Acked-by: Dong Aisheng <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The rv4162 compatbile string is missing the vendor part, add it.
Signed-off-by: Alexandre Belloni <[email protected]>
Acked-by: Gary Bisson <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The rv4162 vendor is microcrystal, not ST.
Signed-off-by: Alexandre Belloni <[email protected]>
Acked-by: Gary Bisson <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The rv4162 vendor is microcrystal, not ST.
Signed-off-by: Alexandre Belloni <[email protected]>
Acked-by: Gary Bisson <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The Gateworks Ventana GW5600 is a media-centric single-board computer based on
the NXP IMX6 SoC with the following features:
* PoE (emulated 802.3af)
* IMX6 DualLite Soc (supports IMX6S,IMX6DL,IMX6Q)
* 1GiB DDR3 DRAM (supports up to 4GiB)
* 8GB eMMC
* 1x microSD connector
* Gateworks System Controller:
- hardware watchdog
- hardware monitor
- pushbutton controller
- EEPROM storage
- power control
* 1x bi-color USER LED
* 1x front-panel pushbutton
* 1x front-panel GbE
* 2x front panel USB 2.0
* 1x front panel USB OTG
* 1x SIM socket
* 1x miniPCIe socket with SATA (mSATA)
* 1x miniPCIe socket with USB 2.0 (Modem)
* 1x miniPCIe socket with PCIe, USB 2.0, and SIM
* RS232/RS485 serial
- 2x RS232 UARTs (off-board connector)
- 1x RS485 (loading option)
* 4x digital I/O signals (PWM/I2C/GPIO/5V/3.3V options)
* 1x analog input (0 to 5V)
* 1x CAN (loading option)
* off-board LVDS:
- I2C
- 12V
- LED driver (4x 330mA strings)
- matrix keypad controller (8row x 10col)
- I2S
- dual-channel LVDS
- PWM
* off-board video input:
- 16bit parallel / MIPI (IPU1_CSI0)
* GPS (loading option)
* Analog Video Input (CVBS) 3 inputs (1 active at a time)
* Analog Audio Input/Output (2ch Line level, optional MIC/HP drivers)
* HDMI out
* JTAG programmable
* Inertial Module
Signed-off-by: Tim Harvey <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add the more specific QuadPlus compatible to the GPC node, to trigger the
required workarounds in the power domain code.
In regard to the interrupt mapping the QuadPlus controller is fully
compatible to the Quad one, so keep that compatible in place.
Signed-off-by: Lucas Stach <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Adopt the i.MX6Q/DL DT to the new and more flexible GPC binding.
Signed-off-by: Lucas Stach <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Remove the sky2 ethernet device node from the pcie controller which was
invalid to begin with.
The original intent was to allow the bootloader to populate the MAC via
dt but this requires the PCI bus topology to be complete in dt as well
and as these boards have an expansion connector that topology is dynamic
and can't be represented here.
Signed-off-by: Tim Harvey <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
Pull some more input subsystem updates from Dmitry Torokhov:
"An updated xpad driver with a few more recognized device IDs, and a
new psxpad-spi driver, allowing connecting Playstation 1 and 2 joypads
via SPI bus"
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input:
Input: cros_ec_keyb - remove extraneous 'const'
Input: add support for PlayStation 1/2 joypads connected via SPI
Input: xpad - add USB IDs for Mad Catz Brawlstick and Razer Sabertooth
Input: xpad - sync supported devices with xboxdrv
Input: xpad - sort supported devices by USB ID
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Pull UBI/UBIFS updates from Richard Weinberger:
- new config option CONFIG_UBIFS_FS_SECURITY
- minor improvements
- random fixes
* tag 'upstream-4.12-rc1' of git://git.infradead.org/linux-ubifs:
ubi: Add debugfs file for tracking PEB state
ubifs: Fix a typo in comment of ioctl2ubifs & ubifs2ioctl
ubifs: Remove unnecessary assignment
ubifs: Fix cut and paste error on sb type comparisons
ubi: fastmap: Fix slab corruption
ubifs: Add CONFIG_UBIFS_FS_SECURITY to disable/enable security labels
ubi: Make mtd parameter readable
ubi: Fix section mismatch
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git://git.kernel.org/pub/scm/linux/kernel/git/rw/uml
Pull UML fixes from Richard Weinberger:
"No new stuff, just fixes"
* 'for-linus-4.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/uml:
um: Add missing NR_CPUS include
um: Fix to call read_initrd after init_bootmem
um: Include kbuild.h instead of duplicating its macros
um: Fix PTRACE_POKEUSER on x86_64
um: Set number of CPUs
um: Fix _print_addr()
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Merge misc fixes from Andrew Morton:
"15 fixes"
* emailed patches from Andrew Morton <[email protected]>:
mm, docs: update memory.stat description with workingset* entries
mm: vmscan: scan until it finds eligible pages
mm, thp: copying user pages must schedule on collapse
dax: fix PMD data corruption when fault races with write
dax: fix data corruption when fault races with write
ext4: return to starting transaction in ext4_dax_huge_fault()
mm: fix data corruption due to stale mmap reads
dax: prevent invalidation of mapped DAX entries
Tigran has moved
mm, vmalloc: fix vmalloc users tracking properly
mm/khugepaged: add missed tracepoint for collapse_huge_page_swapin
gcov: support GCC 7.1
mm, vmstat: Remove spurious WARN() during zoneinfo print
time: delete current_fs_time()
hwpoison, memcg: forcibly uncharge LRU pages
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Commit 4b4cea91691d ("mm: vmscan: fix IO/refault regression in cache
workingset transition") introduced three new entries in memory stat
file:
- workingset_refault
- workingset_activate
- workingset_nodereclaim
This commit adds a corresponding description to the cgroup v2 docs.
Link: http://lkml.kernel.org/r/[email protected]
Signed-off-by: Roman Gushchin <[email protected]>
Cc: Johannes Weiner <[email protected]>
Cc: Michal Hocko <[email protected]>
Cc: Vladimir Davydov <[email protected]>
Cc: Tejun Heo <[email protected]>
Cc: Li Zefan <[email protected]>
Signed-off-by: Andrew Morton <[email protected]>
Signed-off-by: Linus Torvalds <[email protected]>
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