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2021-10-04drm/amdgpu: add initial IP discovery support for vega based partsAlex Deucher1-30/+387
Hardcode the IP versions for asics without IP discovery tables and then enumerate the asics based on the IP versions. TODO: fix SR-IOV support v2: Squash in HDP fix for Renoir Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/soc15: export common IP functionsAlex Deucher2-1/+3
So they can be driven by IP discovery table. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: add DCI HWIPAlex Deucher2-0/+2
So we can track grab the appropriate DCE info out of the IP discovery table. This is a separare IP from DCN. Acked-by: Harry Wentland <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/display/dm: convert to IP version checkingAlex Deucher1-94/+114
Use IP versions rather than asic_type to differentiate IP version specific features. v2: drop unrelated change Acked-by: Christian König <[email protected]> (v1) Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: drive all navi asics from the IP discovery tableAlex Deucher1-20/+0
Rather than hardcoding based on asic_type, use the IP discovery table to configure the driver. v2: rebase Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/nv: convert to IP version checkingAlex Deucher1-37/+38
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/sienna_cichlid_ppt: convert to IP version checkingAlex Deucher1-12/+12
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/navi10_ppt: convert to IP version checkingAlex Deucher1-25/+25
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/smu11.0: convert to IP version checkingAlex Deucher1-42/+46
Use IP versions rather than asic_type to differentiate IP version specific features. v2: rebase Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/amdgpu_smu: convert to IP version checkingAlex Deucher1-46/+80
Use IP versions rather than asic_type to differentiate IP version specific features. v2: rebase v3: switch some if statements to switch statements v4: add yellow carp fix (Yifan) v5: squash in fixes for YC and GS (Alex) Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/navi10_ih: convert to IP version checkingAlex Deucher1-8/+5
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/athub2.1: convert to IP version checkingAlex Deucher1-5/+4
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/athub2.0: convert to IP version checkingAlex Deucher1-4/+3
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/vcn3.0: convert to IP version checkingAlex Deucher1-4/+4
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/mmhub2.1: convert to IP version checkingAlex Deucher1-3/+3
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/mmhub2.0: convert to IP version checkingAlex Deucher1-41/+32
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/gfxhub2.1: convert to IP version checkingAlex Deucher1-3/+3
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: drive nav10 from the IP discovery tableAlex Deucher1-1/+0
Rather than hardcoding based on asic_type, use the IP discovery table to configure the driver. Only tested on Navi10 so far. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: Use IP discovery to drive setting IP blocks by defaultAlex Deucher1-2/+4
Drive the asic setup from the IP discovery table rather than hardcoded settings based on asic type. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/gmc10.0: convert to IP version checkingAlex Deucher1-61/+30
Use IP versions rather than asic_type to differentiate IP version specific features. v2: squash in gmc fixes v3: rebase Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: bind to any 0x1002 PCI diplay class deviceAlex Deucher1-0/+15
Bind to all 0x1002 GPU devices. For now we explicitly return -ENODEV for generic bindings. Remove this check once IP discovery based checking is in place. v2: rebase (Alex) Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: filter out radeon PCI device IDsAlex Deucher1-1/+637
Once we claim all 0x1002 PCI display class devices, we will need to filter out devices owned by radeon. v2: rename radeon id array to make it more clear that the devices are not supported by amdgpu. add r128, mach64 pci ids as well Acked-by: Christian König <[email protected]> (v1) Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/gfx10: convert to IP version checkingAlex Deucher1-190/+190
Use IP versions rather than asic_type to differentiate IP version specific features. v2: rebase, squash in navi10 fixes (Alex) Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/sdma5.2: convert to IP version checkingAlex Deucher1-24/+24
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/sdma5.0: convert to IP version checkingAlex Deucher1-15/+15
Use IP versions rather than asic_type to differentiate IP version specific features. v2: rebase Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: add initial IP enumeration via IP discovery tableAlex Deucher2-0/+334
Add initial support for all navi based parts. v2: rebase Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu/nv: export common IP functionsAlex Deucher2-1/+3
So they can be driven by IP dicovery table. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: add XGMI HWIPAlex Deucher2-0/+2
So we can track grab the appropriate XGMI info out of the IP discovery table. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: fill in IP versions from IP discovery tableAlex Deucher1-1/+2
Prerequisite for using IP versions in the driver rather than asic type. v2: Use IP_VERSION() macro instead of new function Reviewed-by: Christian König <[email protected]> (v1) Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: store HW IP versions in the driver structureAlex Deucher2-1/+4
So we can check the IP versions directly rather than using asic type. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: add debugfs access to the IP discovery tableAlex Deucher2-0/+6
Useful for debugging and new asic validation. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: move headless sku check into harvest functionAlex Deucher2-14/+7
Consolidate harvesting information. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: resolve RAS query bugJohn Clements1-0/+3
clear error count when persistant harvesting is not enabled Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amd/display: Only define DP 2.0 symbols if not already definedHarry Wentland2-5/+50
[Why] For some reason we're defining DP 2.0 definitions inside our driver. Now that patches to introduce relevant definitions are slated to be merged into drm-next this is causing conflicts. In file included from drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c:33: In file included from ./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu.h:70: In file included from ./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgpu_mode.h:36: ./include/drm/drm_dp_helper.h:1322:9: error: 'DP_MAIN_LINK_CHANNEL_CODING_PHY_REPEATER' macro redefined [-Werror,-Wmacro-redefined] ^ ./drivers/gpu/drm/amd/amdgpu/../display/dc/dc_dp_types.h:881:9: note: previous definition is here ^ 1 error generated. [How] Guard all display driver defines with #ifndef for now. Once we pull in the new definitions into amd-staging-drm-next we will follow up and drop definitions from our driver and provide follow-up header updates for any addition DP 2.0 definitions required by our driver. We also ensure drm_dp_helper.h is included before dc_dp_types.h. v3: Ensure drm_dp_helper.h is included before dc_dp_types.h v2: Add one missing endif Reviewed-by: Manasi Navare <[email protected]> Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Fangzhi Zuo <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04amd/amdkfd: add ras page retirement handling for sq/sdma (v3)Tao Zhou3-2/+17
In ras poison mode, page retirement will be handled by the irq handler of the module which consumes corrupted data. v2: rename ras_process_cb to ras_poison_consumption_handler. move the handler's implementation from ASIC specific file to common file. v3: call gpu reset for xGMI connected mode. Signed-off-by: Tao Zhou <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amdgpu: force exit gfxoff on sdma resume for rmb s0ixPrike Liang1-0/+8
In the s2idle stress test sdma resume fail occasionally,in the failed case GPU is in the gfxoff state.This issue may introduce by firmware miss handle doorbell S/R and now temporary fix the issue by forcing exit gfxoff for sdma resume. Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/amd/display: add cyan_skillfish display supportZhan Liu51-2/+4963
[Why] add display related cyan_skillfish files in. makefile controlled by CONFIG_DRM_AMD_DC_DCN201 flag. v2: squash in clang fixes from Harry, Nathan v3: squash in missing CONFIG_DRM_AMD_DC check (Alex) Signed-off-by: Charlene Liu <[email protected]> Signed-off-by: Zhan Liu <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Jun Lei <[email protected]> Acked-by: Harry Wentland <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-04drm/i195: Make the async flip VT-d workaround dynamicVille Syrjälä2-26/+35
Since the VT-d vs. async flip issues are plaguing a wider range of supported hw let's try to minimize the impact on normal operation by flipping the relevant chicken bits on and off as needed. I presume there is some power/perf impact on since this is reducing some prefetching I think. Cc: Karthik B S <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Matt Roper <[email protected]>
2021-10-04drm/i915: Extend the async flip VT-d w/a to skl/bxtVille Syrjälä2-0/+17
Looks like skl/bxt/derivatives also need the plane stride stretch w/a when using async flips and VT-d is enabled, or else we get corruption on screen. To my surprise this was even documented in bspec, but only as a note on the CHICHKEN_PIPESL register description rather than on the w/a list. So very much the same thing as on HSW/BDW, except the bits moved yet again. Cc: [email protected] Cc: Karthik B S <[email protected]> Fixes: 55ea1cb178ef ("drm/i915: Enable async flips in i915") Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Matt Roper <[email protected]>
2021-10-04drm/i915: Clean up disabled warningsNathan Chancellor1-6/+4
i915 enables a wider set of warnings with '-Wall -Wextra' then disables several with cc-disable-warning. If an unknown flag gets added to KBUILD_CFLAGS when building with clang, all subsequent calls to cc-{disable-warning,option} will fail, meaning that all of these warnings do not get disabled [1]. A separate series will address the root cause of the issue by not adding these flags when building with clang [2]; however, the symptom of these extra warnings appearing can be addressed separately by just removing the calls to cc-disable-warning, which makes the build ever so slightly faster because the compiler does not need to be called as much before building. The following warnings are supported by GCC 4.9 and clang 10.0.1, which are the minimum supported versions of these compilers so the call to cc-disable-warning is not necessary. Masahiro cleaned this up for the reset of the kernel in commit 4c8dd95a723d ("kbuild: add some extra warning flags unconditionally"). * -Wmissing-field-initializers * -Wsign-compare * -Wtype-limits * -Wunused-parameter -Wunused-but-set-variable was implemented in clang 13.0.0 and -Wframe-address was implemented in clang 12.0.0 so the cc-disable-warning calls are kept for these two warnings. Lastly, -Winitializer-overrides is clang's version of -Woverride-init, which is disabled for the specific files that are problematic. clang added a compatibility alias in clang 8.0.0 so -Winitializer-overrides can be removed. [1]: https://lore.kernel.org/r/[email protected]/ [2]: https://lore.kernel.org/r/[email protected]/ Reviewed-by: Nick Desaulniers <[email protected]> Signed-off-by: Nathan Chancellor <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-10-04drm/i915/pxp: enable PXP for integrated Gen12Daniele Ceraolo Spurio1-0/+2
Note that discrete cards can support PXP as well, but we haven't tested on those yet so keeping it disabled for now. Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-10-04drm/i915/pxp: add PXP documentationDaniele Ceraolo Spurio3-12/+71
Now that all the pieces are in place we can add a description of how the feature works. Also modify the comments in struct intel_pxp into kerneldoc. v2: improve doc (Rodrigo) Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Rodrigo Vivi <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-10-04drm/i915/pxp: add pxp debugfsDaniele Ceraolo Spurio4-0/+102
2 debugfs files, one to query the current status of the pxp session and one to trigger an invalidation for testing. v2: rename debugfs, fix date (Alan) v12: rebased to latest drm-tip (rename of files/structs from debugfs_gt to intel_debugfs_gt caused compiler errors). Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Reviewed-by : Alan Previn <[email protected]> Reviewed-by: Alan Previn <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-10-04drm/i915/pxp: black pixels on pxp disabledAnshuman Gupta4-3/+94
When protected sufaces has flipped and pxp session is disabled, display black pixels by using plane color CTM correction. v2: - Display black pixels in async flip too. v3: - Removed the black pixels logic for async flip. [Ville] - Used plane state to force black pixels. [Ville] v4 (Daniele): update pxp_is_borked check. v5: rebase on top of v9 plane decryption moving the decrypt check (Juston) Cc: Ville Syrjälä <[email protected]> Cc: Gaurav Kumar <[email protected]> Cc: Shankar Uma <[email protected]> Signed-off-by: Anshuman Gupta <[email protected]> Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Signed-off-by: Juston Li <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Reviewed-by: Uma Shankar <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-10-04drm/i915/pxp: Add plane decryption supportAnshuman Gupta7-9/+54
Add support to enable/disable PLANE_SURF Decryption Request bit. It requires only to enable plane decryption support when following condition met. 1. PXP session is enabled. 2. Buffer object is protected. v2: - Used gen fb obj user_flags instead gem_object_metadata. [Krishna] v3: - intel_pxp_gem_object_status() API changes. v4: use intel_pxp_is_active (Daniele) v5: rebase and use the new protected object status checker (Daniele) v6: used plane state for plane_decryption to handle async flip as suggested by Ville. v7: check pxp session while plane decrypt state computation. [Ville] removed pointless code. [Ville] v8 (Daniele): update PXP check v9: move decrypt check after icl_check_nv12_planes() when overlays have fb set (Juston) v10 (Daniele): update PXP check again to match rework in earlier patches and don't consider protection valid if the object has not been used in an execbuf beforehand. Cc: Bommu Krishnaiah <[email protected]> Cc: Huang Sean Z <[email protected]> Cc: Gaurav Kumar <[email protected]> Cc: Ville Syrjälä <[email protected]> Signed-off-by: Anshuman Gupta <[email protected]> Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Signed-off-by: Juston Li <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Reviewed-by: Uma Shankar <[email protected]> #v9 Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-10-04drm/i915/pxp: Enable PXP power managementHuang, Sean Z8-11/+126
During the power event S3+ sleep/resume, hardware will lose all the encryption keys for every hardware session, even though the session state might still be marked as alive after resume. Therefore, we should consider the session as dead on suspend and invalidate all the objects. The session will be automatically restarted on the first protected submission on resume. v2: runtime suspend also invalidates the keys v3: fix return codes, simplify rpm ops (Chris), use the new worker func v4: invalidate the objects on suspend, don't re-create the arb sesson on resume (delayed to first submission). v5: move irq changes back to irq patch (Rodrigo) v6: drop invalidation in runtime suspend (Rodrigo) Signed-off-by: Huang, Sean Z <[email protected]> Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Cc: Chris Wilson <[email protected]> Cc: Rodrigo Vivi <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-10-04drm/i915/pxp: start the arb session on demandDaniele Ceraolo Spurio7-29/+42
Now that we can handle destruction and re-creation of the arb session, we can postpone the start of the session to the first submission that requires it, to avoid keeping it running with no user. v10: increase timeout when waiting in intel_pxp_start as firmware session startup is slower right after boot. v13: increase the same timeout by 50 milisec because previous timeout was not enough to cover two lower level 100 milisec timeouts in the session termination + creation steps. Signed-off-by: Alan Previn <[email protected]> Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-10-04drm/i915/pxp: interfaces for using protected objectsDaniele Ceraolo Spurio14-35/+402
This api allow user mode to create protected buffers and to mark contexts as making use of such objects. Only when using contexts marked in such a way is the execution guaranteed to work as expected. Contexts can only be marked as using protected content at creation time (i.e. the parameter is immutable) and they must be both bannable and not recoverable. Given that the protected session gets invalidated on suspend, contexts created this way hold a runtime pm wakeref until they're either destroyed or invalidated. All protected objects and contexts will be considered invalid when the PXP session is destroyed and all new submissions using them will be rejected. All intel contexts within the invalidated gem contexts will be marked banned. Userspace can detect that an invalidation has occurred via the RESET_STATS ioctl, where we report it the same way as a ban due to a hang. v5: squash patches, rebase on proto_ctx, update kerneldoc v6: rebase on obj create_ext changes v7: Use session counter to check if an object it valid, hold wakeref in context, don't add a new flag to RESET_STATS (Daniel) v8: don't increase guilty count for contexts banned during pxp invalidation (Rodrigo) v9: better comments, avoid wakeref put race between pxp_inval and context_close, add usage examples (Rodrigo) v10: modify internal set/get-protected-context functions to not return -ENODEV when setting PXP param to false or getting param when running on pxp-unsupported hw or getting param when i915 was built with CONFIG_PXP off Signed-off-by: Alan Previn <[email protected]> Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Signed-off-by: Bommu Krishnaiah <[email protected]> Cc: Rodrigo Vivi <[email protected]> Cc: Chris Wilson <[email protected]> Cc: Lionel Landwerlin <[email protected]> Cc: Jason Ekstrand <[email protected]> Cc: Daniel Vetter <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-10-04drm/i915/pxp: Implement PXP irq handlerHuang, Sean Z11-16/+284
The HW will generate a teardown interrupt when session termination is required, which requires i915 to submit a terminating batch. Once the HW is done with the termination it will generate another interrupt, at which point it is safe to re-create the session. Since the termination and re-creation flow is something we want to trigger from the driver as well, use a common work function that can be called both from the irq handler and from the driver set-up flows, which has the addded benefit of allowing us to skip any extra locks because the work itself serializes the operations. v2: use struct completion instead of bool (Chris) v3: drop locks, clean up functions and improve comments (Chris), move to common work function. v4: improve comments, simplify wait logic (Rodrigo) v5: unconditionally set interrupts, rename state_attacked var (Rodrigo) v10: remove inclusion of intel_gt_types.h from intel_pxp.h (Jani) Signed-off-by: Alan Previn <[email protected]> Signed-off-by: Huang, Sean Z <[email protected]> Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Cc: Chris Wilson <[email protected]> Cc: Rodrigo Vivi <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-10-04drm/i915/pxp: Implement arb session teardownHuang, Sean Z7-4/+212
Teardown is triggered when the display topology changes and no long meets the secure playback requirement, and hardware trashes all the encryption keys for display. Additionally, we want to emit a teardown operation to make sure we're clean on boot and resume v2: emit in the ring, use high prio request (Chris) v3: better defines, stalling flush, cleaned up and renamed submission funcs (Chris) v12: fix uninitialized variable bug Signed-off-by: Huang, Sean Z <[email protected]> Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Cc: Chris Wilson <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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