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2020-05-08drm/amdgpu: drop extra runtime pm handling in resume pmopAlex Deucher1-8/+0
The core handles this for us. Acked-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-08drm/amdgpu: fix runpm logic in amdgpu_pmops_resumeAlex Deucher1-2/+2
We should be checking whether the driver enabled runtime pm rather than whether the asic supports BOCO or BACO. That said in general they are equivalent unless the user has disabled runpm or it has been disabled for a specific asic. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-08drm/amdgpu: drop pm_runtime_set_activeAlex Deucher1-1/+0
The pci core handles this for us in pci_pm_init. Acked-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-08drm/amdgpu: implement soft_recovery for gfx10Alex Deucher1-0/+14
Same as gfx9. This allows us to kill the waves for hung shaders. Acked-by: Evan Quan <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-08drm/amdgpu: cleanup sysfs file handlingNirmoy Das1-24/+12
Create sysfs file using attributes. Signed-off-by: Nirmoy Das <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-08drm/amdgpu: enable hibernate support on Navi1XEvan Quan3-1/+4
BACO is needed to support hibernate on Navi1X. Signed-off-by: Evan Quan <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-08drm/amdgpu: use node_id and node_size to calcualte dram_base_addressHawking Zhang3-82/+2
physical_node_id * node_segment_size should be the dram_base_address for current gpu node in xgmi config Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-08drm/amdgpu: switch to common rlc_autoload helperHawking Zhang3-10/+1
drop IP specific psp function for rlc autoload since the autoload_supported was introduced to mark ASICs that support rlc_autoload Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Reviewed-by: John Clements <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-08drm/amdgpu: drop unused ras ta helper functionHawking Zhang2-32/+0
cure posion command was replaced by ras recovery solution and was not a formal command supported by ras ta anymore Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Reviewed-by: John Clements <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-08drm/amdgpu: switch to common ras ta helperHawking Zhang3-33/+30
TRIGGER_ERROR is common ras ta command for all the ASICs that support RAS feature. switch to common helper to avoid duplicate implementation per IP generation Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Reviewed-by: John Clements <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-08drm/amdgpu: switch to common xgmi ta helpersHawking Zhang3-137/+123
get_hive_id/get_node_id/get_topology_info/set_topology_info are common xgmi command supported by TA for all the ASICs that support xgmi link. They should be implemented as common helper functions to avoid duplicated code per IP generation Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Reviewed-by: John Clements <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-07MAINTAINERS: Remove me from amdgpu maintainersChunming Zhou1-1/+0
Glad to spend time on kernel driver in past years. I've moved to new focus in umd and couldn't commit enough time to discussions. Reviewed-by: Christian König <[email protected]> Signed-off-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-07drm/amd/display: remove duplicate headersChen Zhou1-1/+0
Remove duplicate headers which are included twice. Signed-off-by: Chen Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-07drm/amd/display: remove variable "result" in dcn20_patch_unknown_plane_state()Jason Yan1-3/+1
Fix the following coccicheck warning: drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c:3216:16-22: Unneeded variable: "result". Return "DC_OK" on line 3229 Signed-off-by: Jason Yan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-07drm/amd/amdgpu: cleanup coding style a bitBernard Zhao1-30/+13
There is DEVICE_ATTR mechanism in separate attribute define. So this change is to use attr array, also use sysfs_create_files in init function & sysfs_remove_files in fini function. This maybe make the code a bit readable. Signed-off-by: Bernard Zhao <[email protected]> Changes since V1: *Use DEVICE_ATTR mechanism Link for V1: *https://lore.kernel.org/patchwork/patch/1228076/ V2: make array const to fix build errors Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-07drm/amd/display: add basic atomic check for cursor planeSimon Ser1-2/+24
This patch adds a basic cursor check when an atomic test-only commit is performed. The position and size of the cursor plane is checked. This should fix user-space relying on atomic checks to assign buffers to planes. Signed-off-by: Simon Ser <[email protected]> Reported-by: Roman Gilg <[email protected]> References: https://github.com/emersion/libliftoff/issues/46 Cc: Alex Deucher <[email protected]> Cc: Harry Wentland <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-07drm/amd/display: Fix vblank and pageflip event handling for FreeSyncNicholas Kazlauskas1-82/+55
[Why] We're sending the drm vblank event a frame too early in the case where the pageflip happens close to VUPDATE and ends up blocking the signal. The implementation in DM was previously correct *before* we started sending vblank events from VSTARTUP unconditionally to handle cases where HUBP was off, OTG was ON and userspace was still requesting some DRM planes enabled. As part of that patch series we dropped VUPDATE since it was deemed close enough to VSTARTUP, but there's a key difference betweeen VSTARTUP and VUPDATE - the VUPDATE signal can be blocked if we're holding the pipe lock. There was a fix recently to revert the unconditional behavior for the DCN VSTARTUP vblank event since it was sending the pageflip event on the wrong frame - once again, due to blocking VUPDATE and having the address start scanning out two frames later. The problem with this fix is it didn't update the logic that calls drm_crtc_handle_vblank(), so the timestamps are totally bogus now. [How] Essentially reverts most of the original VSTARTUP series but retains the behavior to send back events when active planes == 0. Some refactoring/cleanup was done to not have duplicated code in both the handlers. Fixes: 16f17eda8bad ("drm/amd/display: Send vblank and user events at vsartup for DCN") Fixes: 3a2ce8d66a4b ("drm/amd/display: Disable VUpdate interrupt for DCN hardware") Fixes: 2b5aed9ac3f7 ("drm/amd/display: Fix pageflip event race condition for DCN.") Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Leo Li <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-07drm/amdgpu: Fix bug in RAS invokeJohn Clements1-3/+3
Invoke sequence should abort when ras interrupt is detected before reading TA host shared memory Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: John Clements <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-06drm/amdgpu/navi10: fix unsigned comparison with 0ChenTao1-2/+0
Fixes warning because size is uint32_t and can never be negtative drivers/gpu/drm/amd/amdgpu/../powerplay/navi10_ppt.c:1296:12: warning: comparison of unsigned expression < 0 is always false [-Wtype-limits] if (size < 0) Reported-by: Hulk Robot <[email protected]> Signed-off-by: ChenTao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-06drm/amdgpu: Use GEM obj reference for KFD BOsFelix Kuehling1-2/+3
Releasing the AMDGPU BO ref directly leads to problems when BOs were exported as DMA bufs. Releasing the GEM reference makes sure that the AMDGPU/TTM BO is not freed too early. Also take a GEM reference when importing BOs from DMABufs to keep references to imported BOs balances properly. Signed-off-by: Felix Kuehling <[email protected]> Tested-by: Alex Sierra <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Alex Sierra <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-06drm/amdgpu: force fbdev into vramAlex Deucher1-2/+1
We set the fb smem pointer to the offset into the BAR, so keep the fbdev bo in vram. Bug: https://bugzilla.kernel.org/show_bug.cgi?id=207581 Fixes: 6c8d74caa2fa33 ("drm/amdgpu: Enable scatter gather display support") Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-06drm/amd/powerplay: perform PG ungate prior to CG ungateEvan Quan2-6/+6
Since gfxoff should be disabled first before trying to access those GC registers. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-06drm/amdgpu: drop unnecessary cancel_delayed_work_sync on PG ungateEvan Quan2-14/+4
As this is already properly handled in amdgpu_gfx_off_ctrl(). In fact, this unnecessary cancel_delayed_work_sync may leave a small time window for race condition and is dangerous. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-06drm/amdgpu: disable MGCG/MGLS also on gfx CG ungateEvan Quan1-1/+1
Otherwise, MGCG/MGLS will be left enabled. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-06drm/amdgpu: use the BAR if possible in amdgpu_device_vram_access v2Christian König1-0/+26
This should speed up debugging VRAM access a lot. v2: add HDP flush/invalidate Unrevert: RAS issue at root of the issue has been addressed Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Acked-by: Jonathan Kim <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Kent Russell <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-06drm/amd/display: Add dm support for DP 1.4 Compliance edid corruption testJerry (Fangzhi) Zuo1-27/+13
It works together with drm framework "drm: Add support for DP 1.4 Compliance edid corruption test" Add the edid validity check scenario when edid base block is read back with error. Send back real edid checksum and enable fail-safe mode in DC. Signed-off-by: Jerry (Fangzhi) Zuo <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-05drm/amdgpu: allocate large structures dynamicallyArnd Bergmann1-10/+21
After the structure was padded to 1024 bytes, it is no longer suitable for being a local variable, as the function surpasses the warning limit for 32-bit architectures: drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:587:5: error: stack frame size of 1072 bytes in function 'amdgpu_ras_feature_enable' [-Werror,-Wframe-larger-than=] int amdgpu_ras_feature_enable(struct amdgpu_device *adev, ^ Use kzalloc() instead to get it from the heap. Fixes: a0d254820f43 ("drm/amdgpu: update RAS TA to Host interface") Acked-by: Christian König <[email protected]> Signed-off-by: Arnd Bergmann <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-05amdgpu_acpi: add backlight control for the DC caseAndriy Gapon1-1/+21
This uses backlight_device_set_brightness() to set the brightness level requested via ATIF. Signed-off-by: Andriy Gapon <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-05drm/radeon: fix unsigned comparison with 0ChenTao1-2/+2
Fixes warning because pipe is unsigned long and can never be negtative vers/gpu/drm/radeon/radeon_kms.c:831:11: warning: comparison of unsigned expression < 0 is always false [-Wtype-limits] if (pipe < 0 || pipe >= rdev->num_crtc) { drivers/gpu/drm/radeon/radeon_kms.c:857:11: warning: comparison of unsigned expression < 0 is always false [-Wtype-limits] if (pipe < 0 || pipe >= rdev->num_crtc) { Reported-by: Hulk Robot <[email protected]> Signed-off-by: ChenTao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-05drm/amdgpu: Avoid integer overflow in amdgpu_device_suspend_display_audioNathan Chancellor1-1/+1
When building with Clang: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:4160:53: warning: overflow in expression; result is -294967296 with type 'long' [-Winteger-overflow] expires = ktime_get_mono_fast_ns() + NSEC_PER_SEC * 4L; ^ 1 warning generated. Multiplication happens first due to order of operations and both NSEC_PER_SEC and 4 are long literals so the expression overflows. To avoid this, make 4 an unsigned long long literal, which matches the type of expires (u64). Fixes: 3f12acc8d6d4 ("drm/amdgpu: put the audio codec into suspend state before gpu reset V3") Link: https://github.com/ClangBuiltLinux/linux/issues/1017 Signed-off-by: Nathan Chancellor <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-05drm/amd/display: 3.2.84Aric Cyr1-1/+1
Signed-off-by: Aric Cyr <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-05drm/amd/display: Add struct field for future useAnthony Koo1-0/+1
Add dmub related struct field for future use. Signed-off-by: Anthony Koo <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-05drm/amd/display: move location of dmub_srv.h fileAnthony Koo16-25/+25
[Why] Make a separation of what belongs in the differen dmub headers dmub_srv.h is for exposing dmub srv interface to rest of driver. other headers inside dmub/inc exposes cmds and definitions that are owned by the firmware [How] keep firmware owned definitions in dmub/inc move stuff that is purely driver interface headers to dmub/ since those are interface calls that are defined for rest of driver to use Signed-off-by: Anthony Koo <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Harry Wentland <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-05drm/amd/display: remove unused module/statsAurabindo Pillai1-448/+0
Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-05drm/amd/display: Check DMCU Exists Before LoadingJerry (Fangzhi) Zuo1-1/+6
Signed-off-by: Jerry (Fangzhi) Zuo <[email protected]> Reviewed-by: Hersen Wu <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-05drm/amd/display: Prevent dpcd reads with passive donglesAurabindo Pillai1-6/+11
[why] During hotplug, a DP port may be connected to the sink through passive adapter which does not support DPCD reads. Issuing reads without checking for this condition will result in errors [how] Ensure the link is in aux_mode before initiating operation that result in a DPCD read. Signed-off-by: Aurabindo Pillai <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-05drm/amd/display: Add 4 to 1 MPC split supportIsabel Zhang3-34/+79
[Why] Want to make use of detile buffer of all 4 pipes to maximize amount of data stored to hide certain memory latency cases. [How] In case of 1 plane and 1 stream, program 4 pipes to each retrieve 1/4 of plane later mixed together by the MPCs. Added support for transition from 4 to 1 MPC to 2 to 1 MPC or no pipe split case and vice versa. Currently, only enabled if debug flag is set. Signed-off-by: Isabel Zhang <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-05drm/amd/display: The external monitor will show gray screen during SUT rebootyanyan kang1-0/+16
[Why] same with CL#1711022(correcting yuv420 black color in function dcn10_blank_pixel_data,program_scaler), yuv420 black color also needs to be correct when enabling HDMI stream at the resume procedure. [How] correcting the yuv420 black color according to the way how 420 is packed :2 channels carry Y component, 1 channel alternate between Cb and Cr. Signed-off-by: yanyan kang <[email protected]> Reviewed-by: Eric Yang <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-05drm/amd/display: add addition dc type to translate to dmub fw typeAnthony Koo6-8/+21
[Why] For a type like PSR version, it makes sense for most of the code to include a dc type, instead of having this a fw type define since this is a capability and type exposed by dc. Especially if it doesn't even need to communicate with the fw. The code that is packing the firmware command message should be the one who needs to translate the psr version into a command that the firmware understands. [How] Add a dc_psr_version enum. Signed-off-by: Anthony Koo <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-05drm/amd/display: Support FP16 pixel formatStylon Wang1-0/+8
[Why] FP16 pixel format is not declared to DRM in Linux DM. [How] Add FP16 format to the support list presented to DRM from Linux DM. Signed-off-by: Stylon Wang <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-05drm/amd/display: temporary clamp the vratio used to 1.0Lewis Huang1-12/+14
[Why] in Is_Support function, driver report different caps between same timing but different scaling cause OS inconsistent. [How] min_row_time is a local that’s only used for verifying immediate flip support. Clamp the vratio used for its calculation to 1.0. Signed-off-by: Lewis Huang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-05drm/amd/display: Allow PState switch in VBLANK one display VACTIVEAlvin Lee6-1/+34
[Why] For certain display configurations we want to allow PSTATE switch when one display can switch in VACTIVE and the other display can switch in VBLANK [How] Add extra condition to dcn2 pstate support check Signed-off-by: Alvin Lee <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-05drm/amd/display: fix counter in wait_for_no_pipes_pendingRoman Li1-3/+2
[Why] Wait counter is not being reset for each pipe. [How] Move counter reset into pipe loop scope. Signed-off-by: Roman Li <[email protected]> Reviewed-by: Zhan Liu <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-05drm/amd/display: Mode change with same timing causing long display blankAric Cyr4-106/+0
[Why] What a mode change is requested for the same timing a full stream reset can occur in some cases which causes monitor to blank for a few seconds. [How] Do not consider infoframe updates as needing a full stream reset as they will be handled on the first flip after a modeset when surface information is available. Signed-off-by: Aric Cyr <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-05drm/amd/display: Update DCN2.1 DV Code RevisionSung Lee1-4/+4
[WHY & HOW] There is a problem in hscale_pixel_rate, the bug causes DCN to be more optimistic (more likely to underflow) in upscale cases during prefetch. This commit ports the fix from DV code to address these issues. Signed-off-by: Sung Lee <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-05drm/amd/display: Move panel_cntl specific register from abm to panel_cntl.Yongqiang Sun18-463/+339
[Why] panel_cntl specific register should be access in panel_cntl object. [How] Move these register access from abm to panel_cntl. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-05drm/amd/display: remove unused variable 'ret' in dm_suspend()Jason Yan1-2/+1
Fix the following coccicheck warning: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c:1574:5-8: Unneeded variable: "ret". Return "0" on line 1586 Signed-off-by: Jason Yan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-01amd/amdgpu: Limit rlcg write registers only for nv12shaoyunl1-7/+25
Create gfx_v10_0_rlc_funcs_sriov for nv12 with rlcg_write function pointers be initialized so driver can use RLCG to write aceess CSIB and CP_ME_CNTL registers when nv12 in sriov mode Signed-off-by: shaoyunl <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-01drm/amdkfd: Use a systematic method to calculate queue mask bitYong Zhao2-1/+6
The queue mask used for set_resources always assumes the queue number per pipe is 8, so KFD needs to align with that by using function amdgpu_queue_mask_bit_to_set_resource_bit(). Signed-off-by: Yong Zhao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-05-01drm/amdgpu: Rename amdgpu_gfx_kcq_queue_mask_transform()Yong Zhao2-9/+9
Rename it to amdgpu_queue_mask_bit_to_set_resource_bit() to be more specific about its functionality. KFD will use it later. Signed-off-by: Yong Zhao <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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