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2017-08-31drm/i915/cnl: Fix DP max voltageRodrigo Vivi1-4/+11
On clock recovery this function is called to find out the max voltage swing level that we could go. However gen 9 functions use the old buffer translation tables to figure that out. That table is not valid for CNL causing an invalid number of entries and an invalid selection on the max voltage swing level. v2: Let's use same approach that previous platforms. v3: Actually use n_entries and avoid duplicated -1. v4: Avoid cnl_max_level and use current style. Cc: Ville Syrjälä <[email protected]> Cc: Clint Taylor <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-08-31drm/i915/cnl: Fix DDI hdmi level selection.Rodrigo Vivi1-1/+4
Let's get a proper HDMI DDI entry level for vswing programming sequences on CNL. Spec doesn't specify any default for HDMI tables, so let's pick the last entry as the default for now. Signed-off-by: Rodrigo Vivi <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-08-31drm/i915/cnl: Move ddi buf trans related functions up.Rodrigo Vivi1-61/+61
No functional changes. But those functions will be needed to get max level for HDMI and DP, so let's move those up closer to other similar functions existent for previous platforms. Signed-off-by: Rodrigo Vivi <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-08-31drm/i915/cnl: Move voltage check into ddi buf trans functions.Rodrigo Vivi1-27/+21
Let's start converging CNL buf translations to same style used on previous platforms. So first thing is to use the standard signature so we don't need to propagate the voltage check into other parts of the code, but only on the parts that it is really useful. Signed-off-by: Rodrigo Vivi <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-08-31drm/i915: Enable voltage swing before enabling DDI_BUF_CTL.Rodrigo Vivi1-1/+6
Sequences for DisplayPort asks us to " Configure voltage swing and related IO settings. Refer to DDI Buffer section." before "Configure and enable DDI_BUF_CTL" On BXT and CNL this means to execute the ddi vswing sequences. At this point these sequences calls are getting duplicated for DP because they are all called from DP link trainning sequences. However this patch is not yet removing it before a futher discussion since spec also allows that during link training without disabling anything: " Notes Changing voltage swing during link training: Change the swing setting following the DDI Buffer section. The port does not need to be disabled. " Cc: Ville Syrjälä <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-08-31drm/i915: Align vswing sequences with old ddi buffer registers.Rodrigo Vivi1-12/+10
Vswing sequences on BXT and CNL are equivalent to the ddi buffer registers setting on other platforms. For some reason it got aligned with skl_ddi_set_iboost what is semantically incorrect. This forced us to keep skipping ddi buffer translation tables on the platforms that has the vswing sequences. v2: Don't mess with DP signal levels on this patch. Cc: Vandana Kannan <[email protected]> Cc: Imre Deak <[email protected]> Cc: Ville Syrjälä <[email protected]> Cc: Ander Conselvan de Oliveira <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-08-31drm/i915: decouple gen9 and gen10 dp signal levels.Rodrigo Vivi3-15/+23
Let's decouple bxt, glk and cnl dp signal levels from other DDIs to avoid confusion. No functional change. Only a reorg to avoid messing with currently working DP signal levels when moving voltage swing sequences around to match spec. v2: ddi_signal_levels is also called from other ddi platforms, so don't remove IS_GEN9_BC check from skl_ddi_set_iboos. (Ville). Cc: Ville Syrjälä <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-08-31drm/i915: Introduce intel_ddi_dp_level.Rodrigo Vivi1-6/+10
No functional changes. This only moves the DP level selection to a separated function that will be later used to organize better the vswing sequences. Cc: Ville Syrjälä <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-08-31drm/i915/cnl: Avoid ioremap_wc on Cannonlake as well.Rodrigo Vivi1-4/+4
Driver’s CPU access to GTT is via the GTTMMADR BAR. The current HW implementation of that BAR is to only support <= DW (and maybe QW) writes—not 16/32/64B writes that could occur with WC and/or SSE/AVX moves. GTTMMADR must be marked uncacheable (UC). Accesses to GTTMMADR(GTT), must be 64 bits or less (ie. 1 GTT entry). v2: Get clarification on the reasons and spec is getting updated to reflect it now. Cc: Joonas Lahtinen <[email protected]> Suggested-by: Ben Widawsky <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Reviewed-by: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-08-30drm/i915/cnl: WaDisableI2mCycleOnWRPortRodrigo Vivi2-0/+6
On CNL B0 stepping GAM is not able to detect some deadlock condition and then rise the rise the gam_coh_flush. WA database and spec both mentions to set 4AB8[24]=1 as workaround. Although register offset 0x4AB8 is not documented for any platform. References: HSD#1945815, BSID#1112 Cc: Mika Kuoppala <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Reviewed-by: Mika Kuoppala <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-08-30drm/i915/cnl: WA FtrEnableFastAnisoL1BankingFixRodrigo Vivi2-0/+4
WA to enable HW L1 Banking fix that allows aniso to operate at full sample rate. References: HSD#1937670 Cc: Mika Kuoppala <[email protected]> Cc: Oscar Mateo <[email protected]> Cc: Ben Widawsky <[email protected]> Cc: Anuj Phogat <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Reviewed-by: Mika Kuoppala <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-08-30drm/i915: Stop using long platform names on clock gating functions.Rodrigo Vivi1-22/+22
No functional changes. Our code was only a bit messy with mixed style there so let's clean up a bit using the short codenames for the platforms. Cc: Dhinakaran Pandiyan <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Acked-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-08-30drm/i915: Skip fence alignemnt check for the CCS planeVille Syrjälä1-1/+1
The CCS won't have the same stride as the main surface anyway so trying to guard against the fence stride not matching the CCS stride is not sensible. Just skip the fence vs. fb alignment check for the aux plane. Cc: Ben Widawsky <[email protected]> Cc: Jason Ekstrand <[email protected]> Cc: Daniel Stone <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Ben Widawsky <[email protected]> Fixes: 2e2adb05736c ("drm/i915: Add render decompression support") Signed-off-by: Ville Syrjälä <[email protected]>
2017-08-30drm/i915: Treat fb->offsets[] as a raw byte offset instead of a linear offsetVille Syrjälä1-44/+64
Userspace wants to treat fb->offsets[] as raw byte offsets into the gem bo. Adjust the kernel code to match. Cc: Ben Widawsky <[email protected]> Cc: Jason Ekstrand <[email protected]> Cc: Daniel Stone <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Acked-by: Ben Widawsky <[email protected]> Fixes: 2e2adb05736c ("drm/i915: Add render decompression support") Signed-off-by: Ville Syrjälä <[email protected]>
2017-08-30drm/i915: Always wake the device to flush the GTTChris Wilson1-6/+5
Since we hold the device wakeref when writing through the GTT (otherwise the writes would fail), we presumed that before the device sleeps those writes would naturally be flushed and that we wouldn't need our mmio read trick. However, that presumption seems false and a sleepy bxt seems to require us to always manually flush the GTT writes prior to direct access. Fixes: e2a2aa36a509 ("drm/i915: Check we have an wake device before flushing GTT writes") Signed-off-by: Chris Wilson <[email protected]> Cc: Joonas Lahtinen <[email protected]> Reviewed-by: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-08-29drm/i915: Discard the request queue if we fail to sleep before suspendChris Wilson1-1/+2
If we fail to clear the outstanding request queue before suspending, mark those requests as lost. References: https://bugs.freedesktop.org/show_bug.cgi?id=102037 Signed-off-by: Chris Wilson <[email protected]> Cc: Mika Kuoppala <[email protected]> Cc: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Mika Kuoppala <[email protected]>
2017-08-29drm/i915: Clear wedged status upon resumeChris Wilson1-0/+6
When we wake up from suspend, the device has been powered down and should come back afresh. We should be able to safely remove the wedged status from the previous session and start afresh. Signed-off-by: Chris Wilson <[email protected]> Cc: Mika Kuoppala <[email protected]> Cc: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Mika Kuoppala <[email protected]>
2017-08-29drm/i915: Always sanity check engine state upon idlingChris Wilson1-19/+8
When we do a locked idle we know that afterwards all requests have been completed and the engines have been cleared of tasks. For whatever reason, this doesn't always happen and we may go into a suspend with ELSP still full, and this causes an issue upon resume as we get very, very confused. If the engines refuse to idle, mark the device as wedged. In the process we get rid of the maybe unused open-coded version of wait_for_engines reported by Nick Desaulniers and Matthias Kaehlcke. v2: Suppress the -EIO before suspend, but keep it for seqno wrap. References: https://bugs.freedesktop.org/show_bug.cgi?id=101891 References: https://bugs.freedesktop.org/show_bug.cgi?id=102456 Signed-off-by: Chris Wilson <[email protected]> Cc: Mika Kuoppala <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Matthias Kaehlcke <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Joonas Lahtinen <[email protected]> Reviewed-by: Mika Kuoppala <[email protected]>
2017-08-29drm/i915: Don't use GPU relocations prior to cmdparser stallsChris Wilson1-1/+10
If we are using the cmdparser, we will have to copy the batch and so stall for the relocations. Rather than prolong that stall by adding more relocation requests, just use CPU relocations and do the stall upfront. Signed-off-by: Chris Wilson <[email protected]> Cc: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Joonas Lahtinen <[email protected]>
2017-08-29drm/i915: Recreate vmapping even when the object is pinnedChris Wilson4-3/+13
Sometimes we know we are the only user of the bo, but since we take a protective pin_pages early on, an attempt to change the vmap on the object is denied because it is busy. i915_gem_object_pin_map() cannot tell from our single pin_count if the operation is safe. Instead we must pass that information down from the caller in the manner of I915_MAP_OVERRIDE. This issue has existed from the introduction of the mapping, but was never noticed as the only place where this conflict might happen is for cached kernel buffers (such as allocated by i915_gem_batch_pool_get()). Until recently there was only a single user (the cmdparser) so no conflicts ever occurred. However, we now use it to allocate batches for different operations (using MAP_WC on !llc for writes) in addition to the existing shadow batch (using MAP_WB for reads). We could either keep both mappings cached, or use a different write mechanism if we detect a MAP_WB already exists (i.e. clflush afterwards), but as we haven't seen this issue in the wild (it requires hitting the GPU reloc path in addition to the cmdparser) for simplicity just allow the mappings to be recreated. v2: Include the i915_MAP_OVERRIDE bit in the enum so the compiler knows about all the valid values. Fixes: 7dd4f6729f92 ("drm/i915: Async GPU relocation processing") Testcase: igt/gem_lut_handle # byt, completely by accident Signed-off-by: Chris Wilson <[email protected]> Cc: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Joonas Lahtinen <[email protected]>
2017-08-29drm/i915: Remove excess indent in intel_finish_reset() caught by sparseChris Wilson1-2/+2
CHECK drivers/gpu/drm/i915/intel_display.c drivers/gpu/drm/i915/intel_display.c:3753 intel_finish_reset() warn: inconsistent indenting Signed-off-by: Chris Wilson <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Daniel Vetter <[email protected]>
2017-08-29Merge branch 'drm-vmwgfx-next' of ↵Dave Airlie9-161/+511
git://people.freedesktop.org/~syeh/repos_linux into drm-next vmwgfx add fence fd support. * 'drm-vmwgfx-next' of git://people.freedesktop.org/~syeh/repos_linux: drm/vmwgfx: Bump the version for fence FD support drm/vmwgfx: Add export fence to file descriptor support drm/vmwgfx: Add support for imported Fence File Descriptor drm/vmwgfx: Prepare to support fence fd drm/vmwgfx: Fix incorrect command header offset at restart drm/vmwgfx: Support the NOP_ERROR command drm/vmwgfx: Restart command buffers after errors drm/vmwgfx: Move irq bottom half processing to threads drm/vmwgfx: Don't use drm_irq_[un]install
2017-08-29Merge tag 'exynos-drm-next-for-v4.14' of ↵Dave Airlie18-327/+299
git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next Summary: - Provide NV12MT pixel format support of Mixer driver in generic way. - Refactor Exynos KMS drivers . Refactoring to panel detection way . Refactoring to setting up possible_crtcs . Refactoring to video and command mode support - Some cleanups * tag 'exynos-drm-next-for-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: drm/exynos: simplify set_pixfmt() in DECON and FIMD drivers drm/exynos: consistent use of cpp drm/exynos: mixer: remove src offset from mixer_graph_buffer() drm/exynos: mixer: simplify mixer_graph_buffer() drm/exynos: mixer: simplify vp_video_buffer() drm/exynos: mixer: enable NV12MT support for the video plane drm/exynos: mixer: fix chroma comment in vp_video_buffer() arm64: dts: exynos: remove i80-if-timings nodes dt-bindings: exynos5433-decon: remove i80-if-timings property drm/exynos/decon5433: use mode info stored in CRTC to detect i80 mode drm/exynos: add mode_valid callback to exynos_drm drm/exynos/decon5433: refactor irq requesting code drm/exynos/mic: use mode info stored in CRTC to detect i80 mode drm/exynos/dsi: propagate info about command mode from panel drm/exynos/dsi: refactor panel detection logic drm/exynos: use helper to set possible crtcs drm/exynos/decon5433: use readl_poll_timeout helpers
2017-08-29Merge tag 'drm-misc-next-fixes-2017-08-28' of ↵Dave Airlie1-7/+7
git://anongit.freedesktop.org/git/drm-misc into drm-next UAPI Changes: - Rename u32 to __u32 in struct drm_format_modifier_blob (Lionel) Cc: Lionel Landwerlin <[email protected]> * tag 'drm-misc-next-fixes-2017-08-28' of git://anongit.freedesktop.org/git/drm-misc: drm: rename u32 in __u32 in uapi
2017-08-29drm/syncobj: Add a signal ioctl (v3)Jason Ekstrand4-0/+41
This IOCTL provides a mechanism for userspace to trigger a sync object directly. There are other ways that userspace can trigger a syncobj such as submitting a dummy batch somewhere or hanging on to a triggered sync_file and doing an import. This just provides an easy way to manually trigger the sync object without weird hacks. The motivation for this IOCTL is Vulkan fences. Vulkan lets you create a fence already in the signaled state so that you can wait on it immediatly without stalling. We could also handle this with a new create flag to ask the driver to create a syncobj that is already signaled but the IOCTL seemed a bit cleaner and more generic. v2: - Take an array of sync objects (Dave Airlie) v3: - Throw -EINVAL if pad != 0 Signed-off-by: Jason Ekstrand <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2017-08-29drm/syncobj: Add a reset ioctl (v3)Jason Ekstrand4-0/+44
This just resets the dma_fence to NULL so it looks like it's never been signaled. This will be useful once we add the new wait API for allowing wait on "submit and signal" behavior. v2: - Take an array of sync objects (Dave Airlie) v3: - Throw -EINVAL if pad != 0 Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Christian König <[email protected]> (v1) Signed-off-by: Dave Airlie <[email protected]>
2017-08-29drm/syncobj: Add a syncobj_array_find helperJason Ekstrand1-31/+58
The wait ioctl has a bunch of code to read an syncobj handle array from userspace and turn it into an array of syncobj pointers. We're about to add two new IOCTLs which will need to work with arrays of syncobj handles so let's make some helpers. Signed-off-by: Jason Ekstrand <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2017-08-29drm/syncobj: Allow wait for submit and signal behavior (v5)Jason Ekstrand2-45/+208
Vulkan VkFence semantics require that the application be able to perform a CPU wait on work which may not yet have been submitted. This is perfectly safe because the CPU wait has a timeout which will get triggered eventually if no work is ever submitted. This behavior is advantageous for multi-threaded workloads because, so long as all of the threads agree on what fences to use up-front, you don't have the extra cross-thread synchronization cost of thread A telling thread B that it has submitted its dependent work and thread B is now free to wait. Within a single process, this can be implemented in the userspace driver by doing exactly the same kind of tracking the app would have to do using posix condition variables or similar. However, in order for this to work cross-process (as is required by VK_KHR_external_fence), we need to handle this in the kernel. This commit adds a WAIT_FOR_SUBMIT flag to DRM_IOCTL_SYNCOBJ_WAIT which instructs the IOCTL to wait for the syncobj to have a non-null fence and then wait on the fence. Combined with DRM_IOCTL_SYNCOBJ_RESET, you can easily get the Vulkan behavior. v2: - Fix a bug in the invalid syncobj error path - Unify the wait-all and wait-any cases v3: - Unify the timeout == 0 case a bit with the timeout > 0 case - Use wait_event_interruptible_timeout v4: - Use proxy fence v5: - Revert to a combination of v2 and v3 - Don't use proxy fences - Don't use wait_event_interruptible_timeout because it just adds an extra layer of callbacks Signed-off-by: Jason Ekstrand <[email protected]> Cc: Dave Airlie <[email protected]> Cc: Chris Wilson <[email protected]> Cc: Christian König <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2017-08-29drm/syncobj: Add a CREATE_SIGNALED flagJason Ekstrand2-3/+55
This requests that the driver create the sync object such that it already has a signaled dma_fence attached. Because we don't need anything in particular (just something signaled), we use a dummy null fence. This is useful for Vulkan which has a similar flag that can be passed to vkCreateFence. Signed-off-by: Jason Ekstrand <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2017-08-29drm/syncobj: Add a callback mechanism for replace_fence (v3)Jason Ekstrand2-2/+97
It is useful in certain circumstances to know when the fence is replaced in a syncobj. Specifically, it may be useful to know when the fence goes from NULL to something valid. This does make syncobj_replace_fence a little more expensive because it has to take a lock but, in the common case where there is no callback list, it spends a very short amount of time inside the lock. v2: - Don't lock in drm_syncobj_fence_get. We only really need to lock around fence_replace to make the callback work. v3: - Fix the cb_list comment to make kbuild happy Signed-off-by: Jason Ekstrand <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2017-08-29drm/syncobj: add sync obj wait interface. (v8)Dave Airlie4-0/+158
This interface will allow sync object to be used to back Vulkan fences. This API is pretty much the vulkan fence waiting API, and I've ported the code from amdgpu. v2: accept relative timeout, pass remaining time back to userspace. v3: return to absolute timeouts. v4: absolute zero = poll, rewrite any/all code to have same operation for arrays return -EINVAL for 0 fences. v4.1: fixup fences allocation check, use u64_to_user_ptr v5: move to sec/nsec, and use timespec64 for calcs. v6: use -ETIME and drop the out status flag. (-ETIME is suggested by ickle, I can feel a shed painting) v7: talked to Daniel/Arnd, use ktime and ns everywhere. v8: be more careful in the timeout calculations use uint32_t for counter variables so we don't overflow graciously handle -ENOINT being returned from dma_fence_wait_timeout Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2017-08-29i915: Use drm_syncobj_fence_getJason Ekstrand1-3/+1
Signed-off-by: Jason Ekstrand <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2017-08-29drm/syncobj: Add a race-free drm_syncobj_fence_get helper (v2)Jason Ekstrand2-1/+13
The atomic exchange operation in drm_syncobj_replace_fence is sufficient for the case where it races with itself. However, if you have a race between a replace_fence and dma_fence_get(syncobj->fence), you may end up with the entire replace_fence happening between the point in time where the one thread gets the syncobj->fence pointer and when it calls dma_fence_get() on it. If this happens, then the reference may be dropped before we get a chance to get a new one. The new helper uses dma_fence_get_rcu_safe to get rid of the race. This is also needed because it allows us to do a bit more than just get a reference in drm_syncobj_fence_get should we wish to do so. v2: - RCU isn't that scary - Call rcu_read_lock/unlock - Don't rename fence to _fence - Make the helper static inline Signed-off-by: Jason Ekstrand <[email protected]> Acked-by: Christian König <[email protected]> (v1) Signed-off-by: Dave Airlie <[email protected]>
2017-08-29drm/syncobj: Rename fence_get to find_fenceJason Ekstrand3-9/+9
The function has far more in common with drm_syncobj_find than with any in the get/put functions. Signed-off-by: Jason Ekstrand <[email protected]> Acked-by: Christian König <[email protected]> (v1) Signed-off-by: Dave Airlie <[email protected]>
2017-08-29drm: kirin: Add mode_valid logic to avoid mode clocks we can't generateJohn Stultz2-0/+81
Currently the hikey dsi logic cannot generate accurate byte clocks values for all pixel clock values. Thus if a mode clock is selected that cannot match the calculated byte clock, the device will boot with a blank screen. This patch uses the new mode_valid callback (many thanks to Jose Abreu for upstreaming it!) to ensure we don't select modes we cannot generate. Also, since the ade crtc code will adjust the mode in mode_set, this patch also adds a mode_fixup callback which we use to make sure we are validating the mode clock that will eventually be used. Cc: Daniel Vetter <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Sean Paul <[email protected]> Cc: David Airlie <[email protected]> Cc: Rob Clark <[email protected]> Cc: Xinliang Liu <[email protected]> Cc: Xinliang Liu <[email protected]> Cc: Rongrong Zou <[email protected]> Cc: Xinwei Kong <[email protected]> Cc: Chen Feng <[email protected]> Cc: Jose Abreu <[email protected]> Cc: Archit Taneja <[email protected]> Cc: [email protected] Reviewed-by: Sean Paul <[email protected]> Signed-off-by: John Stultz <[email protected]> Reviewed-by: Xinliang Liu <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2017-08-28drm/vmwgfx: Bump the version for fence FD supportSinclair Yeh1-2/+2
Minor version bump to indicate support for fence FD Signed-off-by: Sinclair Yeh <[email protected]> Reviewed-by: Deepak Singh Rawat <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
2017-08-28drm/vmwgfx: Add export fence to file descriptor supportSinclair Yeh4-11/+70
Added code to link a fence to a out_fence_fd file descriptor and thread out_fence_fd down to vmw_execbuf_copy_fence_user() so it can be copied into the IOCTL reply and be passed back up the the user. v2: Make sure to sync and clean up in case of failure Signed-off-by: Sinclair Yeh <[email protected]> Reviewed-by: Deepak Singh Rawat <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
2017-08-28drm/vmwgfx: Add support for imported Fence File DescriptorSinclair Yeh3-2/+71
This allows vmwgfx to wait on a fence created by another device. v2: * Remove special handling for vmwgfx fence and just use dma_fence_wait() * Use interruptible waits * Added function documentation Signed-off-by: Sinclair Yeh <[email protected]> Reviewed-by: Deepak Singh Rawat <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
2017-08-28drm/vmwgfx: Prepare to support fence fdSinclair Yeh2-8/+8
Make the fields and flags available. Signed-off-by: Sinclair Yeh <[email protected]> Reviewed-by: Deepak Singh Rawat <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
2017-08-28drm/vmwgfx: Fix incorrect command header offset at restartThomas Hellstrom1-0/+1
Sometimes it appears like the device modifies the command header offset member. So explicitly clear it when restarting after an error. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Sinclair Yeh <[email protected]>
2017-08-28drm/vmwgfx: Support the NOP_ERROR commandThomas Hellstrom1-0/+2
Can be used by user-space applications to test and verify the kernel command buffer error recovery functionality. Malicious user-space apps could potentially use this command to slow down graphics processing somewhat, but they could also accomplish the same thing using a random malformed command so this should be considered safe. At least as safe as it gets. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Sinclair Yeh <[email protected]>
2017-08-28drm/vmwgfx: Restart command buffers after errorsThomas Hellstrom3-27/+206
Previously we skipped the command buffer and added an extra fence to avoid hangs due to skipped fence commands. Now we instead restart the command buffer after the failing command, if there are any commands left. In addition we print out some information about the failing command and its location in the command buffer. Testing Done: ran glxgears using mesa modified to send the NOP_ERROR command before each 10th clear and verified that we detected the device error properly and that there were no other device errors caused by incorrectly ordered command buffers. Also ran the piglit "quick" test suite which generates a couple of device errors and verified that they were handled as intended. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Sinclair Yeh <[email protected]>
2017-08-28drm/vmwgfx: Move irq bottom half processing to threadsThomas Hellstrom4-91/+112
This gets rid of the irq bottom half tasklets and instead performs the work needed in process context. We also convert irq-disabling spinlocks to ordinary spinlocks. This should decrease system latency for other system components, like sound for example but has the potential to increase latency for processes that wait on the GPU. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Sinclair Yeh <[email protected]>
2017-08-28drm/vmwgfx: Don't use drm_irq_[un]installThomas Hellstrom3-21/+40
We're not allowed to change the upstream version of the drm_irq_install function to be able to incorporate threaded irqs. So roll our own irq install- and uninstall functions instead of relying on the drm core ones. Signed-off-by: Thomas Hellstrom <[email protected]>
2017-08-28drm/i915: Beef up of Beef up the IPS vs. CRC workaroundMarta Lofstedt1-3/+0
Commit 6e644626945c ("drm/i915: Beef up the IPS vs. CRC workaround") was supposed to solve below bug. However, the patch I tested is not the same as the one that got merged. With this addition the test pass. V2: removed unused: "struct intel_crtc *intel_crtc" Fixes: 6e644626945c ("drm/i915: Beef up the IPS vs. CRC workaround") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101664 Signed-off-by: Marta Lofstedt <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2017-08-28drm/i915/bios: amend edp block based on intel_vbt_decodeJani Nikula2-7/+22
Copy over some fields defined in the intel_vbt_decode tool. No functional changes. Cc: Ville Syrjälä <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/8a42f0e4d1bba2679e9cd78da1e31b66133d562f.1503670197.git.jani.nikula@intel.com
2017-08-28drm/i915/bios: amend child device flags based on intel_vbt_decodeJani Nikula1-2/+7
Copy over some fields defined in the intel_vbt_decode tool. No functional changes. Cc: Ville Syrjälä <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/bce6907fa24d80643b33d58091d7675ff3b4f30e.1503670197.git.jani.nikula@intel.com
2017-08-28drm/i915/bios: amend bdb_general_featuresJani Nikula1-6/+10
Copy over some fields defined in the intel_vbt_tool. No functional changes. Cc: Ville Syrjälä <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/884cf56c019999a2c826da7e50a5fbf1aec5146b.1503670197.git.jani.nikula@intel.com
2017-08-28drm/i915/bios: split up iboost to hdmi and dp bitfieldsJani Nikula2-3/+4
This is according to the style all over the place. No functional changes. Cc: Ville Syrjälä <[email protected]> Suggested-by: Ville Syrjälä <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/cf5f0e5d10851db3796e632836d23551f59cc412.1503670197.git.jani.nikula@intel.com
2017-08-26drm/i915: Quietly cancel FBC activation if CRTC is turned off before workerChris Wilson1-3/+1
Since we use a worker to enable FBC on the CRTC, it is possible for the CRTC to be switched off before we run. In this case, the CRTC will not allow us to wait upon a vblank, so remove the DRM_ERROR as this is very much expected. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102410 Fixes: ca18d51d77eb ("drm/i915/fbc: wait for a vblank instead of 50ms when enabling") Signed-off-by: Chris Wilson <[email protected]> Cc: Paulo Zanoni <[email protected]> Cc: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Daniel Vetter <[email protected]>