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2019-12-19mmc: dw_mmc: Use dma_request_chan() instead dma_request_slave_channel()Peter Ujfalusi1-3/+5
dma_request_slave_channel() is a wrapper on top of dma_request_chan() eating up the error code. By using dma_request_chan() directly the driver can support deferred probing against DMA. Signed-off-by: Peter Ujfalusi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-19Merge branch 'fixes' into nextUlf Hansson1-0/+10
2019-12-19mmc: sdhci-of-esdhc: re-implement erratum A-009204 workaroundYangbo Lu1-0/+10
The erratum A-009204 workaround patch was reverted because of incorrect implementation. 8b6dc6b mmc: sdhci-of-esdhc: Revert "mmc: sdhci-of-esdhc: add erratum A-009204 support" This patch is to re-implement the workaround (add a 5 ms delay before setting SYSCTL[RSTD] to make sure all the DMA transfers are finished). Signed-off-by: Yangbo Lu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Fixes: 5dd195522562 ("mmc: sdhci-of-esdhc: add erratum A-009204 support") Cc: [email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-18mmc: mmci: Support any block sizes for ux500v2 and qcom variantLinus Walleij2-5/+37
For the ux500v2 variant of the PL18x block, any block sizes are supported. This is necessary to support some SDIO transfers. This also affects the QCOM MMCI variant and the ST micro variant. For Ux500 an additional quirk only allowing DMA on blocks that are a power of two is needed. This might be a bug in the DMA engine (DMA40) or the MMCI or in the interconnect, but the most likely is the MMCI, as transfers of these sizes work fine for other devices using the same DMA engine. DMA works fine also with SDIO as long as the blocksize is a power of 2. This patch has proven necessary for enabling SDIO for WLAN on PostmarketOS-based Ux500 platforms. What we managed to test in practice is Broadcom WiFi over SDIO on the Ux500 based Samsung GT-I8190 and GT-S7710. This WiFi chip, BCM4334 works fine after the patch. Before this patch: brcmfmac: brcmf_fw_alloc_request: using brcm/brcmfmac4334-sdio for chip BCM4334/3 mmci-pl18x 80118000.sdi1_per2: unsupported block size (60 bytes) brcmfmac: brcmf_sdiod_ramrw: membytes transfer failed brcmfmac: brcmf_sdio_download_code_file: error -22 on writing 434236 membytes at 0x00000000 brcmfmac: brcmf_sdio_download_firmware: dongle image file download failed After this patch: brcmfmac: brcmf_c_preinit_dcmds: Firmware: BCM4334/3 wl0: Nov 21 2012 00:21:28 version 6.10.58.813 (B2) FWID 01-0 Bringing up networks, discovering networks with "iw dev wlan0 scan" and connecting works fine from this point. This patch is inspired by Ulf Hansson's patch http://www.spinics.net/lists/linux-mmc/msg12160.html As the DMA engines on these platforms may now get block sizes they were not used to before, make sure to also respect if the DMA engine says "no" to a transfer. Make a drive-by fix for datactrl_blocksz, misspelled. Cc: Ludovic Barre <[email protected]> Cc: Brian Masney <[email protected]> Cc: Stephan Gerhold <[email protected]> Cc: Niklas Cassel <[email protected]> Cc: Russell King <[email protected]> Signed-off-by: Ulf Hansson <[email protected]> Signed-off-by: Srinivas Kandagatla <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Tested-by: Stephan Gerhold <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2019-12-18mmc: au1xmmc: switch to platform_get_irqYangtao Li1-5/+2
platform_get_resource(pdev, IORESOURCE_IRQ) is not recommended for requesting IRQ's resources, as they can be not ready yet. Using platform_get_irq() instead is preferred for getting IRQ even if it was not retrieved earlier. Signed-off-by: Yangtao Li <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-18mmc: mtk-sd: convert to devm_platform_ioremap_resourceYangtao Li1-2/+1
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-18mmc: mvsdio: convert to devm_platform_ioremap_resourceYangtao Li1-4/+2
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-18mmc: sdhci-msm: convert to devm_platform_ioremap_resourceYangtao Li1-5/+1
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <[email protected]> Reviewed-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-18mmc: sdhci-milbeaut: convert to devm_platform_ioremap_resourceYangtao Li1-3/+1
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-18mmc: sdhci_am654: convert to devm_platform_ioremap_resourceYangtao Li1-3/+1
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-18mmc: sdhci_f_sdh30: convert to devm_platform_ioremap_resourceYangtao Li1-3/+1
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-18mmc: sh_mmcif: convert to devm_platform_ioremap_resourceYangtao Li1-3/+1
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <[email protected]> Reviewed-by: Wolfram Sang <[email protected]> Tested-by: Wolfram Sang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-18mmc: sdhci-spear: convert to devm_platform_ioremap_resourceYangtao Li1-3/+1
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-18mmc: sdhci-s3c: convert to devm_platform_ioremap_resourceYangtao Li1-3/+1
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-18mmc: meson-mx-sdio: convert to devm_platform_ioremap_resourceYangtao Li1-3/+1
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-18mmc: tmio: convert to devm_platform_ioremap_resourceYangtao Li1-3/+1
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <[email protected]> Reviewed-by: Wolfram Sang <[email protected]> Tested-by: Wolfram Sang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-18mmc: sunxi-mmc: convert to devm_platform_ioremap_resourceYangtao Li1-2/+1
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by: Yangtao Li <[email protected]> Acked-by: Chen-Yu Tsai <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-18Merge branch 'fixes' into nextUlf Hansson4-3/+16
2019-12-18mmc: sdhci: Add a quirk for broken command queuingAdrian Hunter2-0/+5
Command queuing has been reported broken on some systems based on Intel GLK. A separate patch disables command queuing in some cases. This patch adds a quirk for broken command queuing, which enables users with problems to disable command queuing using sdhci module parameters for quirks. Fixes: 8ee82bda230f ("mmc: sdhci-pci: Add CQHCI support for Intel GLK") Signed-off-by: Adrian Hunter <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-18mmc: sdhci: Workaround broken command queuing on Intel GLKAdrian Hunter1-1/+9
Command queuing has been reported broken on some Lenovo systems based on Intel GLK. This is likely a BIOS issue, so disable command queuing for Intel GLK if the BIOS vendor string is "LENOVO". Fixes: 8ee82bda230f ("mmc: sdhci-pci: Add CQHCI support for Intel GLK") Signed-off-by: Adrian Hunter <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-18mmc: sdhci-of-esdhc: use 1/2 periperhal clock for ls1088aYangbo Lu1-1/+2
The eSDHC on LS1088A platform uses 1/2 peripheral clock as base clock. Signed-off-by: Yangbo Lu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-18mmc: sdhci-of-esdhc: fix P2020 errata handlingYangbo Lu1-2/+2
Two previous patches introduced below quirks for P2020 platforms. - SDHCI_QUIRK_RESET_AFTER_REQUEST - SDHCI_QUIRK_BROKEN_TIMEOUT_VAL The patches made a mistake to add them in quirks2 of sdhci_host structure, while they were defined for quirks. host->quirks2 |= SDHCI_QUIRK_RESET_AFTER_REQUEST; host->quirks2 |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL; This patch is to fix them. host->quirks |= SDHCI_QUIRK_RESET_AFTER_REQUEST; host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL; Fixes: 05cb6b2a66fa ("mmc: sdhci-of-esdhc: add erratum eSDHC-A001 and A-008358 support") Fixes: a46e42712596 ("mmc: sdhci-of-esdhc: add erratum eSDHC5 support") Signed-off-by: Yangbo Lu <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-18mmc: mmci: add threaded irq to abort DPSM of non-functional stateLudovic Barre2-6/+41
The stm32_sdmmc variant has build-in support for datatimeout for R1B requests. If a corresponding IRQ is raised, this triggers the DPSM to stay busy and remains in a non-functional state. Only a reset can bring it back to a functional state. Because a reset must be issued from non-atomic context, let's defer this to be managed from a threaded IRQ handler. Besides the reset, the threaded handler also calls mmc_request_done(), to finally complete the request. Signed-off-by: Ludovic Barre <[email protected]> Link: https://lore.kernel.org/r/[email protected] [Ulf: A few minor updates to the changelog/comments] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-18mmc: core: Remove mmc_gpiod_request_*(invert_gpio)Michał Mirosław14-37/+24
Now that invert_gpio arguments are unused, let's remove them. Signed-off-by: Michał Mirosław <[email protected]> Link: https://lore.kernel.org/r/64d766d1f8af2e22bce32f4ffa453f7234207ad6.1576031637.git.mirq-linux@rere.qmqm.pl Signed-off-by: Ulf Hansson <[email protected]>
2019-12-18mmc: core: Rework cd-gpio handlingMichał Mirosław3-43/+12
There are a few places around the code that invert inverted and possibly inverted CD line. That's really confusing. Squash them all into one place in mmc_gpiod_request_cd(). MMC_CAP2_CD_ACTIVE_HIGH is used analogously to WP line: in GPIO mode it is used only at probe time to switch polarity, for native mode it is left as is. Signed-off-by: Michał Mirosław <[email protected]> Link: https://lore.kernel.org/r/db189b715596d63caf8c6a088bddc71dd69a879b.1576031637.git.mirq-linux@rere.qmqm.pl Signed-off-by: Ulf Hansson <[email protected]>
2019-12-18mmc: core: Rework wp-gpio handlingMichał Mirosław5-16/+13
Use MMC_CAP2_RO_ACTIVE_HIGH flag as indicator if GPIO line is to be inverted compared to DT/platform-specified polarity. The flag is not used after init in GPIO mode anyway. No functional changes intended. Signed-off-by: Michał Mirosław <[email protected]> Link: https://lore.kernel.org/r/a60f563f11bbff821da2fa2949ca82922b144860.1576031637.git.mirq-linux@rere.qmqm.pl Signed-off-by: Ulf Hansson <[email protected]>
2019-12-18gpio: add gpiod_toggle_active_low()Michał Mirosław2-0/+18
Add possibility to toggle active-low flag of a gpio descriptor. This is useful for compatibility code, where defaults are inverted vs DT gpio flags or the active-low flag is taken from elsewhere. Acked-by: Linus Walleij <[email protected]> Signed-off-by: Michał Mirosław <[email protected]> Link: https://lore.kernel.org/r/7ce0338e01ad17fa5a227176813941b41a7c35c1.1576031637.git.mirq-linux@rere.qmqm.pl Signed-off-by: Ulf Hansson <[email protected]>
2019-12-18mmc: sdhci-s3c: remove unused ext_cd_gpio fieldMichał Mirosław1-2/+0
Signed-off-by: Michał Mirosław <[email protected]> Acked-by: Adrian Hunter <[email protected]> Link: https://lore.kernel.org/r/3f12c2deaae9e77a5e7ab8415db7751a27bc3b98.1575916477.git.mirq-linux@rere.qmqm.pl Signed-off-by: Ulf Hansson <[email protected]>
2019-12-18mmc: cavium: Add missed pci_release_regionsChuhong Yuan1-5/+11
The driver forgets to call pci_release_regions() in probe failure and remove. Add the missed calls to fix it. Signed-off-by: Chuhong Yuan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-16Merge branch 'mmc_pinctrl' into nextUlf Hansson11-76/+40
Merge an immutable pinctrl branch from Linus Walleij's tree, which enables pinctrl code consolidations for mmc. Signed-off-by: Ulf Hansson <[email protected]>
2019-12-16mmc: uniphier-sd: Convert to pinctrl_select_default_state()Ulf Hansson1-9/+5
Let's drop the boilerplate code for managing the default pinctrl state and convert into using the new pinctrl_select_default_state(). Cc: Masahiro Yamada <[email protected]> Signed-off-by: Ulf Hansson <[email protected]> Acked-by: Masahiro Yamada <[email protected]> Acked-by: Linus Walleij <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2019-12-16mmc: jz4740: Convert to pinctrl_select_default_state()Ulf Hansson1-1/+1
Let's move away from using pinctrl_pm_select_default_state() as it's scheduled for removal and use pinctrl_select_default_state() instead. Cc: Paul Cercueil <[email protected]> Signed-off-by: Ulf Hansson <[email protected]> Acked-by: Paul Cercueil <[email protected]> Acked-by: Linus Walleij <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2019-12-16mmc: atmel-mci: Convert to pinctrl_select_default_state()Ulf Hansson1-1/+1
Let's move away from using pinctrl_pm_select_default_state() as it's scheduled for removal and use pinctrl_select_default_state() instead. Cc: Ludovic Desroches <[email protected]> Signed-off-by: Ulf Hansson <[email protected]> Acked-by: Linus Walleij <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2019-12-16mmc: sdhci-esdhc-imx: Convert to pinctrl_select_default_state()Ulf Hansson1-9/+2
Let's drop the boilerplate code for managing the default pinctrl state and convert into using the new pinctrl_select_default_state(). Cc: Adrian Hunter <[email protected]> Signed-off-by: Ulf Hansson <[email protected]> Acked-by: Linus Walleij <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2019-12-16mmc: omap_hsmmc: Convert to pinctrl_select_default_state()Ulf Hansson1-8/+2
Let's drop the boilerplate code for managing the default pinctrl state and convert into using the new pinctrl_select_default_state(). Additionally, move away from using pinctrl_pm_select_default_state() as it's scheduled for removal and use pinctrl_select_default_state() instead. Signed-off-by: Ulf Hansson <[email protected]> Acked-by: Linus Walleij <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2019-12-16mmc: usdhi6rol0: Convert to pinctrl_select_default_state()Ulf Hansson1-14/+1
Let's drop the boilerplate code for managing the default pinctrl state and convert into using the new pinctrl_select_default_state(). Cc: Jesper Nilsson <[email protected]> Cc: Lars Persson <[email protected]> Signed-off-by: Ulf Hansson <[email protected]> Acked-by: Jesper Nilsson <[email protected]> Acked-by: Linus Walleij <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2019-12-16mmc: mmci: Convert to pinctrl_select_default_state()Ulf Hansson2-11/+2
Let's drop the boilerplate code for managing the default pinctrl state and convert into using the new pinctrl_select_default_state(). Additionally, move away from using pinctrl_pm_select_default_state() as it's scheduled for removal and use pinctrl_select_default_state() instead. Cc: Russell King <[email protected]> Signed-off-by: Ulf Hansson <[email protected]> Acked-by: Linus Walleij <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2019-12-16mmc: meson-gx: Convert to pinctrl_select_default_state()Ulf Hansson1-9/+1
Let's drop the boilerplate code for managing the default pinctrl state and convert into using the new pinctrl_select_default_state(). Cc: Kevin Hilman <[email protected]> Signed-off-by: Ulf Hansson <[email protected]> Reviewed-by: Jerome Brunet <[email protected]> Acked-by: Linus Walleij <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2019-12-16Merge branch 'fixes' into nextUlf Hansson4-15/+22
2019-12-16mmc: sdhci: Update the tuning failed messages to pr_debug levelFaiz Abbas1-2/+2
Tuning support in DDR50 speed mode was added in SD Specifications Part1 Physical Layer Specification v3.01. Its not possible to distinguish between v3.00 and v3.01 from the SCR and that is why since commit 4324f6de6d2e ("mmc: core: enable CMD19 tuning for DDR50 mode") tuning failures are ignored in DDR50 speed mode. Cards compatible with v3.00 don't respond to CMD19 in DDR50 and this error gets printed during enumeration and also if retune is triggered at any time during operation. Update the printk level to pr_debug so that these errors don't lead to false error reports. Signed-off-by: Faiz Abbas <[email protected]> Cc: [email protected] # v4.4+ Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-16dt-bindings: mmc: renesas_sdhi: Document r8a77961 supportGeert Uytterhoeven1-1/+2
Document support for the SDHI controller in the Renesas R-Car M3-W+ (R8A77961) SoC. Update all references to R-Car M3-W from "r8a7796" to "r8a77960", to avoid confusion between R-Car M3-W (R8A77960) and M3-W+. Signed-off-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Niklas Söderlund <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-16mmc: renesas_sdhi: use recent tap values for HS400Wolfram Sang3-4/+7
New datasheets require different and new values for HS400 with 4taps or 8taps. Signed-off-by: Wolfram Sang <[email protected]> Reviewed-by: Yoshihiro Shimoda <[email protected]> Tested-by: Yoshihiro Shimoda <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-16mmc: renesas_sdhi: remove 4taps as a TMIO flagWolfram Sang2-8/+2
Now that the quirks structure is accessible, we can remove the TMIO flag for HS400 using only 4 taps. This is Renesas specific anyhow. Signed-off-by: Wolfram Sang <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Yoshihiro Shimoda <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-16mmc: renesas_sdhi: make quirks info accessible outside probe()Wolfram Sang2-5/+7
We will need that for a later patch. Signed-off-by: Wolfram Sang <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Yoshihiro Shimoda <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-16mmc: renesas_sdhi: make warning more preciseWolfram Sang1-1/+1
The warning is not solely used for SDR104 anymore, but for all which require tuning. Signed-off-by: Wolfram Sang <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Yoshihiro Shimoda <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-16mmc: renesas_sdhi: keep sorting for quirk entriesWolfram Sang1-1/+1
The two devices next to each other are super similar, but still, let's keep the alphanumeric sorting for easier additions later. Signed-off-by: Wolfram Sang <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Yoshihiro Shimoda <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-16mmc: renesas_sdhi: remove whitelist for internal DMACWolfram Sang1-19/+4
We know now that there won't be Gen3 SoCs with both, SYS-DMAC and internal DMAC. We removed the blacklisting for SYS-DMAC already, so we can remove the whitelisting for internal DMAC, too. This makes adding new SoCs easier. We keep the quirk handling, of course. Signed-off-by: Wolfram Sang <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Niklas Söderlund <[email protected]> Reviewed-by: Yoshihiro Shimoda <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-16mmc: sdhci: fix up CMD12 sendingYangbo Lu1-14/+3
The STOP command is disabled for multiple blocks r/w commands with auto CMD12, when start to send. However, if there is data error, software still needs to send CMD12 according to SD spec. This patch is to allow software CMD12 sending for this case. Signed-off-by: Yangbo Lu <[email protected]> Acked-by: Adrian Hunter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-16mmc: spi: Toggle SPI polarity, do not hardcode itLinus Walleij1-3/+8
The code in mmc_spi_initsequence() tries to send a burst with high chipselect and for this reason hardcodes the device into SPI_CS_HIGH. This is not good because the SPI_CS_HIGH flag indicates logical "asserted" CS not always the physical level. In some cases the signal is inverted in the GPIO library and in that case SPI_CS_HIGH is already set, and enforcing SPI_CS_HIGH again will actually drive it low. Instead of hard-coding this, toggle the polarity so if the default is LOW it goes high to assert chipselect but if it is already high then toggle it low instead. Cc: Phil Elwell <[email protected]> Reported-by: Mark Brown <[email protected]> Signed-off-by: Linus Walleij <[email protected]> Reviewed-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Cc: [email protected] Signed-off-by: Ulf Hansson <[email protected]>
2019-12-16mmc: sdhci-of-at91: rework clocks management to support SAM9x60 deviceLudovic Desroches1-47/+58
In the SAM9x60 SoC, there are only two clocks instead of three for the SDHCI device. The base clk is no longer provided, it is generated internally from the mult clk. The values of the base clk and mul in the capabilities registers may not reflect the reality as the mult clk is a programmable clock which can take several rates. As we can't trust those values, take them from the clock tree and update the capabilities according to. As we can have the same pitfall, in some cases, with the SAMA5D2 Soc, stop relying on capabilities too. Signed-off-by: Ludovic Desroches <[email protected]> Acked-by: Adrian Hunter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
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