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git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt64
Merge "Samsung DeviceTree changes for ARM64 for v4.8" from Krzysztof Kozlowski:
1. Adjust the voltage of CPU buck regulator so scaling could work.
* tag 'samsung-dt64-4.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Modify the voltage range for BUCK2 for exynos7
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git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt64
Merge "Juno platform DT updates for v4.8" from Sudeep Holla:
1. Adds various CoreSight debug components on Juno boards
2. Adds SCPI device power domains and use them for coresight components
3. Adds thermal zones for SCPI sensors on Juno
* tag 'juno-dt-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: juno: add thermal zones for scpi sensors
arm64: dts: juno: add SCPI power domains for device power management
arm64: dts: juno: add coresight support
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git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64
Merge "Second Round of Renesas ARM64 Based SoC DT Updates for v4.8" from Simon Horman:
* Add support for r8a7796/salvator-x (R-Car Gen 3 M3-W)
* Add CAN support to r8a7795 (R-Car Gen 3 H3)
* tag 'renesas-arm64-dt2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
arm64: dts: r8a7796/salvator-x: Enable watchdog timer
arm64: dts: r8a7796: Add RWDT node
arm64: dts: r8a7796: Use SYSC "always-on" PM Domain
arm64: dts: r8a7796: Add SYSC PM Domains
arm64: dts: salvator-x: add Salvator-X board on R8A7796 SoC
arm64: dts: r8a7796: Add Renesas R8A7796 SoC support
arm64: dts: r8a7795: Add CAN FD support
arm64: dts: r8a7795: Add missing blank lines between cpu nodes
clk: renesas: r8a7795: Add THS/TSC clock
clk: renesas: r8a7795: Add DRIF clock
clk: renesas: r8a7795: Correct lvds clock parent
clk: renesas: r8a7795: Provide FDP1 clocks
clk: renesas: Add R8A7792 support
clk: renesas: mstp: Document R8A7792 support
clk: renesas: rcar-gen2: Document R8A7792 support
clk: renesas: cpg-mssr: Add support for R-Car M3-W
clk: renesas: cpg-mssr: Extract common R-Car Gen3 support code
clk: renesas: Add r8a7796 CPG Core Clock Definitions
clk: renesas: cpg-mssr: Document r8a7796 support
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This reverts commit f3abd6296168, which caused a build regression:
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi:48:41: fatal error: dt-bindings/clock/gxbb-clkc.h: No such file or directory
We should apply this patch one merge window later, once the clk branch
is merged as well.
Signed-off-by: Arnd Bergmann <[email protected]>
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http://github.com/Broadcom/stblinux into next/dt64
Merge "Broadcom ARM64 Device Tree changes for 4.8 (part 2)" from Florian Fainelli:
This pull request contains the second part of the Broadcom ARM64-based SoCs
changes for 4.8. Please note that this pull request contains changes from the
ARM 32-bits port and ARM 64-bits port as well:
- Lubomir updates all BCM2835 (Raspberry Pi family) Device Tree source files with
their proper information about the on-board USB Ethernet adapter so there is
appropriate binding between this USB device and a device_node (useful for MAC
address fetching and stuff), this commit is also present for the ARM DT pull
request
- Eric adds support for the Raspberry Pi 3 aka BCM2837 and provides the binding
information and the basic SoC DT include file required to boot to a prompt
- Gerd updates the Raspberry Pi 3 DT with Ethernet information based on the
earlier change from Lubomir
* tag 'arm-soc/for-4.8/devicetree-arm64-part2' of http://github.com/Broadcom/stblinux:
ARM: bcm2837: dt: Add the ethernet to the device trees
ARM: bcm2835: Add devicetree for the Raspberry Pi 3.
dt-bindings: Add root properties for Raspberry Pi 3
ARM: bcm2835: dt: Add the ethernet to the device trees
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git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt64
Merge "Amlogic 64-bit DT updates" from Kevin Hilman:
- add RNG and new clock driver support
* tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM64: DTS: meson-gxbb: switch ethernet to real clock
arm64: dts: gxbb clock controller
ARM64: dts: meson-gxbb: Add Hardware Random Generator node
dt-bindings: hwrng: Add Amlogic Meson Hardware Random Generator bindings
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next/dt64
Merge "mvebu dt64 for 4.8 (part 1)" from Gregory CLEMENT:
- update dt with mv-xor-v2 found in the Armada 7K/8K SoCs
- update dt with the clocks found in the Armada 3700 SoCs
* tag 'mvebu-dt64-4.8-1' of git://git.infradead.org/linux-mvebu:
arm64: dts: marvell: add peripherals clocks for Armada 37xx
arm64: dts: marvell: add tbg clocks for Armada 37xx
arm64: dts: marvell: Add xtal clock support for Armada 3700
arm64: dts: marvell: add XOR engine description for Armada 7K/8K CP
arm64: dts: marvell: adjust to the latest mv-xor-v2 DT binding
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next/dt64
Merge "ARM: mediatek: dts 64 bit updates for v4.8" from Matthias Brugger:
- Add nodes for the DISP function ports
- Add dt-bindings for mt6755
- Add basic support for mt6755 SoC
* tag 'v4.7-next-dts' of https://github.com/mbgg/linux-mediatek:
arm64: dts: mediatek: add mt6755 support
Document: DT: Add bindings for mediatek MT6755 SoC Platform
arm64: dts: mt8173: Add display subsystem related nodes
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Enable the Watchdog Timer (WDT) controller on the Renesas Salvator-X
board equipped with an R-Car M3-W (r8a7796) SoC.
Signed-off-by: Geert Uytterhoeven <[email protected]>
Acked-by: Wolfram Sang <[email protected]>
Signed-off-by: Simon Horman <[email protected]>
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Add a device node for the Watchdog Timer (WDT) controller on the Renesas
R-Car M3-W (r8a7796) SoC.
Signed-off-by: Geert Uytterhoeven <[email protected]>
Acked-by: Wolfram Sang <[email protected]>
Signed-off-by: Simon Horman <[email protected]>
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Hook up all devices that are part of the CPG/MSSR Clock Domain to the
SYSC "always-on" PM Domain, for a more consistent device-power-area
description in DT.
Signed-off-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Simon Horman <[email protected]>
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Add a device node for the System Controller.
Hook up the Cortex-A57 CPU core and L2 cache/SCU to their respective PM
Domains.
Signed-off-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Simon Horman <[email protected]>
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This patch adds initial board support for R8A7796 Salvator-X.
Signed-off-by: Takeshi Kihara <[email protected]>
Signed-off-by: Simon Horman <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
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Basic support for the Gen 3 R-Car M3-W SoC.
Based on work for the r8a7795 and r8a7796 SoCs by
Takeshi Kihara, Dirk Behme and Geert Uytterhoeven.
Signed-off-by: Simon Horman <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
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Adds CAN FD controller node for r8a7795.
Note: CAN FD controller register base address specified in R-Car Gen3
Hardware User Manual v0.5E is incorrect. The correct address is:
CAN FD - 0xe66c0000
Signed-off-by: Ramesh Shanmugasundaram <[email protected]>
Signed-off-by: Simon Horman <[email protected]>
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For consistency with a57_0/a57_1 cpu nodes, and all other nodes.
Signed-off-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Simon Horman <[email protected]>
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clk: renesas: Updates for v4.8 (take two)
- Add support for R-Car V2H,
- Add FDP1, DRIF, and thermal clocks on R-Car H3,
- Correct a wrong parent clock.
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git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64
The rk3399 gets support for its emmc controller as well as thermal,
i2c and core io-domain nodes and some reasonable default rates
for core clocks. The rk3368 also gets io-domains for its r88 board
as well as a small fix for the gic's memory regions.
* tag 'v4.8-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: add ap_pwroff and ddrio_pwroff pins for rk3399
arm64: dts: rockchip: Provide emmcclk to PHY for rk3399
arm64: dts: rockchip: Add soc-ctl-syscon to sdhci for rk3399
arm64: dts: rockchip: fixes the gic400 2nd region size for rk3368
arm64: dts: rockchip: add i2c nodes for rk3399
arm64: dts: rockchip: add thermal nodes for rk3399 SoCs
arm64: dts: rockchip: add rk3399 io-domain core nodes
arm64: dts: rockchip: add rk3368-r88 iodomains
arm64: dts: rockchip: add rk3368 io-domain core nodes
arm64: dts: rockchip: make rk3368 grf syscons simple-mfds
arm64: dts: rockchip: enable eMMC for rk3399 EVB
arm64: dts: rockchip: add sdhci/emmc for rk3399
arm64: dts: rockchip: make rk3399's grf a "simple-mfd"
arm64: dts: rockchip: assign default rates for core rk3399 clocks
Signed-off-by: Olof Johansson <[email protected]>
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Change the BUCK2 (vdd_atlas) voltage range to '500 - 1200mv' since
CPU DVFS requires it.
Signed-off-by: Abhilash Kesavan <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
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next/dt64
ARM64: DT: Hisilicon Hi6220 hikey board updates for 4.8
- name the GPIO lines
* tag 'hi6220-dt-for-4.8' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hikey: name the GPIO lines
Signed-off-by: Olof Johansson <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt64
The Freescale arm64 device tree updates for 4.8:
- Update address-cells and reg properties of cpu nodes, considering
MPIDR_EL1[63:32] bits are not used for CPUs identification on ls1043a
and ls2080a
- Adds the cache nodes and next-level-cache property for ls1043a and
ls2080a to get cacheinfo work on these platforms
- Add dma-coherent for ls1043a PCI nodes to utilize the hardware
capability on data coherency
- Add dis_rxdet_inp3_quirk property for USB3 device to disable rx
detection in P3 PHY mode
* tag 'imx-dt64-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: ls2080a: Add cache nodes for cacheinfo support
arm64: dts: ls1043a: Add cache nodes for cacheinfo support
arm64: dts: ls1043a: Add 'dma-coherent' for ls1043a PCI nodes
bindings: PCI: layerscape: Add 'dma-coherent' property
arm64: dts: ls1043a: Add dis_rxdet_inp3_quirk property to USB3 node
arm64: dts: ls2080a: Add dis_rxdet_inp3_quirk property to USB3 node
arm64: dts: fsl: Update address-cells and reg properties of cpu nodes
Signed-off-by: Olof Johansson <[email protected]>
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This pull request brings in the Raspberry Pi 3 DT for its arm64
support. Note that it also merges in the ethernet DT changes so that
the Pi3's ethernet can also get the MAC address.
Signed-off-by: Florian Fainelli <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt64
Qualcomm ARM64 Updates for v4.8
* Enable assorted peripherals on APQ8016 SBC
* Update reserved memory on MSM8916
* Add MSM8996 peripheral support
* Add SCM firmware node on MSM8916
* Add PMU node on MSM8916
* Add PSCI cpuidle support on MSM8916
* tag 'qcom-arm64-for-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: (22 commits)
arm64: dts: msm8996: add sdc2 support
arm64: dts: msm8996: add sdc2 pinctrl
arm64: dts: msm8996: add support to blsp2_spi5
arm64: dts: msm8996: add support to blsp2_spi5 pinctrl
arm64: dts: msm8996: add support to blsp1_spi0
arm64: dts: msm8996: add support to blsp1_spi0 pinctrl
arm64: dts: msm8996: add support to blsp2_i2c0
arm64: dts: msm8996: add support to blsp2_i2c0 pinctrl
arm64: dts: msm8996: add support to blsp2_i2c1
arm64: dts: msm8996: add blsp2_i2c1 pinctrl
arm64: dts: msm8996: add support to blsp1_i2c2 device
arm64: dts: msm8996: add blsp1_i2c2 pinctrl nodes.
arm64: dts: msm8996: add support blsp2_uart2
arm64: dts: msm8996: add blsp2_uart2 pinctrl nodes.
arm64: dts: msm8996: add blsp2_uart1 pinctrl
arm64: dts: msm8996: add msmgpio label
ARM: dts: msm8916: Update reserved-memory
arm64: dts: msm8916: Add SCM firmware node
arm64: dts: qcom: Add msm8916 PMU node
ARM64: dts: Add PSCI cpuidle support for MSM8916
...
Signed-off-by: Olof Johansson <[email protected]>
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https://github.com/AppliedMicro/xgene-next into next/dt64
First part of X-Gene DTS changes queued for v4.8
The changes include:
+ 2 clean-up and style-fix patches from Bjorn
+ Correct timer interrupt polarity for X-Gene 2
+ Remove unused qmlclk node on X-Gene 1
* tag 'xgene-dts-for-v4.8-part1' of https://github.com/AppliedMicro/xgene-next:
arm64: dts: apm: Remove unused qmlclk node on X-Gene 1
arm64: dts: apm: Fix timer interrupt polarity for X-Gene 2 SoC
arm64: dts: apm: Remove leading '0x' from unit addresses
arm64: dts: apm: Use lowercase consistently for hex constants
Signed-off-by: Olof Johansson <[email protected]>
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Add two new blocks of clocks. The peripheral clocks are the source clocks
of the peripheral of the Armada 3700 SoC.
Signed-off-by: Gregory CLEMENT <[email protected]>
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Add a new block of clocks. The Time Base Generators clocks can be the
parent of the peripheral clocks.
Signed-off-by: Gregory CLEMENT <[email protected]>
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The configuration of the clock depend of the gpio latch. This information
is stored in the gpio block registers. That's why the block is shared
using a syscon node.
Signed-off-by: Gregory CLEMENT <[email protected]>
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This adds basic chip support for MT6755 SoC.
Signed-off-by: Mars Cheng <[email protected]>
Signed-off-by: Matthias Brugger <[email protected]>
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This adds DT binding documentation for Mediatek MT6755.
Signed-off-by: Mars Cheng <[email protected]>
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Matthias Brugger <[email protected]>
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This commit adds the Device Tree description for the two XOR engines
found in the CP part of the Armada 7K/8K SoC.
Signed-off-by: Thomas Petazzoni <[email protected]>
Signed-off-by: Gregory CLEMENT <[email protected]>
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As suggested by Rob Herring, we should:
1/ Use a SoC-specific compatible string in addition to the more generic
one.
2/ The generic compatible string has been changed from
"marvell,mv-xor-v2" to "marvell,xor-v2".
We simply reflect the changes made to the Device Tree bindings to the
relevant Marvell 7K/8K Device Tree files.
Signed-off-by: Thomas Petazzoni <[email protected]>
Signed-off-by: Gregory CLEMENT <[email protected]>
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This names the GPIO lines on the HiKey board in accordance with
the 96Board Specification for especially the Low Speed External
Connector: "GPIO-A" thru "GPIO-L".
This will make these line names reflect through to userspace
so that they can easily be identified and used with the new
character device ABI.
Some care has been taken to name all lines, not just those used
by the external connectors, also lines that are muxed into some
other function than GPIO: these are named "[FOO]" so that users
can see with lsgpio what all lines are used for.
Cc: [email protected]
Cc: John Stultz <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: David Mandala <[email protected]>
Cc: Haojian Zhuang <[email protected]>
Cc: Wei Xu <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
Signed-off-by: Wei Xu <[email protected]>
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There are two sleep related pins on rk3399: ap_pwroff and ddrio_pwroff.
Let's add the definition of these two pins to rk3399's main dtsi file so
that boards can use them.
These two pins are similar to the global_pwroff and ddrio_pwroff pins in
rk3288 and are expected to be used in the same way: boards will likely
want to configure these pinctrl settings in their global pinctrl hog
list.
Note that on rk3288 there were two additional pins in the "sleep"
section: "ddr0_retention" and "ddr1_retention". On rk3288 designs these
pins appeared to actually route from rk3288 back to rk3288. Presumably
on rk3399 this is simply not needed since the pins don't appear to exist
there.
Signed-off-by: Douglas Anderson <[email protected]>
Signed-off-by: Heiko Stuebner <[email protected]>
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This patch adds support to sdc2 sdhci controller, which is used on some
of the boards.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch adds pinctrl required for sdhci for external sd card
controller.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch adds support to blsp2_spi5 device, which is used in some of
the APQ8096 based boards.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch adds pinctrl required for blsp2_spi5 device.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch adds support to blsp1_spi0 which is used on some of APQ8096
based boards.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch adds pinctrl nodes required for blsp1_spi0.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch adds support to blsp2_i2c0, which is used on some of the
APQ8096 based boards.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch adds support to blsp2_i2c0 pinctrl.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch adds support to blsp2_i2c1, which is used in one of the
apq8096 based boards.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch adds support to blsp2_i2c1 pinctrl nodes.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch adds blsp1_i2c2 support, as this bus is used on some of the
apq8096 boards.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch adds pinctrl nodes required for blsp1_i2c2.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch adds bslp2_uart2 node in soc so that boards that use this
uart can enable it.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch adds blsp2_uart2 pinctrl nodes.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch adds 2pin and 4 pin uart pinctrl support for blsp2_uart1
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This patch adds msmgpio label for pin and gpio controller so that
it can referenced in dedicated pins file and other board level gpios.
Signed-off-by: Srinivas Kandagatla <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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With the clock driver upstream, switch to the real clock.
Signed-off-by: Kevin Hilman <[email protected]>
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