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This is a workaround to let VCE soft reset work.
RB1_BUSY bit is always set, so remove its checking now, and we
will depend on RB0_BUSY currently.
After we find the root cause of RB1_BUSY, we can add it back.
Signed-off-by: Rex Zhu <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Chunming Zhou <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Chunming Zhou <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Partially undo changes made by commit:
drm/amd/amdgpu: don't track state in UVD clockgating
To keep bypass even if CG flags are not set.
Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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It's handled by DPM/PP properly.
Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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CG was being enabled in reverse sense from dpm/powerplay.
Also fix the default CLK_EN signal to enable all of the blocks.
Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Reviewed-by: Christian König <[email protected]>
Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This will make clock and power gated when no block decoded, for example
when paused during the playback.
Signed-off-by: Leo Liu <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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It's useful for debugging.
Signed-off-by: Marek Olšák <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Ken Wang <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Ken Wang <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Rex Zhu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Rex Zhu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Rex Zhu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Rex Zhu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Rex Zhu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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V2: fix the return value for fill failure and validate bo before
filling data
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Flora Cui <[email protected]>
Reviewed-by: Chunming Zhou <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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so that bo could be set to some pattern
Signed-off-by: Flora Cui <[email protected]>
Reviewed-by: Chunming Zhou <[email protected]>
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This got leftover somehow when I cleaned this up.
Reviewed-by: Christian König <[email protected]>
Reviewed-by: Chunming Zhou <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Reviewed-by: Edward O'Callaghan <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Eric Huang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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It's already covered by the default case, but add it for
consistency.
Reviewed-by: Alexandre Demers <[email protected]>
Reviewed-by: Edward O'Callaghan <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Looks like this got missed when we ported the code from radeon.
Reviewed-by: Edward O'Callaghan <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Cc: [email protected]
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Signed-off-by: Rex Zhu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Rex Zhu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Rex Zhu <[email protected]>
Reviewed-by: Alexandre Demers <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Enable the PG_EN bit just before the SMU would be tasked
with the PG transition.
Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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There's no need to track CG state anymore.
Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This is handled properly by both DPM and PP externally.
Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Adds support for PM locks around access to registers that might
have race conditions on PG transistions.
Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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UVD/VCE
This adds a mutex lock for both DPM/PP around the changes in
power gating state so that userspace can poll registers without
a race condition on power state.
Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Rex Zhu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Now that the implementation is complete.
Acked-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This patch adds DPM running checking back, because the DPM issue is
fixed.
Signed-off-by: Huang Rui <[email protected]>
Reviewed-by: Ken Wang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Huang Rui <[email protected]>
Reviewed-by: Ken Wang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Huang Rui <[email protected]>
Reviewed-by: Ken Wang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This patch adds the deep sleep initialization at DPM, it needs send a
message to SMC to enable this feature before enable voltage controller.
Signed-off-by: Huang Rui <[email protected]>
Reviewed-by: Ken Wang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Huang Rui <[email protected]>
Reviewed-by: Ken Wang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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It's able to enable iceland powerplay manually via the module
parameter. The default state is disabled.
Signed-off-by: Huang Rui <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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This patch introduces the iceland HW manager of powerplay which
includes HW manager, clockpowergating, thermal, and powertune.
Signed-off-by: Huang Rui <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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Signed-off-by: Huang Rui <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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The system management unit (SMU) is a subcomponent of the northbridge
that is responsible for a variety of system and power management tasks
during boot and runtime for GPU. In powerplay, it will be used on
firmware loading and power task management. This patch adds SMU
mananger for iceland.
Signed-off-by: Huang Rui <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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v2: cleanup headers, add copyright
Signed-off-by: Huang Rui <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
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