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2017-02-03crypto: chcr - Fix wrong typecastingHarsh Jain1-5/+4
Typecast the pointer with correct structure. Signed-off-by: Atul Gupta <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03crypto: chcr - Change algo priorityHarsh Jain1-1/+1
Update priorities to 3000 Signed-off-by: Harsh Jain <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03crypto: chcr - Change cra_flags for cipher algosHarsh Jain1-3/+3
Change cipher algos flags to CRYPTO_ALG_TYPE_ABLKCIPHER. Signed-off-by: Harsh Jain <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03crypto: chcr - Use cipher instead of Block Cipher in gcm setkeyHarsh Jain1-11/+9
1 Block of encrption can be done with aes-generic. no need of cbc(aes). This patch replaces cbc(aes-generic) with aes-generic. Signed-off-by: Harsh Jain <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03crypto: chcr - fix itnull.cocci warningsHarsh Jain1-1/+1
The first argument to list_for_each_entry cannot be NULL. Generated by: scripts/coccinelle/iterators/itnull.cocci Signed-off-by: Julia Lawall <[email protected]> Signed-off-by: Fengguang Wu <[email protected]> Signed-off-by: Harsh Jain <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03crypto: chcr - Change flow IDsHarsh Jain4-12/+24
Change assign flowc id to each outgoing request.Firmware use flowc id to schedule each request onto HW. FW reply may miss without this change. Reviewed-by: Hariprasad Shenai <[email protected]> Signed-off-by: Atul Gupta <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03crypto: atmel-sha - add verbose debug facilities to print hw register namesCyrille Pitchen1-2/+108
When VERBOSE_DEBUG is defined and SHA_FLAGS_DUMP_REG flag is set in dd->flags, this patch prints the register names and values when performing IO accesses. Signed-off-by: Cyrille Pitchen <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03crypto: atmel-authenc - add support to authenc(hmac(shaX), Y(aes)) modesCyrille Pitchen6-15/+883
This patchs allows to combine the AES and SHA hardware accelerators on some Atmel SoCs. Doing so, AES blocks are only written to/read from the AES hardware. Those blocks are also transferred from the AES to the SHA accelerator internally, without additionnal accesses to the system busses. Hence, the AES and SHA accelerators work in parallel to process all the data blocks, instead of serializing the process by (de)crypting those blocks first then authenticating them after like the generic crypto/authenc.c driver does. Of course, both the AES and SHA hardware accelerators need to be available before we can start to process the data blocks. Hence we use their crypto request queue to synchronize both drivers. Signed-off-by: Cyrille Pitchen <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03crypto: atmel-aes - fix atmel_aes_handle_queue()Cyrille Pitchen1-2/+5
This patch fixes the value returned by atmel_aes_handle_queue(), which could have been wrong previously when the crypto request was started synchronously but became asynchronous during the ctx->start() call. Signed-off-by: Cyrille Pitchen <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03crypto: atmel-sha - add support to hmac(shaX)Cyrille Pitchen2-1/+601
This patch adds support to the hmac(shaX) algorithms. Signed-off-by: Cyrille Pitchen <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03crypto: atmel-sha - add simple DMA transfersCyrille Pitchen1-0/+116
This patch adds a simple function to perform data transfer with the DMA controller. Signed-off-by: Cyrille Pitchen <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03crypto: atmel-sha - add atmel_sha_cpu_start()Cyrille Pitchen1-0/+90
This patch adds a simple function to perform data transfer with PIO, hence handled by the CPU. Signed-off-by: Cyrille Pitchen <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03crypto: atmel-sha - add SHA_MR_MODE_IDATAR0Cyrille Pitchen1-0/+1
This patch defines an alias macro to SHA_MR_MODE_PDC, which is not suited for DMA usage. Signed-off-by: Cyrille Pitchen <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03crypto: atmel-sha - add atmel_sha_wait_for_data_ready()Cyrille Pitchen1-0/+13
This patch simply defines a helper function to test the 'Data Ready' flag of the Status Register. It also gives a chance for the crypto request to be processed synchronously if this 'Data Ready' flag is already set when polling the Status Register. Indeed, running synchronously avoid the latency of the 'Data Ready' interrupt. When the 'Data Ready' flag has not been set yet, we enable the associated interrupt and resume processing the crypto request asynchronously from the 'done' task just as before. Signed-off-by: Cyrille Pitchen <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03crypto: atmel-sha - redefine SHA_FLAGS_SHA* flags to match SHA_MR_ALGO_SHA*Cyrille Pitchen2-13/+33
This patch modifies the SHA_FLAGS_SHA* flags: those algo flags are now organized as values of a single bitfield instead of individual bits. This allows to reduce the number of bits needed to encode all possible values. Also the new values match the SHA_MR_ALGO_SHA* values hence the algorithm bitfield of the SHA_MR register could simply be set with: mr = (mr & ~SHA_FLAGS_ALGO_MASK) | (ctx->flags & SHA_FLAGS_ALGO_MASK) Signed-off-by: Cyrille Pitchen <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03crypto: atmel-sha - make atmel_sha_done_task more genericCyrille Pitchen1-5/+16
This patch is a transitional patch. It updates atmel_sha_done_task() to make it more generic. Indeed, it adds a new .resume() member in the atmel_sha_dev structure. This hook is called from atmel_sha_done_task() to resume processing an asynchronous request. Signed-off-by: Cyrille Pitchen <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03crypto: atmel-sha - update request queue management to make it more genericCyrille Pitchen1-20/+54
This patch is a transitional patch. It splits the atmel_sha_handle_queue() function. Now atmel_sha_handle_queue() only manages the request queue and calls a new .start() hook from the atmel_sha_ctx structure. This hook allows to implement different kind of requests still handled by a single queue. Also when the req parameter of atmel_sha_handle_queue() refers to the very same request as the one returned by crypto_dequeue_request(), the queue management now gives a chance to this crypto request to be handled synchronously, hence reducing latencies. The .start() hook returns 0 if the crypto request was handled synchronously and -EINPROGRESS if the crypto request still need to be handled asynchronously. Besides, the new .is_async member of the atmel_sha_dev structure helps tagging this asynchronous state. Indeed, the req->base.complete() callback should not be called if the crypto request is handled synchronously. Signed-off-by: Cyrille Pitchen <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03crypto: atmel-sha - create function to get an Atmel SHA deviceCyrille Pitchen1-4/+11
This is a transitional patch: it creates the atmel_sha_find_dev() function, which will be used in further patches to share the source code responsible for finding a Atmel SHA device. Signed-off-by: Cyrille Pitchen <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03crypto: doc - Fix hash export state informationRabin Vincent2-7/+13
The documentation states that crypto_ahash_reqsize() provides the size of the state structure used by crypto_ahash_export(). But it's actually crypto_ahash_statesize() which provides this size. Signed-off-by: Rabin Vincent <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6Herbert Xu10-89/+96
Merge the crypto tree to pick up arm64 output IV patch.
2017-02-03crypto: chcr - Fix key length for RFC4106Harsh Jain1-2/+2
Check keylen before copying salt to avoid wrap around of Integer. Signed-off-by: Harsh Jain <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03crypto: algif_aead - Fix kernel panic on list_delHarsh Jain1-1/+1
Kernel panics when userspace program try to access AEAD interface. Remove node from Linked List before freeing its memory. Cc: <[email protected]> Signed-off-by: Harsh Jain <[email protected]> Reviewed-by: Stephan Müller <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03crypto: aesni - Fix failure when pcbc module is absentHerbert Xu1-4/+4
When aesni is built as a module together with pcbc, the pcbc module must be present for aesni to load. However, the pcbc module may not be present for reasons such as its absence on initramfs. This patch allows the aesni to function even if the pcbc module is enabled but not present. Reported-by: Arkadiusz Miśkiewicz <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03crypto: ccp - Fix double add when creating new DMA commandGary R Hook2-1/+6
Eliminate a double-add by creating a new list to manage command descriptors when created; move the descriptor to the pending list when the command is submitted. Cc: <[email protected]> Signed-off-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03crypto: ccp - Fix DMA operations when IOMMU is enabledGary R Hook1-1/+1
An I/O page fault occurs when the IOMMU is enabled on a system that supports the v5 CCP. DMA operations use a Request ID value that does not match what is expected by the IOMMU, resulting in the I/O page fault. Setting the Request ID value to 0 corrects this issue. Cc: <[email protected]> Signed-off-by: Gary R Hook <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03crypto: chcr - Check device is allocated before useHarsh Jain1-10/+8
Ensure dev is allocated for crypto uld context before using the device for crypto operations. Cc: <[email protected]> Signed-off-by: Atul Gupta <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-03crypto: chcr - Fix panic on dma_unmap_sgHarsh Jain2-23/+29
Save DMA mapped sg list addresses to request context buffer. Signed-off-by: Atul Gupta <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-02crypto: qat - zero esram only for DH85x devicesGiovanni Cabiddu1-2/+2
Zero embedded ram in DH85x devices. This is not needed for newer generations as it is done by HW. Cc: <[email protected]> Signed-off-by: Giovanni Cabiddu <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-02-02crypto: qat - fix bar discovery for c62xGiovanni Cabiddu2-1/+2
Some accelerators of the c62x series have only two bars. This patch skips BAR0 if the accelerator does not have it. Cc: <[email protected]> Signed-off-by: Giovanni Cabiddu <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-01-23crypto: vmx - disable preemption to enable vsx in aes_ctr.cLi Zhong1-0/+6
Some preemptible check warnings were reported from enable_kernel_vsx(). This patch disables preemption in aes_ctr.c before enabling vsx, and they are now consistent with other files in the same directory. Signed-off-by: Li Zhong <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-01-23crypto: mediatek - add support to GCM modeRyder Lee3-4/+369
This patch adds support to the GCM mode. Signed-off-by: Ryder Lee <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-01-23crypto: mediatek - add support to CTR modeRyder Lee1-5/+146
This patch adds support to the CTR mode. Signed-off-by: Ryder Lee <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-01-23crypto: mediatek - fix typo and indentationRyder Lee3-69/+63
Dummy patch to fix typo and indentation. Signed-off-by: Ryder Lee <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-01-23crypto: mediatek - regroup functions by usageRyder Lee1-131/+141
This patch only regroup functions by usage. This will help to integrate the GCM support patch later by adjusting some shared code section, such as common code which will be reused by GCM, AES mode setting, and DMA transfer. Signed-off-by: Ryder Lee <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-01-23crypto: mediatek - rework crypto request completionRyder Lee2-12/+16
This patch introduces a new callback 'resume' in the struct mtk_aes_rec. This callback is run to resume/complete the processing of the crypto request when woken up by AES interrupts when DMA completion. This callback will help implementing the GCM mode support in further patches. Signed-off-by: Ryder Lee <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-01-23crypto: mediatek - make crypto request queue management more genericRyder Lee2-36/+53
This patch changes mtk_aes_handle_queue() to make it more generic. The function argument is now a pointer to struct crypto_async_request, which is the common base of struct ablkcipher_request and struct aead_request. Also this patch introduces struct mtk_aes_base_ctx which will be the common base of all the transformation contexts. Hence the very same queue will be used to manage both block cipher and AEAD requests (such as gcm and authenc implemented in further patches). Signed-off-by: Ryder Lee <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-01-23crypto: mediatek - fix incorrect data transfer resultRyder Lee3-32/+47
This patch fixes mtk_aes_xmit() data transfer bug. The original function uses the same loop and ring->pos to handle both command and result descriptors. But this produces incomplete results when src.sg_len != dst.sg_len. To solve the problem, we splits the descriptors into different loops and uses cmd_pos and res_pos to record them respectively. Signed-off-by: Ryder Lee <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-01-23crypto: mediatek - move HW control data to transformation contextRyder Lee3-145/+126
This patch moves hardware control block members from mtk_*_rec to transformation context and refines related definition. This makes operational context to manage its own control information easily for each DMA transfer. Signed-off-by: Ryder Lee <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-01-23crypto: x86 - make constants readonly, allow linker to merge themDenys Vlasenko33-74/+229
A lot of asm-optimized routines in arch/x86/crypto/ keep its constants in .data. This is wrong, they should be on .rodata. Mnay of these constants are the same in different modules. For example, 128-bit shuffle mask 0x000102030405060708090A0B0C0D0E0F exists in at least half a dozen places. There is a way to let linker merge them and use just one copy. The rules are as follows: mergeable objects of different sizes should not share sections. You can't put them all in one .rodata section, they will lose "mergeability". GCC puts its mergeable constants in ".rodata.cstSIZE" sections, or ".rodata.cstSIZE.<object_name>" if -fdata-sections is used. This patch does the same: .section .rodata.cst16.SHUF_MASK, "aM", @progbits, 16 It is important that all data in such section consists of 16-byte elements, not larger ones, and there are no implicit use of one element from another. When this is not the case, use non-mergeable section: .section .rodata[.VAR_NAME], "a", @progbits This reduces .data by ~15 kbytes: text data bss dec hex filename 11097415 2705840 2630712 16433967 fac32f vmlinux-prev.o 11112095 2690672 2630712 16433479 fac147 vmlinux.o Merged objects are visible in System.map: ffffffff81a28810 r POLY ffffffff81a28810 r POLY ffffffff81a28820 r TWOONE ffffffff81a28820 r TWOONE ffffffff81a28830 r PSHUFFLE_BYTE_FLIP_MASK <- merged regardless of ffffffff81a28830 r SHUF_MASK <------------- the name difference ffffffff81a28830 r SHUF_MASK ffffffff81a28830 r SHUF_MASK .. ffffffff81a28d00 r K512 <- merged three identical 640-byte tables ffffffff81a28d00 r K512 ffffffff81a28d00 r K512 Use of object names in section name suffixes is not strictly necessary, but might help if someday link stage will use garbage collection to eliminate unused sections (ld --gc-sections). Signed-off-by: Denys Vlasenko <[email protected]> CC: Herbert Xu <[email protected]> CC: Josh Poimboeuf <[email protected]> CC: Xiaodong Liu <[email protected]> CC: Megha Dey <[email protected]> CC: [email protected] CC: [email protected] CC: [email protected] Signed-off-by: Herbert Xu <[email protected]>
2017-01-23crypto: x86/crc32c - fix %progbits -> @progbitsDenys Vlasenko1-1/+1
%progbits form is used on ARM (where @ is a comment char). x86 consistently uses @progbits everywhere else. Signed-off-by: Denys Vlasenko <[email protected]> CC: Herbert Xu <[email protected]> CC: Josh Poimboeuf <[email protected]> CC: Xiaodong Liu <[email protected]> CC: Megha Dey <[email protected]> CC: George Spelvin <[email protected]> CC: [email protected] CC: [email protected] CC: [email protected] Reviewed-by: Josh Poimboeuf <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-01-23crypto: arm/aes-neonbs - fix issue with v2.22 and older assemblerArd Biesheuvel1-4/+4
The GNU assembler for ARM version 2.22 or older fails to infer the element size from the vmov instructions, and aborts the build in the following way; .../aes-neonbs-core.S: Assembler messages: .../aes-neonbs-core.S:817: Error: bad type for scalar -- `vmov q1h[1],r10' .../aes-neonbs-core.S:817: Error: bad type for scalar -- `vmov q1h[0],r9' .../aes-neonbs-core.S:817: Error: bad type for scalar -- `vmov q1l[1],r8' .../aes-neonbs-core.S:817: Error: bad type for scalar -- `vmov q1l[0],r7' .../aes-neonbs-core.S:818: Error: bad type for scalar -- `vmov q2h[1],r10' .../aes-neonbs-core.S:818: Error: bad type for scalar -- `vmov q2h[0],r9' .../aes-neonbs-core.S:818: Error: bad type for scalar -- `vmov q2l[1],r8' .../aes-neonbs-core.S:818: Error: bad type for scalar -- `vmov q2l[0],r7' Fix this by setting the element size explicitly, by replacing vmov with vmov.32. Signed-off-by: Ard Biesheuvel <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-01-23crypto: tcrypt - Add debug printsRabin Vincent1-0/+6
tcrypt is very tight-lipped when it succeeds, but a bit more feedback would be useful when developing or debugging crypto drivers, especially since even a successful run ends with the module failing to insert. Add a couple of debug prints, which can be enabled with dynamic debug: Before: # insmod tcrypt.ko mode=10 insmod: can't insert 'tcrypt.ko': Resource temporarily unavailable After: # insmod tcrypt.ko mode=10 dyndbg tcrypt: testing ecb(aes) tcrypt: testing cbc(aes) tcrypt: testing lrw(aes) tcrypt: testing xts(aes) tcrypt: testing ctr(aes) tcrypt: testing rfc3686(ctr(aes)) tcrypt: all tests passed insmod: can't insert 'tcrypt.ko': Resource temporarily unavailable Signed-off-by: Rabin Vincent <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-01-23crypto: img-hash - use dma_data_direction when calling dma_map_sgNicolas Iooss1-2/+2
The fourth argument of dma_map_sg() and dma_unmap_sg() is an item of dma_data_direction enum. Function img_hash_xmit_dma() wrongly used DMA_MEM_TO_DEV, which is an item of dma_transfer_direction enum. Replace DMA_MEM_TO_DEV (which value is 1) with DMA_TO_DEVICE (which value is fortunately also 1) when calling dma_map_sg() and dma_unmap_sg(). Signed-off-by: Nicolas Iooss <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-01-23crypto: arm64/aes-blk - honour iv_out requirement in CBC and CTR modesArd Biesheuvel1-46/+42
Update the ARMv8 Crypto Extensions and the plain NEON AES implementations in CBC and CTR modes to return the next IV back to the skcipher API client. This is necessary for chaining to work correctly. Note that for CTR, this is only done if the request is a round multiple of the block size, since otherwise, chaining is impossible anyway. Cc: <[email protected]> # v3.16+ Signed-off-by: Ard Biesheuvel <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-01-23crypto: api - Clear CRYPTO_ALG_DEAD bit before registering an algSalvatore Benedetto1-0/+1
Make sure CRYPTO_ALG_DEAD bit is cleared before proceeding with the algorithm registration. This fixes qat-dh registration when driver is restarted Cc: <[email protected]> Signed-off-by: Salvatore Benedetto <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-01-13crypto: virtio - adjust priority of algorithmGonglei \(Arei\)1-1/+1
Some hardware accelerators (like intel aesni or the s390 cpacf functions) have lower priorities than virtio crypto, and those drivers are faster than the same in the host via virtio. So let's lower the priority of virtio-crypto's algorithm, make it's higher than software implementations but lower than the hardware ones. Suggested-by: Christian Borntraeger <[email protected]> Signed-off-by: Gonglei <[email protected]> Acked-by: Christian Borntraeger <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-01-13crypto: arm/aes - avoid reserved 'tt' mnemonic in asm codeArd Biesheuvel1-5/+5
The ARMv8-M architecture introduces 'tt' and 'ttt' instructions, which means we can no longer use 'tt' as a register alias on recent versions of binutils for ARM. So replace the alias with 'ttab'. Fixes: 81edb4262975 ("crypto: arm/aes - replace scalar AES cipher") Signed-off-by: Ard Biesheuvel <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-01-13hwrng: n2 - update version infoShannon Nelson1-4/+4
Signed-off-by: Shannon Nelson <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-01-13hwrng: n2 - support new hardware register layoutShannon Nelson2-46/+134
Add the new register layout constants and the requisite logic for using them. Signed-off-by: Shannon Nelson <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2017-01-13hwrng: n2 - add device data descriptionsShannon Nelson2-8/+54
Since we're going to need to keep track of more than just one attribute of the hardware, we'll change the use of the data field from the match struct from a single flag to a struct pointer. This patch adds the struct template and initial descriptions. Signed-off-by: Shannon Nelson <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
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