aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2022-04-21mei: add support for graphics system controller (gsc) devicesTomas Winkler5-2/+238
GSC is a graphics system controller, based on CSE, it provides a chassis controller for graphics discrete cards, as well as it supports media protection on selected devices. mei_gsc binds to a auxiliary devices exposed by Intel discrete driver i915. v2: fix error check in mei_gsc_probe v3: update MODULE_LICENSE ("GPL" is preferred over "GPL v2" and they both map to GPL version 2) Signed-off-by: Alexander Usyskin <[email protected]> Signed-off-by: Tomas Winkler <[email protected]> Reviewed-by: Daniele Ceraolo Spurio <[email protected]> Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Acked-by: Rodrigo Vivi <[email protected]> #v3 Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-21drm/i915/gsc: add gsc as a mei auxiliary deviceTomas Winkler15-1/+303
GSC is a graphics system controller, it provides a chassis controller for graphics discrete cards. There are two MEI interfaces in GSC: HECI1 and HECI2. Both interfaces are on the BAR0 at offsets 0x00258000 and 0x00259000. GSC is a GT Engine (class 4: instance 6). HECI1 interrupt is signaled via bit 15 and HECI2 via bit 14 in the interrupt register. This patch exports GSC as auxiliary device for mei driver to bind to for HECI2 interface and prepares for HECI1 interface as it will follow up soon. CC: Rodrigo Vivi <[email protected]> Signed-off-by: Tomas Winkler <[email protected]> Signed-off-by: Vitaly Lubart <[email protected]> Signed-off-by: Alexander Usyskin <[email protected]> Acked-by: Tvrtko Ursulin <[email protected]> Reviewed-by: Daniele Ceraolo Spurio <[email protected]> Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-21Merge drm/drm-next into drm-intel-gt-nextRodrigo Vivi150-3676/+4340
In order to get the GSC Support merged on drm-intel-gt-next in a clean fashion we needed this ATS-M patch to avoid conflict in i915_pci.c: commit 412c942bdfae ("drm/i915/ats-m: add ATS-M platform info") -- Fixing a silent conflict on drivers/gpu/drm/i915/gt/intel_gt_gmch.c: - if (!intel_vtd_active(i915)) + if (!i915_vtd_active(i915)) Signed-off-by: Rodrigo Vivi <[email protected]>
2022-04-21drm/i915/selftests: tweak the misaligned_caseMatthew Auld1-3/+9
The compact-pt layout restrictions should only apply to the ppGTT. Also make this play nice on platforms that only have the 64K GTT restriction, and not the compact-pt thing. Signed-off-by: Matthew Auld <[email protected]> Cc: Thomas Hellström <[email protected]> Cc: Nirmoy Das <[email protected]> Cc: Ramalingam C <[email protected]> Reviewed-by: Nirmoy Das <[email protected]> Reviewed-by: Ramalingam C <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-21drm/i915/selftests: fixup min_alignment usageMatthew Auld1-1/+1
Trying to cast the region id into the region type doesn't work too well, since the i915_vm_min_alignment() won't give us the correct value for the stolen-lmem case. Signed-off-by: Matthew Auld <[email protected]> Cc: Thomas Hellström <[email protected]> Cc: Nirmoy Das <[email protected]> Cc: Ramalingam C <[email protected]> Reviewed-by: Nirmoy Das <[email protected]> Reviewed-by: Ramalingam C <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-21drm/i915/buddy: sanity check the sizeMatthew Auld1-0/+1
Ensure we check that the size is compatible with the requested page_size. For tiny objects that are automatically annotated with TTM_PL_FLAG_CONTIGUOUS(since they fit within a single page), we currently end up silently overriding the min_page_size, which ends up hiding bugs elsewhere. Signed-off-by: Matthew Auld <[email protected]> Cc: Thomas Hellström <[email protected]> Cc: Nirmoy Das <[email protected]> Reviewed-by: Nirmoy Das <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-21drm/i915: consider min_page_size when migratingMatthew Auld2-1/+6
We can only force migrate an object if the existing object size is compatible with the new destinations min_page_size for the region. Currently we blow up with something like: [ 2857.497462] kernel BUG at drivers/gpu/drm/i915/gt/intel_migrate.c:431! [ 2857.497497] invalid opcode: 0000 [#1] PREEMPT SMP NOPTI [ 2857.497502] CPU: 1 PID: 8921 Comm: i915_selftest Tainted: G U W 5.18.0-rc1-drm-tip+ #27 [ 2857.497513] RIP: 0010:emit_pte.cold+0x11a/0x17e [i915] [ 2857.497646] Code: 00 48 c7 c2 f0 cd c1 a0 48 c7 c7 e9 99 bd a0 e8 d2 77 5d e0 bf 01 00 00 00 e8 08 47 5d e0 31 f6 bf 09 00 00 00 e8 3c 7b 4d e0 <0f> 0b 48 c7 c1 e0 2a c5 a0 ba 34 00 00 00 48 c7 c6 00 ce c1 a0 48 [ 2857.497654] RSP: 0018:ffffc900000f7748 EFLAGS: 00010246 [ 2857.497658] RAX: 0000000000000000 RBX: ffffc900000f77c8 RCX: 0000000000000006 [ 2857.497662] RDX: 0000000000000000 RSI: 0000000000000000 RDI: 0000000000000009 [ 2857.497665] RBP: 0000000000000000 R08: 0000000000000001 R09: 0000000000000001 [ 2857.497668] R10: 0000000000022302 R11: ffff88846dea08f0 R12: 0000000000010000 [ 2857.497672] R13: 0000000001880000 R14: 000000000000081b R15: ffff888106b7c040 [ 2857.497675] FS: 00007f0d4c4e0600(0000) GS:ffff88845da80000(0000) knlGS:0000000000000000 [ 2857.497679] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 2857.497682] CR2: 00007f113966c088 CR3: 0000000211e60003 CR4: 00000000003706e0 [ 2857.497686] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000 [ 2857.497689] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400 [ 2857.497692] Call Trace: [ 2857.497694] <TASK> [ 2857.497697] intel_context_migrate_copy+0x1e5/0x4f0 [i915] Signed-off-by: Matthew Auld <[email protected]> Cc: Thomas Hellström <[email protected]> Cc: Nirmoy Das <[email protected]> Reviewed-by: Nirmoy Das <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-20drm/i915/dg2: Add workaround 18019627453José Roberto de Souza1-0/+4
A new DG2 workaround added to fix some corner cases hangs. v2: - implementing the second and preferred option for this workaround BSpec: 54077 BSpec: 68173 BSpec: 71488 Cc: Matt Roper <[email protected]> Signed-off-by: José Roberto de Souza <[email protected]> Reviewed-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-19drm/i915/dg2: Enable Wa_22012727170/Wa_22012727685John Harrison2-0/+9
The above two workaronuds regarding context isolation are implemented by GuC. The KMD just needs to enable them. Signed-off-by: John Harrison <[email protected]> Reviewed-by: Umesh Nerlige Ramappa <[email protected]> Signed-off-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-19drm/i915/dg2: Enable Wa_14014475959 - RCS / CCS context exitMatthew Brost6-0/+65
There is bug in DG2 where if the CCS contexts switches out while the RCS is running it can cause memory corruption. To workaround this add an atomic to a memory address with a value 1 and semaphore wait to the same address for a value of 0. The GuC firmware is responsible for writing 0 to the memory address when it is safe for the context to switch out. Signed-off-by: Matthew Brost <[email protected]> Reviewed-by: John Harrison <[email protected]> Signed-off-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-19drm/i915/guc: Apply Wa_16011777198Vinay Belgaumkar2-0/+6
Enable GuC Wa to reset RCS/CCS before it goes into RC6. Signed-off-by: Vinay Belgaumkar <[email protected]> Reviewed-by: John Harrison <[email protected]> Signed-off-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-19drm/i915/guc: Enable GuC based workarounds for DG2John Harrison2-0/+16
There are some workarounds for DG2 that are implemented in the GuC firmware. However, the KMD is required to enable these by setting the appropriate flag as GuC does not know what platform it is running on. Wa_16011759253 Wa_14012630569 Wa_14013746162 Signed-off-by: John Harrison <[email protected]> CC: Matt Roper <[email protected]> Reviewed-by: Daniele Ceraolo Spurio <[email protected]> Signed-off-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-19drm/i915/guc: Enable Wa_22011802037 for gen12 GuC based platformsUmesh Nerlige Ramappa6-8/+116
Initiating a reset when the command streamer is not idle or in the middle of executing an MI_FORCE_WAKE can result in a hang. Multiple command streamers can be part of a single reset domain, so resetting one would mean resetting all command streamers in that domain. To workaround this, before initiating a reset, ensure that all command streamers within that reset domain are either IDLE or are not executing a MI_FORCE_WAKE. Enable GuC PRE_PARSER WA bit so that GuC follows the WA sequence when initiating engine-resets. For gt-resets, ensure that i915 applies the WA sequence. Opens to address in future patches: - The part of the WA to wait for pending forcewakes is also applicable to execlists backend. - The WA also needs to be applied for gen11 Signed-off-by: Umesh Nerlige Ramappa <[email protected]> Reviewed-by: Daniele Ceraolo Spurio <[email protected]> Signed-off-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-19drm/i915: Add Wa_22011802037 force cs haltTilak Tangudu2-0/+10
Prior to doing a reset, SW must ensure command streamer is stopped, as a workaround, to eliminate a race condition in GPM flow. Setting both the ring stop and prefetch disable bits, will cause the command streamer to halt. Signed-off-by: Tilak Tangudu <[email protected]> Reviewed-by: John Harrison <[email protected]> Signed-off-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-15drm/i915/hwconfig: Add DG2 supportRodrigo Vivi1-0/+2
v2: * Jordan: Drop stepping/skew checking as suggested by John. Signed-off-by: Rodrigo Vivi <[email protected]> Signed-off-by: John Harrison <[email protected]> Signed-off-by: Ramalingam C <[email protected]> Tested-by: Jordan Justen <[email protected]> Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: John Harrison <[email protected]> Signed-off-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-15drm/i915: Don't show engine information in fdinfo with GuC submissionAshutosh Dixit1-1/+5
At present i915 does not fetch busyness information from GuC, resulting in incorrect busyness values in fdinfo. Because engine information is coupled with busyness in fdinfo, skip showing client engine information in fdinfo with GuC submission till fetching busyness is supported in the i915 GuC submission backend. v2 (Daniele): Make commit title and description more precise Add FIXME with brief description at code change s/intel_guc_submission_is_used/intel_uc_uses_guc_submission/ v3 (Daniele): Drop FIXME in comment Bug: https://gitlab.freedesktop.org/drm/intel/-/issues/5564 Fixes: 055634e4b62f ("drm/i915: Expose client engine utilisation via fdinfo") Cc: Daniele Ceraolo Spurio <[email protected]> Cc: Umesh Nerlige Ramappa <[email protected]> Signed-off-by: Ashutosh Dixit <[email protected]> Reviewed-by: Daniele Ceraolo Spurio <[email protected]> Signed-off-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/b614c2c61a954de06fbe2c3a7c70d3a91804407e.1649982207.git.ashutosh.dixit@intel.com
2022-04-15drm/i915/guc/slpc: Use i915_probe_error instead of drm_errVinay Belgaumkar1-21/+21
This will ensure we don't have false positives when we run error injection tests. Signed-off-by: Vinay Belgaumkar <[email protected]> Reviewed-by: Anshuman Gupta <[email protected]> Signed-off-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-15drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICESMatt Atwood2-23/+75
Newer platforms have DSS that aren't necessarily available for both geometry and compute, two queries will need to exist. This introduces the first, when passing a valid engine class and engine instance in the flags returns a topology describing geometry. Based on past discussion, we currently only support this new query item on Xe_HP and beyond; earlier platforms do not need to worry about geometry and compute pipelines having access to different topology and should continue to use the existing topology query. v2: fix white space errors v3: change flags from hosting 2 8 bit numbers to holding a i915_engine_class_instance struct v4: add error if non rcs engine passed. v5 (by MattR): - Improve kerneldoc and cross references to related structs/enums. (Daniel) - Clarify that geometry query is only supported on render engines (Francisco) - Clarify that the new query is only supported on Xe_HP+. - Fix checkpatch warnings. Cc: Ashutosh Dixit <[email protected]> Cc: Matt Roper <[email protected]> Cc: Joonas Lahtinen <[email protected]> Cc: Francisco Jerez <[email protected]> UMD (mesa): https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14143 Testcase: igt@i915_query@test-query-geometry-subslices Signed-off-by: Matt Atwood <[email protected]> Signed-off-by: Matt Roper <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-15drm/i915/doc: Link query items to their uapi structsMatt Roper1-14/+20
Document the possible options for drm_i915_query_item.query_id with links to the corresponding uapi structures. Signed-off-by: Matt Roper <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-15drm/i915/doc: Convert perf UAPI comments to kerneldocMatt Roper1-30/+86
Convert the comments for drm_i915_query_perf_config and drm_i915_perf_oa_config to kerneldoc so that they will show up in the generated documentation. Also correct a couple places that referred to query_id when they actually meant to refer to query_item.flags. Signed-off-by: Matt Roper <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-15drm/i915/doc: Convert drm_i915_query_topology_info comment to kerneldocMatt Roper1-32/+78
This structure has a great comment describing the fields, but it's not currently in kerneldoc form and does not show up in the generated documentation. Let's fix that and also clarify the description of what "subslice" refers to on gen12 platforms and beyond and that "slice" is no longer meaningful on Xe_HP and beyond. Signed-off-by: Matt Roper <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-14drm/i915/guc: Update to GuC version 70.1.1John Harrison6-203/+293
The latest GuC firmware drops the context descriptor pool in favour of passing all creation data in the create H2G. It also greatly simplifies the work queue and removes the process descriptor used for multi-LRC submission. So, remove all mention of LRC and process descriptors and update the registration code accordingly. Unfortunately, the new API also removes the ability to set default values for the scheduling policies at context registration time. Instead, a follow up H2G must be sent. The individual scheduling policy update H2G commands are also dropped in favour of a single KLV based H2G. So, change the update wrappers accordingly and call this during context registration.. Of course, this second H2G per registration might fail due to being backed up. The registration code has a complicated state machine to cope with the actual registration call failing. However, if that works then there is no support for unwinding if a further call should fail. Unwinding would require sending a H2G to de-register - but that can't be done because the CTB is already backed up. So instead, add a new flag to say whether the context has a pending policy update. This is set if the policy H2G fails at registration time. The submission code checks for this flag and retries the policy update if set. If that call fails, the submission path early exists with a retry error. This is something that is already supported for other reasons. Signed-off-by: John Harrison <[email protected]> Reviewed-by: Daniele Ceraolo Spurio <[email protected]> Signed-off-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-14drm/i915/migrate: Evict and restore the flatccs capable lmem objRamalingam C1-4/+160
When we are swapping out the local memory obj on flat-ccs capable platform, we need to capture the ccs data too along with main meory and we need to restore it when we are swapping in the content. When lmem object is swapped into a smem obj, smem obj will have the extra pages required to hold the ccs data corresponding to the lmem main memory. So main memory of lmem will be copied into the initial pages of the smem and then ccs data corresponding to the main memory will be copied to the subsequent pages of smem. ccs data is 1/256 of lmem size. Swapin happens exactly in reverse order. First main memory of lmem is restored from the smem's initial pages and the ccs data will be restored from the subsequent pages of smem. Extracting and restoring the CCS data is done through a special cmd called XY_CTRL_SURF_COPY_BLT v2: Fixing the ccs handling v3: Handle the ccs data at same loop as main memory [Thomas] v4: changes for emit_copy_ccs v5: handle non-flat-ccs scenario Signed-off-by: Ramalingam C <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-14drm/i915/gem: Add extra pages in ttm_tt for ccs dataRamalingam C1-1/+29
On Xe-HP and later devices, dedicated compression control state (CCS) stored in local memory is used for each surface, to support the 3D and media compression formats. The memory required for the CCS of the entire local memory is 1/256 of the local memory size. So before the kernel boot, the required memory is reserved for the CCS data and a secure register will be programmed with the CCS base address So when an object is allocated in local memory, dont need to explicitly allocate the space for ccs data. But when the obj is evicted into the smem, to hold the compression related data along with the obj extra space is needed in smem. i.e obj_size + (obj_size/256). Hence when a smem pages are allocated for an obj with lmem placement possibility we create with the extra pages required for the ccs data for the obj size. v2: Used imperative wording [Thomas] v3: Inflate the pages only when obj's placement is lmem only v4: GEM_BUG_ON if the ttm->num_pages > obj page size [Thomas] Signed-off-by: Ramalingam C <[email protected]> cc: Christian Koenig <[email protected]> cc: Hellstrom Thomas <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]> Reviewed-by: Nirmoy Das <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-14drm/i915/selftest_migrate: Check CCS meta data clearRamalingam C1-28/+222
Extend the live migrate selftest, to verify the ccs surface clearing during the Flat-CCS capable lmem obj clear. v2: Look at right places for ccs data [Thomas] Signed-off-by: Ramalingam C <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-14drm/i915/selftest_migrate: Consider the possible roundup of sizeRamalingam C1-0/+3
Consider the possible round up happened at obj size alignment to min_page_size during the obj allocation. Signed-off-by: Ramalingam C <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-14drm/i915/gt: Clear compress metadata for Flat-ccs objectsRamalingam C2-1/+152
Xe-HP and latest devices support Flat CCS which reserved a portion of the device memory to store compression metadata, during the clearing of device memory buffer object we also need to clear the associated CCS buffer. XY_CTRL_SURF_COPY_BLT is a BLT cmd used for reading and writing the ccs surface of a lmem memory. So on Flat-CCS capable platform we use XY_CTRL_SURF_COPY_BLT to clear the CCS meta data. v2: Fixed issues with platform naming [Lucas] v3: Rebased [Ram] Used the round_up funcs [Bob] v4: Fixed ccs blk calculation [Ram] Added Kdoc on flat-ccs. v5: GENMASK is used [Matt] mocs fix [Matt] Comments Fix [Matt] Flush address programming [Ram] v6: FLUSH_DW is fixed Few coding style fix v7: Adopting the XY_FAST_COLOR_BLT (Thomas] v8: XY_CTRL_SURF_COPY_BLT for ccs clearing. v9: emit_copy_ccs is used. v10: ctrl_surf cmds are filled in caller itself. [Thomas] only one ctrl surf cmd is used as size of lmem is <=8M [Thomas] Signed-off-by: Ramalingam C <[email protected]> Signed-off-by: Ayaz A Siddiqui <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-14drm/i915/gt: Pass the -EINVAL when emit_pte doesn't update any PTERamalingam C1-1/+5
When emit_pte doesn't update any PTE with return value as 0, interpret it as -EINVAL. v2: Add missing goto [Thomas] Signed-off-by: Ramalingam C <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-14drm/i915/gt: Optimize the migration and clear loopRamalingam C1-17/+17
Move the static calculations out of the loops for copy and clear. v2: Fix the loss of proper error code on emit_pte Signed-off-by: Ramalingam C <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-14drm/i915/gt: Use XY_FAST_COLOR_BLT to clear obj on graphics ver 12+Ramalingam C2-5/+43
Use faster XY_FAST_COLOR_BLT cmd on graphics version of 12 and more, for clearing (Zero out) the pages of the newly allocated object. XY_FAST_COLOR_BLT is faster than the older XY_COLOR_BLT. v2: Typo fix at title [Thomas] v3: XY_FAST_COLOR_BLT is used only for FLAT_CCS capable gen12+ Signed-off-by: Ramalingam C <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-14drm/i915/gt: use engine instance directly for offsetRamalingam C1-7/+4
To make it uniform across copy and clear, use the engine offset directly to calculate the offset in the cmd forming for emit_clear. Signed-off-by: Ramalingam C <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-14Merge tag 'drm-intel-next-2022-04-13-1' of ↵Dave Airlie149-3676/+4340
git://anongit.freedesktop.org/drm/drm-intel into drm-next drm/i915 feature pull for v5.19: Features and functionality: - Add support for new Tile 4 format on DG2 (Stan) - Add support for new CCS clear color compression on DG2 (Mika, Juha-Pekka) - Add support for new render and media compression formats on DG2 (Matt) - Support multiple eDP and LVDS native mode refresh rates (Ville) - Support static DRRS (Ville) - ATS-M platform info (Matt) - RPL-S PCI IDs (Tejas) - Extend DP HDR support to HSW+ (Uma) - Bump ADL-P DMC version to v2.16 (Madhumitha) - Let users disable PSR2 while enabling PSR1 (José) Refactoring and cleanups: - Massive DRRS and panel fixed mode refactoring and cleanups (Ville) - Power well refactoring and cleanup (Imre) - Clean up and refactor crtc readout and compute config (Ville) - Use kernel string helpers (Lucas) - Refactor gmbus pin lookups and allocation (Jani) - PCH display cleanups (Ville) - DPLL and DPLL manager refactoring (Ville) - Include and header refactoring (Jani, Tvrtko) - DMC abstractions (Jani) - Non-x86 build refactoring (Casey) - VBT parsing refactoring (Ville) - Bigjoiner refactoring (Ville) - Optimize plane, pfit, scaler, etc. programming using unlocked writes (Ville) - Split several register writes in commit to noarm+arm pairs (Ville) - Clean up SAGV handling (Ville) - Clean up bandwidth and ddb allocation (Ville) - FBC cleanups (Ville) Fixes: - Fix native HDMI and DP HDMI DFP clock limits on deep color/4:2:0 (Ville) - Fix DMC firmware platform check (Lucas) - Fix cursor coordinates on bigjoiner secondary (Ville) - Fix MSO vs. bigjoiner timing confusion (Ville) - Fix ADL-P eDP voltage swing (José) - Fix VRR capability property update (Manasi) - Log DG2 SNPS PHY calibration errors (Matt, Lucas) - Fix PCODE request status checks (Stan) - Fix uncore unclaimed access warnings (Lucas) - Fix VBT new max TMDS clock parsing (Shawn) - Fix ADL-P non-existent underrun recovery (Swathi Dhanavanthri) - Fix ADL-N stepping info (Tejas) - Fix DPT mapping flags to contiguous (Stan) - Fix DG2 max display bandwidth (Vinod) - Fix DP low voltage SKU checks (Ankit) - Fix RPL-S VT-d translation enable via quirk (Tejas) - Fixes to PSR2 (José) - Fix PIPE_MBUS_DBOX_CTL programming (José) - Fix LTTPR capability read/check on DP 1.2 (Imre) - Fix ADL-P register corruption after DDI clock enabling (Imre) - Fix ADL-P MBUS DBOX BW and B credits (Caz) Merges: - Backmerge drm-next (Rodrigo, Jani) Signed-off-by: Dave Airlie <[email protected]> From: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-13drm/i915/fbc: Call intel_fbc_activate() directly from frontbuffer flushVille Syrjälä1-1/+1
Remove the pointless detour via __intel_fbc_post_update() during frontbuffer flush. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Mika Kahola <[email protected]>
2022-04-13drm/i915/fbc: Introduce intel_fbc_sanitize()Ville Syrjälä3-12/+19
Let's make sure FBC is always disabled when we start to take over the hardware state. I suspect this should never really happen, since the only time when we really should be taking over with the display already active is when the previous state was progammed by the BIOS, which likely shouldn't use FBC. This could be driver init, or S4 resume when the boot kernel doesn't load i915. But I suppose no harm in keeping this code around for exra safety since it's quite trivial. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Mika Kahola <[email protected]>
2022-04-13drm/i915/fbc: Remove intel_fbc_global_disable()Ville Syrjälä4-26/+0
By the time intel_fbc_global_disable() gets called during driver teardown we should have already disabled all the crtcs, so no way FBC should be enabled at this point. And I have no idea what the other user (i915_restore_display()) is even trying to achieve. So let's just throw intel_fbc_global_disable() into the bin. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Mika Kahola <[email protected]>
2022-04-13drm/i915: Remove remaining locks from i9xx plane udpatesVille Syrjälä1-12/+0
Now that fbc no longer nukes while a flip is pending we can remove the last uncore.lock from the i9xx plane code. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Mika Kahola <[email protected]>
2022-04-13drm/i915/fbc: Skip nuke when flip is pendingVille Syrjälä1-2/+8
Don't issue a nuke from frontbuffer flush while a flip is pending. This avoids the DSPADDR/DSPSURF rmw abuse from the pre-snb nuke from racing with the DSPADDR/DSPSURF write being performed by the flip/plane update. The flip itself will already cause the nuke so a double nuke is redundant. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Mika Kahola <[email protected]>
2022-04-13drm/i915/fbc: Streamline frontbuffer busy bits handlingVille Syrjälä1-10/+18
If the frontbuffer bits say this fbc instance isn't affected just skip the whole thing. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Mika Kahola <[email protected]>
2022-04-13drm/i915/fbc: Eliminate possible_framebuffer_bitsVille Syrjälä1-6/+1
Not sure what the point of this fbc->possible_frontbuffer_bits is. And especially don't see why it's returning all the bits when fbc is not even enabled. So let's just get rid of this and only say we are interested in the plane's frontbuffer bits when fbc is actually enabled. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Mika Kahola <[email protected]> Acked-by: Jani Nikula <[email protected]>
2022-04-12drm/i915/display/vrr: Reset VRR capable property on a long hpdManasi Navare1-6/+11
With some VRR panels, user can turn VRR ON/OFF on the fly from the panel settings. When VRR is turned OFF ,sends a long HPD to the driver clearing the Ignore MSA bit in the DPCD. Currently the driver parses that onevery HPD but fails to reset the corresponding VRR Capable Connector property. Hence the userspace still sees this as VRR Capable panel which is incorrect. Fix this by explicitly resetting the connector property. v2: Reset vrr capable if status == connector_disconnected v3: Use i915 and use bool vrr_capable (Jani Nikula) v4: Move vrr_capable to after update modes call (Jani N) Remove the redundant comment (Jan N) v5: Fixes the regression on older platforms by resetting the VRR only if HAS_VRR v6: Remove the checks from driver, add in drm core before setting VRR prop (Ville) v7: Move VRR set/reset to set/unset_edid (Ville) Cc: Jani Nikula <[email protected]> Cc: Ville Syrjälä <[email protected]> Fixes: 9bc34b4d0f3c ("drm/i915/display/vrr: Reset VRR capable property on a long hpd") Signed-off-by: Manasi Navare <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-12drm/i915/dg2: Add support for DG2 clear color compressionJuha-Pekka Heikkilä3-17/+52
Add support for the DG2 specific render compression with clear color framebuffer format. DG2 onwards discrete gfx has support for new flat CCS mapping, which brings in display feature in to avoid Aux walk for compressed surface. This support build on top of Flat CCS support added in XEHPSDV. FLAT CCS surface base address should be 64k aligned, Compressed displayable surfaces must use tile4 format. HAS: 1407880786 B.Spec : 7655 B.Spec : 53902 v2: Merge all bits required for the support of functionality into this patch from the patch adding the corresponding modifier. Cc: Mika Kahola <[email protected]> Signed-off-by: Anshuman Gupta <[email protected]> Signed-off-by: Juha-Pekka Heikkilä <[email protected]> Signed-off-by: Ramalingam C <[email protected]> Signed-off-by: Imre Deak <[email protected]> Acked-by: Anshuman Gupta <[email protected]> Reviewed-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-12drm/fourcc: Introduce format modifier for DG2 clear colorMika Kahola1-0/+14
DG2 clear color render compression uses Tile4 layout. Therefore, we need to define a new format modifier for uAPI to support clear color rendering. v2: Display version is fixed. [Imre] KDoc is enhanced for cc modifier. [Nanley & Lionel] v3: Split out the modifier addition to a separate patch. Clarify the modifier layout description. Cc: [email protected] Signed-off-by: Mika Kahola <[email protected]> cc: Anshuman Gupta <[email protected]> Signed-off-by: Juha-Pekka Heikkilä <[email protected]> Signed-off-by: Ramalingam C <[email protected]> Signed-off-by: Imre Deak <[email protected]> Acked-by: Nanley Chery <[email protected]> Reviewed-by: Juha-Pekka Heikkila <[email protected]> Acked-by: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-12drm/i915/dg2: Add support for DG2 render and media compressionMatt Roper2-4/+35
Add support for DG2 render and media compression, for the description of buffer layouts see the previous patch adding the corresponding frame buffer modifiers. v2: Display version fix [Imre] v3: Split out modifier addition to separate patch. Signed-off-by: Matt Roper <[email protected]> cc: Radhakrishna Sripada <[email protected]> Signed-off-by: Mika Kahola <[email protected]> cc: Anshuman Gupta <[email protected]> Signed-off-by: Juha-Pekka Heikkilä <[email protected]> Signed-off-by: Ramalingam C <[email protected]> Signed-off-by: Imre Deak <[email protected]> Reviewed-by: Juha-Pekka Heikkila <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-12drm/fourcc: Introduce format modifiers for DG2 render and media compressionMatt Roper1-0/+22
The render/media engines on DG2 unify render compression and media compression into a single format for the first time, using the Tile 4 layout for main surfaces. The compression algorithm is different from any previous platform and the display engine must still be configured to decompress either a render or media compressed surface; as such, we need new RC and MC framebuffer modifiers to represent buffers in this format. v2: Clarify modifier layout description. Cc: [email protected] Signed-off-by: Matt Roper <[email protected]> Signed-off-by: Imre Deak <[email protected]> Acked-by: Nanley Chery <[email protected]> Reviewed-by: Juha-Pekka Heikkila <[email protected]> Acked-by: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-12Merge drm/drm-next into drm-intel-gt-nextJoonas Lahtinen12554-274129/+773961
Pull in TTM changes needed for DG2 CCS enabling from Ram. Signed-off-by: Joonas Lahtinen <[email protected]>
2022-04-12Merge tag 'drm-misc-next-2022-04-07' of ↵Dave Airlie195-2763/+5768
git://anongit.freedesktop.org/drm/drm-misc into drm-next drm-misc-next for 5.19: UAPI Changes: Cross-subsystem Changes: Core Changes: - atomic: Add atomic_print_state to private objects - edid: Constify the EDID parsing API, rework of the API - dma-buf: Add dma_resv_replace_fences, dma_resv_get_singleton, make dma_resv_excl_fence private - format: Support monochrome formats - fbdev: fixes for cfb_imageblit and sys_imageblit, pagelist corruption fix - selftests: several small fixes - ttm: Rework bulk move handling Driver Changes: - Switch all relevant drivers to drm_mode_copy or drm_mode_duplicate - bridge: conversions to devm_drm_of_get_bridge and panel_bridge, autosuspend for analogix_dp, audio support for it66121, DSI to DPI support for tc358767, PLL fixes and I2C support for icn6211 - bridge_connector: Enable HPD if supported - etnaviv: fencing improvements - gma500: GEM and GTT improvements, connector handling fixes - komeda: switch to plane reset helper - mediatek: MIPI DSI improvements - omapdrm: GEM improvements - panel: DT bindings fixes for st7735r, few fixes for ssd130x, new panels: ltk035c5444t, B133UAN01, NV3052C - qxl: Allow to run on arm64 - sysfb: Kconfig rework, support for VESA graphic mode selection - vc4: Add a tracepoint for CL submissions, HDMI YUV output, HDMI and clock improvements - virtio: Remove restriction of non-zero blob_flags, - vmwgfx: support for CursorMob and CursorBypass 4, various improvements and small fixes [airlied: fixup conflict with newvision panel callbacks] Signed-off-by: Dave Airlie <[email protected]> From: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20220407085940.pnflvjojs4qw4b77@houat
2022-04-12drm/i915/bios: Validate the panel_name tableVille Syrjälä2-1/+22
In addition to the fp_timing,dvo_timing,panel_pnp_id tables there also exists a panel_name table. Unlike the others this is just one offset+table_size even though there are still 16 actual panel_names in the data block. The panel_name table made its first appearance somewhere around VBT version 156-163. The exact version is not known. But we don't need to know that since we can just check whether the pointers block has enough room for it or not. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2022-04-12drm/i915/bios: Trust the LFP data pointersVille Syrjälä1-44/+16
Now that we've sufficiently validated the LFP data pointers we can trust them. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2022-04-12drm/i915/bios: Validate LFP data table pointersVille Syrjälä1-1/+81
Make sure the LFP data table pointers sane. Sensible looking table entries, everything points correctly into the data block, etc. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2022-04-12drm/i915/bios: Use the copy of the LFP data table alwaysVille Syrjälä1-7/+34
Currently get_lvds_fp_timing() still returns a pointer to the original data block rather than our copy. Let's convert the data pointer offsets to be relative to the data block rather than the whole BDB. With that we can make get_lvds_fp_timing() return a pointer to the copy. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
Powered by cgit, Gruvboxed by Blaster4385.