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2020-01-20platform/x86: asus-nb-wmi: Support left round button on N56VBPaul Cercueil1-0/+1
The N56VB laptop has a round button located on the left side above the keyboard. Map it to F13 since it does not have any predeterminated purpose. Signed-off-by: Paul Cercueil <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-20tools/power/x86/intel-speed-select: Update versionSrinivas Pandruvada1-1/+1
As we added new set of mailbox commands, increment version. Signed-off-by: Srinivas Pandruvada <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-20tools/power/x86/intel-speed-select: Change the order for clos disableSrinivas Pandruvada1-16/+14
In turbo-freq or base-freq auto mode, for disable, first disable the feature and then disable clos. Signed-off-by: Srinivas Pandruvada <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-20tools/power/x86/intel-speed-select: Fix result display for turbo-freq auto modeSrinivas Pandruvada2-8/+10
The turbo-freq enable with auto mode, prints result for the last possible CPU, which is not correct when either CPU is not present or user wants command to be limited to a single die/package. For example, in the below command user wants to limit to die/package 0, but the "turbo-freq --auto" result is displayed using the other package. $ sudo intel-speed-select -c 0 turbo-freq enable -a Intel(R) Speed Select Technology package-0 die-0 cpu-0 turbo-freq enable:success package--1 die-0 cpu-31 turbo-freq --auto enable:success Since we do have to traverse all CPUs, don't display CPU info for "turbo-freq --auto", as we already displayed the result for turbo-freq enable with the CPU information. With the fix, the same command results in: $ sudo intel-speed-select -c 0 turbo-freq enable -a Intel(R) Speed Select Technology package-0 die-0 cpu-0 turbo-freq enable:success turbo-freq --auto enable:success Signed-off-by: Srinivas Pandruvada <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-20tools/power/x86/intel-speed-select: Add support for core-power discoverySrinivas Pandruvada3-0/+72
It is possible that BIOS may not enable core-power feature. In this case this additional interface will allow to enable from this utility. Also the information dump, includes the current status of core-power. Signed-off-by: Srinivas Pandruvada <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-20platform/x86: ISST: Allow additional core-power mailbox commandsSrinivas Pandruvada1-0/+3
To discover core-power capability, some new mailbox commands are added. Allow those commands to execute. Signed-off-by: Srinivas Pandruvada <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-13platform/x86: mlx-platform: Add support for next generation systemsVadim Pasternak1-0/+180
Add support for new Mellanox system types of basic class VMOD0010, containing new Mellanox systems equipped with new switch device Spectrum 3 (32x400GbE/64x200G/128x100G Ethernet switch). These are the Top of the Rack 1U/2U/4U systems, equipped with Mellanox Comex card and with the switch board with Mellanox Spectrum-3 device. This class of devices can be equipped with two PS units for 1U/2U or with four PS units for 4U systems. Signed-off-by: Vadim Pasternak <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-13platform/mellanox: mlxreg-hotplug: Add support for new capability registerVadim Pasternak2-0/+16
Add support for capability register, which is used for detection of the actual number of interrupt capable components within the particular group, supported by the specific system. Such components could be for example the number of power units and interrupts related to these units. The motivation is to avoid adding a new code in the future in order to distinct between the systems type supported different number of the components like power supplies, FANs, ASICs, line cards. Signed-off-by: Vadim Pasternak <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-13platform/x86: mlx-platform: Add support for new capability registerVadim Pasternak1-0/+7
Add support for capability register, which contains information about the number of PS units equipped on the system and about minimum I2C frequency supported by the all system's I2C devices. Utilization of this register allows to avoid necessity of providing new system description, in case it differs in number of PS units or in minimal I2C frequency. Signed-off-by: Vadim Pasternak <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-13platform/x86: mlx-platform: Add support for new system typeVadim Pasternak1-1/+238
Add support for new Mellanox system types of basic class VMOD0009, containing Mellanox systems equipped with the switch devices Spectrum 1 (32x100GbE Ethernet switch) and Switch-IB/Switch-IB2 (36x100Gbe InfiniBand switch). These are the Top of the Rack system, equipped with Mellanox Comex card. Signed-off-by: Vadim Pasternak <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-13platform/x86: mlx-platform: Set system mux configuration based on system typeVadim Pasternak1-12/+32
Separate assignment for systems mux configuration based on system type, instead of setting the same configuration for the all. The motivation is to allow introduction of new systems types with the different mux topology. Signed-off-by: Vadim Pasternak <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-13Documentation/ABI: Add new attribute for mlxreg-io sysfs interfacesVadim Pasternak1-0/+63
Add documentation for the new attributes for: - Exposing reset causes types asserted by: platform reset, SoC reset, AC power failure, software power off request. - Setting and removing system VPD (EEPROM) hardware write protection. - Voltage regulator devices configuration update status and firmware version. - Setting PCIe ASIC reset to disable or enable state during PCIe root complex reset. - System static topology identification, like system's static I2C topology, number and type of FPGA devices within the system and so on. Signed-off-by: Vadim Pasternak <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-13platform/x86: mlx-platform: Add more definitions for system attributesVadim Pasternak1-0/+84
Add new attributes for "next-generation" type systems: - Reset cause indication, when system reset has been caused by the platform reset request through CPLD, by AC power failure, by software power off request through CPLD. by signal asserted by SOC through ACPI register. It introduces more reset causes, which can be monitored after the reboots. - Setting and removing system VPD (EEPROM) hardware write protection. It allows to access VPD during production cycle and prevents VPD corruption on system in field. - Voltage regulator devices configuration update status and version. It allows to monitor configuration update status and current active version for such sort of devices. - PCIe ASIC reset disable - when set ASIC will go down upon PCIe root complex reset, otherwise ASIC will stay up during PCIe root complex reset. - System configuration Ids to provide system static topology identification, like system's static I2C topology, number and type of FPGA devices within the system and so on. Add the existing attribute for "iio" bank selection for system type "msn21xx". All the above attributes are exposed through "sysfs" by "mlxreg-io" driver. Signed-off-by: Vadim Pasternak <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-13Documentation/ABI: Style changesVadim Pasternak1-12/+6
Remove blank lines between "What" and "Date" keywords. Start each section with "What" keyword. Signed-off-by: Vadim Pasternak <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-13Documentation/ABI: Add missed attribute for mlxreg-io sysfs interfacesVadim Pasternak1-0/+9
Add missed "cpld4_version" attribute. Fixes: 52675da1d087 ("Documentation/ABI: Add new attribute for mlxreg-io sysfs interfaces") Signed-off-by: Vadim Pasternak <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-13Documentation/ABI: Fix documentation inconsistency for mlxreg-io sysfs ↵Vadim Pasternak1-2/+2
interfaces Fix attribute name from "jtag_enable", which described twice to "cpld3_version", which is expected to be instead of second appearance of "jtag_enable". Fixes: 2752e34442b5 ("Documentation/ABI: Add new attribute for mlxreg-io sysfs interfaces") Signed-off-by: Vadim Pasternak <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-13platform/x86: mlx-platform: Cosmetic changesVadim Pasternak1-5/+5
Remove redundant semicolons at the end of few functions. Signed-off-by: Vadim Pasternak <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-13MAINTAINERS: Update for the intel uncore frequency controlSrinivas Pandruvada1-0/+6
Add an entry for drivers/platform/x86/intel-uncore-frequency.c. Signed-off-by: Srinivas Pandruvada <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-13platform/x86: Add support for Uncore frequency controlSrinivas Pandruvada3-0/+449
Some server users set limits on the uncore frequency using MSR 620H, while running latency sensitive workloads. Here uncore frequency controls RING/LLC(last-level cache) clocks. But MSR control is not always possible from the user space, so this driver provides a sysfs interface to set max and min frequency limits. This MSR 620H is a die scoped in multi-die system or package scoped in non multi-die systems. When this driver is loaded, a new directory is created under /sys/devices/system/cpu. For example on a two package Skylake server: $cd /sys/devices/system/cpu/intel_uncore_frequency $ls package_00_die_00 package_01_die_00 $ls package_00_die_00 max_freq_khz min_freq_khz initial_max_freq_khz initial_min_freq_khz $grep . * max_freq_khz:2400000 min_freq_khz:1200000 initial_max_freq_khz:2400000 initial_min_freq_khz:1200000 Here, initial_max_freq_khz and initial_min_freq_khz are read only attributes to show power up or initial values of max and min frequencies respectively. Other attributes are read-write, so that users can modify. Signed-off-by: Srinivas Pandruvada <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-13platform/x86: asus-wmi: Fix keyboard brightness cannot be set to 0Jian-Hong Pan1-7/+1
Some of ASUS laptops like UX431FL keyboard backlight cannot be set to brightness 0. According to ASUS' information, the brightness should be 0x80 ~ 0x83. This patch fixes it by following the logic. Fixes: e9809c0b9670 ("asus-wmi: add keyboard backlight support") Signed-off-by: Jian-Hong Pan <[email protected]> Reviewed-by: Daniel Drake <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-10platform/x86: intel_atomisp2_pm: Spelling fixesAndy Shevchenko2-9/+8
Fix ambiguous spelling in the comments. While here, update two lines to fit one. Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-10platform/x86: intel_atomisp2_pm: Refactor timeout loopAndy Shevchenko1-9/+5
The timeout loop look more naturally when done like unsigned long timeout = ...; ... do { ... if (cond) return %OK; sleep(...); } while (time_before(timeout)); ...print timeout error... return %ERROR; It also saves LOCs. Convert the driver to this format of timeout loop. Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-10platform/x86: asus_wmi: Set throttle thermal policy to defaultLeonid Maksymchuk1-0/+11
ASUS TUF FX705DY/FX505DY starts in silent mode and under heavy CPU load it overheats and drops CPU frequency to 399MHz and stays at it until reboot [1]. Set throttle thermal policy to default to avoid overheating and throttlig. [1] Link: https://bugzilla.kernel.org/show_bug.cgi?id=203733 Signed-off-by: Leonid Maksymchuk <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-10platform/x86: asus_wmi: Support throttle thermal policyLeonid Maksymchuk3-0/+124
Throttle thermal policy ACPI device is used to control CPU cooling and throttling. This patch adds sysfs entry for setting current mode and Fn+F5 hotkey that switches to next. Policy modes: * 0x00 - default * 0x01 - overboost * 0x02 - silent Signed-off-by: Leonid Maksymchuk <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-10platform/x86: touchscreen_dmi: Fix indentation in several placesAndy Shevchenko1-41/+21
1. Put on one line PROPERTY_ENTRY_STRING("firmware-name", ...) lines. In most cases this doesn't over the limit, the rest is pretty much obvious from reading point of view. 2. Put on one line DMI_MATCH() parameters, we already have over the limit lines. 3. Reduce indentation of function parameters. Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-10platform/x86: touchscreen_dmi: Add info for the PiPO W11 tabletTim Josten1-0/+28
Add touchscreen info for the PiPO W11 tablet. Signed-off-by: Tim Josten <[email protected]> Signed-off-by: Hans de Goede <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-10platform/x86: intel_pmc_core: update Comet Lake platform driverHarry Pan1-0/+2
Adding new CML CPU model ID into platform driver support list. Signed-off-by: Harry Pan <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-10platform/x86: GPD pocket fan: Allow somewhat lower/higher temperature limitsHans de Goede1-1/+1
Allow the user to configure the fan to turn on / speed-up at lower thresholds then before (20 degrees Celcius as minimum instead of 40) and likewise also allow the user to delay the fan speeding-up till the temperature hits 90 degrees Celcius (was 70). Cc: Jason Anderson <[email protected]> Reported-by: Jason Anderson <[email protected]> Signed-off-by: Hans de Goede <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-10platform/x86: GPD pocket fan: Use default values when wrong modparams are givenHans de Goede1-6/+19
Use our default values when wrong module-parameters are given, instead of refusing to load. Refusing to load leaves the fan at the BIOS default setting, which is "Off". The CPU's thermal throttling should protect the system from damage, but not-loading is really not the best fallback in this case. This commit fixes this by re-setting module-parameter values to their defaults if they are out of range, instead of failing the probe with -EINVAL. Cc: [email protected] Cc: Jason Anderson <[email protected]> Reported-by: Jason Anderson <[email protected]> Fixes: 594ce6db326e ("platform/x86: GPD pocket fan: Use a min-speed of 2 while charging") Signed-off-by: Hans de Goede <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-10platform/mellanox: fix potential deadlock in the tmfifo driverLiming Sun1-9/+10
This commit fixes the potential deadlock caused by the console Rx and Tx processing at the same time. Rx and Tx both take the console and tmfifo spinlock but in different order which causes potential deadlock. The fix is to use different tmfifo spinlock for Rx and Tx since they protect different resources and it's safe to split the lock. Below is the reported call trace when copying/pasting large string in the console. Rx: _raw_spin_lock_irqsave (hvc lock) __hvc_poll hvc_poll in_intr vring_interrupt mlxbf_tmfifo_rxtx_one_desc (tmfifo lock) mlxbf_tmfifo_rxtx mlxbf_tmfifo_work_rxtx Tx: _raw_spin_lock_irqsave (tmfifo lock) mlxbf_tmfifo_virtio_notify virtqueue_notify virtqueue_kick put_chars hvc_push hvc_write (hvc lock) ... do_tty_write tty_write Fixes: 1357dfd7261f ("platform/mellanox: Add TmFifo driver for Mellanox BlueField Soc") Cc: <[email protected]> # 5.4+ Reviewed-by: David Woods <[email protected]> Signed-off-by: Liming Sun <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-10platform/x86: intel-ips: Use the correct style for SPDX License IdentifierNishad Kamdar2-2/+2
This patch corrects the SPDX License Identifier style in header files related to x86 Platform Specific Drivers. For C header files Documentation/process/license-rules.rst mandates C-like comments (opposed to C source files where C++ style should be used). Changes made by using a script provided by Joe Perches here: https://lkml.org/lkml/2019/2/7/46. Suggested-by: Joe Perches <[email protected]> Signed-off-by: Nishad Kamdar <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-10platform/x86: intel_telemetry_debugfs: Respect error code of ↵Andy Shevchenko1-6/+8
kstrtou32_from_user() kstrtou32_from_user() may return different error codes on certain circumstances. Respect all possible values. Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-10platform/x86: intel_pmc_core: Fix spelling of MHz unitAndy Shevchenko1-1/+1
Fix spelling of MHz unit in a comment. Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-10platform/x86: intel_pmc_core: Fix indentation in function definitionsAndy Shevchenko1-4/+5
There are two problematic places where indentation is not good to a reader and maintainer. Fix them here. Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-10platform/x86: intel_pmc_core: Put more stuff under #ifdef DEBUG_FSAndy Shevchenko1-5/+5
There is a function which is solely used for DebugFS interface, do not build it otherwise. Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-10platform/x86: intel_pmc_core: Respect error code of kstrtou32_from_user()Andy Shevchenko1-6/+6
kstrtou32_from_user() may return different error codes on certain circumstances. Respect all possible values. While here, move it out of the lock: there is no data access that lock guards. Signed-off-by: Andy Shevchenko <[email protected]>
2020-01-10platform/x86: intel_telemetry_pltdrv: use devm_platform_ioremap_resource()Andy Shevchenko2-57/+10
Use devm_platform_ioremap_resource() to simplify the code a bit. While here, drop initialized but unused ssram_base_addr and ssram_size members. Signed-off-by: Andy Shevchenko <[email protected]>
2019-12-20platform/x86: intel_pmc_core: Add Intel Elkhart Lake supportGayatri Kammela1-5/+6
Add Intel Elkhart Lake to the list of the platforms that driver supports for the PMC device. Just like Ice Lake and Tiger Lake, Elkhart Lake can also reuse all the Cannon Lake PCH IPs. Also, it uses the same PCH IPs of Tiger Lake, no additional effort is needed to enable but to simply reuse them. Cc: Peter Zijlstra <[email protected]> Cc: Srinivas Pandruvada <[email protected]> Cc: Andy Shevchenko <[email protected]> Cc: Kan Liang <[email protected]> Cc: David E. Box <[email protected]> Cc: Rajneesh Bhardwaj <[email protected]> Cc: Tony Luck <[email protected]> Reviewed-by: Tony Luck <[email protected]> Signed-off-by: Gayatri Kammela <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2019-12-20platform/x86: intel_pmc_core: Add Intel Tiger Lake supportGayatri Kammela2-2/+46
Add Intel Tiger Lake to the list of the platforms that driver supports for the PMC device. Just like Ice Lake, Tiger Lake can also reuse all the Cannon Lake PCH IPs. Since Tiger Lake has almost the same number of PCH IPs as Ice Lake, reuse Ice Lake's PPFEAR_NUM_ENTRIES instead of defining a new macro. Cc: Peter Zijlstra <[email protected]> Cc: Srinivas Pandruvada <[email protected]> Cc: Andy Shevchenko <[email protected]> Cc: Kan Liang <[email protected]> Cc: David E. Box <[email protected]> Cc: Rajneesh Bhardwaj <[email protected]> Cc: Tony Luck <[email protected]> Reviewed-by: Tony Luck <[email protected]> Signed-off-by: Gayatri Kammela <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2019-12-20platform/x86: intel_pmc_core: Make debugfs entry for ↵Gayatri Kammela1-2/+3
pch_ip_power_gating_status conditional Check if the platform supports and only then add a debugfs entry for PCH IP power gating status. Cc: Peter Zijlstra <[email protected]> Cc: Srinivas Pandruvada <[email protected]> Cc: Andy Shevchenko <[email protected]> Cc: Kan Liang <[email protected]> Cc: David E. Box <[email protected]> Cc: Rajneesh Bhardwaj <[email protected]> Cc: Tony Luck <[email protected]> Reviewed-by: Tony Luck <[email protected]> Signed-off-by: Gayatri Kammela <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2019-12-20platform/x86: intel_pmc_core: Create platform dependent bitmap structsGayatri Kammela2-13/+35
The current implementation of intel_pmc_core driver allows to reuse, but does not reflect the exact number and names of IPs for a newer platform which does not necessarily support all the IPs in the entries. The names and number of these IPs might differ from its previous platforms. The number of PCH IPs per platform is calculated based on PPFEAR_NUM_ENTRIES defined, where each entry represents a bucket (8 bits). The platform can support 'n' entries, but not necessarily all 'n * 8' IPs. Create platform dependent bitmap structures to specify the exact number, names of IPs while reusing the existing IPs. The changes in this patch are preparatory to accommodate future SoCs that might reuse the CNL/ICL PCH IPs, and to reflect the exact number of IPs with its names. Cc: Peter Zijlstra <[email protected]> Cc: Srinivas Pandruvada <[email protected]> Cc: Andy Shevchenko <[email protected]> Cc: Kan Liang <[email protected]> Cc: David E. Box <[email protected]> Cc: Rajneesh Bhardwaj <[email protected]> Cc: Tony Luck <[email protected]> Reviewed-by: Tony Luck <[email protected]> Signed-off-by: Gayatri Kammela <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2019-12-20platform/x86: intel_pmc_core: Remove unnecessary assignmentsAndy Shevchenko1-2/+2
There is no need to assign NULL or 0 in the static structures explicitly. Signed-off-by: Andy Shevchenko <[email protected]>
2019-12-20platform/x86: intel_pmc_core: Clean up: Remove comma after the termination lineGayatri Kammela1-5/+5
It is common practice to place a comma after the last entry in an initialized array to avoid the need to add one in future patches that extend the array. But when the last element is a termination marker, the comma could be harmful. Any new entries must be added before the terminator (and the comma would prevent the compiler from issuing a warning about an entry after the terminator). Cc: Peter Zijlstra <[email protected]> Cc: Srinivas Pandruvada <[email protected]> Cc: Andy Shevchenko <[email protected]> Cc: Kan Liang <[email protected]> Cc: David E. Box <[email protected]> Cc: Rajneesh Bhardwaj <[email protected]> Cc: Tony Luck <[email protected]> Suggested-by: Andy Shevchenko <[email protected]> Reviewed-by: Tony Luck <[email protected]> Signed-off-by: Gayatri Kammela <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2019-12-20platform/x86: pcengines-apuv2: Spelling fixes in the driverAndy Shevchenko1-20/+20
Mainly does: - capitalize gpio and bios to GPIO and BIOS - capitalize beginning of comments - add periods in multi-line comments Signed-off-by: Andy Shevchenko <[email protected]>
2019-12-20platform/x86: pcengines-apuv2: detect apuv4 boardEnrico Weigelt, metux IT consult1-0/+27
GPIO stuff on APUv4 seems to be the same as on APUv2, so we just need to match on DMI data. Signed-off-by: Enrico Weigelt, metux IT consult <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2019-12-20platform/x86: pcengines-apuv2: fix simswap GPIO assignmentEnrico Weigelt, metux IT consult1-1/+1
The mapping entry has to hold the GPIO line index instead of controller's register number. Fixes: 5037d4ddda31 ("platform/x86: pcengines-apuv2: wire up simswitch gpio as led") Signed-off-by: Enrico Weigelt, metux IT consult <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2019-12-20platform/x86: pmc_atom: Add Siemens CONNECT X300 to critclk_systems DMI tableMichael Haener1-0/+8
The CONNECT X300 uses the PMC clock for on-board components and gets stuck during boot if the clock is disabled. Therefore, add this device to the critical systems list. Tested on CONNECT X300. Fixes: 648e921888ad ("clk: x86: Stop marking clocks as CLK_IS_CRITICAL") Signed-off-by: Michael Haener <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2019-12-20platform/x86: hp-wmi: Make buffer for HPWMI_FEATURE2_QUERY 128 bytesHans de Goede1-1/+1
At least on the HP Envy x360 15-cp0xxx model the WMI interface for HPWMI_FEATURE2_QUERY requires an outsize of at least 128 bytes, otherwise it fails with an error code 5 (HPWMI_RET_INVALID_PARAMETERS): Dec 06 00:59:38 kernel: hp_wmi: query 0xd returned error 0x5 We do not care about the contents of the buffer, we just want to know if the HPWMI_FEATURE2_QUERY command is supported. This commits bumps the buffer size, fixing the error. Fixes: 8a1513b4932 ("hp-wmi: limit hotkey enable") Cc: [email protected] BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1520703 Signed-off-by: Hans de Goede <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2019-12-20platform/mellanox: fix the mlx-bootctl sysfsLiming Sun2-6/+6
This is a follow-up commit for the sysfs attributes to change from DRIVER_ATTR to DEVICE_ATTR according to some initial comments. In such case, it's better to point the sysfs path to the device itself instead of the driver. The ABI document is also updated. Fixes: 79e29cb8fbc5 ("platform/mellanox: Add bootctl driver for Mellanox BlueField Soc") Signed-off-by: Liming Sun <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]>
2019-12-15Linux 5.5-rc2Linus Torvalds1-1/+1
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