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2018-03-19RDMA/ucma: Fix use-after-free access in ucma_closeLeon Romanovsky1-0/+3
The error in ucma_create_id() left ctx in the list of contexts belong to ucma file descriptor. The attempt to close this file descriptor causes to use-after-free accesses while iterating over such list. Fixes: 75216638572f ("RDMA/cma: Export rdma cm interface to userspace") Reported-by: <[email protected]> Signed-off-by: Leon Romanovsky <[email protected]> Reviewed-by: Sean Hefty <[email protected]> Signed-off-by: Jason Gunthorpe <[email protected]>
2018-03-19drm/amd/pp: Remove unneeded void * casts for Vega10Rex Zhu4-138/+87
Removes unneeded void * casts for the following pointers: hwmgr->backend hwmgr->smu_backend Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-19drm/amd/pp: Delete get_xclk function in powerplay (v2)Rex Zhu12-43/+15
use asic's callback function get_xclk in amdgpu v2: squash in removal of leftover debug info (drm/amd/pp: Delete debug info in smu7_hwmgr.c) (Rex) Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-19drm/amd/pp: Clean up header file for Vega10Rex Zhu6-18/+13
Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-19drm/amd/pp: Move functions to smu backend table for vega10Rex Zhu6-61/+53
Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-19drm/amd/pp: Mark bunches of functins in vega10_smumgr.c staticRex Zhu2-8/+5
Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-19drm/amd/pp: Remove dead functions in vega10_smumgr.cRex Zhu2-40/+0
use smc_table_manager function to copy/save tables to/from smu. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-19drm/amdgpu: Delete dead code when early initRex Zhu2-10/+0
Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-19percpu_ref: Update doc to dissuade users from depending on internal RCU ↵Tejun Heo2-6/+14
grace periods percpu_ref internally uses sched-RCU to implement the percpu -> atomic mode switching and the documentation suggested that this could be depended upon. This doesn't seem like a good idea. * percpu_ref uses sched-RCU which has different grace periods regular RCU. Users may combine percpu_ref with regular RCU usage and incorrectly believe that regular RCU grace periods are performed by percpu_ref. This can lead to, for example, use-after-free due to premature freeing. * percpu_ref has a grace period when switching from percpu to atomic mode. It doesn't have one between the last put and release. This distinction is subtle and can lead to surprising bugs. * percpu_ref allows starting in and switching to atomic mode manually for debugging and other purposes. This means that there may not be any grace periods from kill to release. This patch makes it clear that the grace periods are percpu_ref's internal implementation detail and can't be depended upon by the users. Signed-off-by: Tejun Heo <[email protected]> Cc: Kent Overstreet <[email protected]> Cc: Linus Torvalds <[email protected]> Signed-off-by: Tejun Heo <[email protected]>
2018-03-19mm: Allow to kill tasks doing pcpu_alloc() and waiting for pcpu_balance_workfn()Kirill Tkhai1-2/+11
In case of memory deficit and low percpu memory pages, pcpu_balance_workfn() takes pcpu_alloc_mutex for a long time (as it makes memory allocations itself and waits for memory reclaim). If tasks doing pcpu_alloc() are choosen by OOM killer, they can't exit, because they are waiting for the mutex. The patch makes pcpu_alloc() to care about killing signal and use mutex_lock_killable(), when it's allowed by GFP flags. This guarantees, a task does not miss SIGKILL from OOM killer. Signed-off-by: Kirill Tkhai <[email protected]> Signed-off-by: Tejun Heo <[email protected]>
2018-03-19percpu: include linux/sched.h for cond_resched()Tejun Heo1-0/+1
microblaze build broke due to missing declaration of the cond_resched() invocation added recently. Let's include linux/sched.h explicitly. Signed-off-by: Tejun Heo <[email protected]> Reported-by: kbuild test robot <[email protected]>
2018-03-19clk: bcm2835: Protect sections updating shared registersBoris Brezillon1-0/+4
CM_PLLx and A2W_XOSC_CTRL registers are accessed by different clock handlers and must be accessed with ->regs_lock held. Update the sections where this protection is missing. Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks") Cc: <[email protected]> Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2018-03-19clk: bcm2835: Fix ana->maskX definitionsBoris Brezillon1-4/+4
ana->maskX values are already '~'-ed in bcm2835_pll_set_rate(). Remove the '~' in the definition to fix ANA setup. Note that this commit fixes a long standing bug preventing one from using an HDMI display if it's plugged after the FW has booted Linux. This is because PLLH is used by the HDMI encoder to generate the pixel clock. Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks") Cc: <[email protected]> Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2018-03-19drm/amd/display: fix dereferencing possible ERR_PTR()Shirish S1-0/+3
This patch fixes static checker warning caused by "36cc549d5986: "drm/amd/display: disable CRTCs with NULL FB on their primary plane (V2)" Reported-by: Dan Carpenter <[email protected]> Signed-off-by: Shirish S <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-19drm/amd/display: Refine disable VGAClark Zheng2-6/+22
bad case won't follow normal sense, it will not enable vga1 as usual, but vga2,3,4 is on. Signed-off-by: Clark Zheng <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-19ALSA: usb-audio: Fix parsing descriptor of UAC2 processing unitKirill Marinushkin1-2/+2
Currently, the offsets in the UAC2 processing unit descriptor are calculated incorrectly. It causes an issue when connecting the device which provides such a feature: ~~~~ [84126.724420] usb 1-1.3.1: invalid Processing Unit descriptor (id 18) ~~~~ After this patch is applied, the UAC2 processing unit inits w/o this error. Fixes: 23caaf19b11e ("ALSA: usb-mixer: Add support for Audio Class v2.0") Signed-off-by: Kirill Marinushkin <[email protected]> Cc: <[email protected]> Signed-off-by: Takashi Iwai <[email protected]>
2018-03-19libata: Modify quirks for MX100 to limit NCQ_TRIM quirk to MU01 versionHans de Goede1-2/+5
When commit 9c7be59fc519af ("libata: Apply NOLPM quirk to Crucial MX100 512GB SSDs") was added it inherited the ATA_HORKAGE_NO_NCQ_TRIM quirk from the existing "Crucial_CT*MX100*" entry, but that entry sets model_rev to "MU01", where as the entry adding the NOLPM quirk sets it to NULL. This means that after this commit we no apply the NO_NCQ_TRIM quirk to all "Crucial_CT512MX100*" SSDs even if they have the fixed "MU02" firmware. This commit splits the "Crucial_CT512MX100*" quirk into 2 quirks, one for the "MU01" firmware and one for all other firmware versions, so that we once again only apply the NO_NCQ_TRIM quirk to the "MU01" firmware version. Fixes: 9c7be59fc519af ("libata: Apply NOLPM quirk to ... MX100 512GB SSDs") Cc: [email protected] Signed-off-by: Hans de Goede <[email protected]> Signed-off-by: Tejun Heo <[email protected]>
2018-03-19libata: Make Crucial BX100 500GB LPM quirk apply to all firmware versionsHans de Goede1-1/+1
Commit b17e5729a630 ("libata: disable LPM for Crucial BX100 SSD 500GB drive"), introduced a ATA_HORKAGE_NOLPM quirk for Crucial BX100 500GB SSDs but limited this to the MU02 firmware version, according to: http://www.crucial.com/usa/en/support-ssd-firmware MU02 is the last version, so there are no newer possibly fixed versions and if the MU02 version has broken LPM then the MU01 almost certainly also has broken LPM, so this commit changes the quirk to apply to all firmware versions. Fixes: b17e5729a630 ("libata: disable LPM for Crucial BX100 SSD 500GB...") Cc: [email protected] Cc: Kai-Heng Feng <[email protected]> Signed-off-by: Hans de Goede <[email protected]> Signed-off-by: Tejun Heo <[email protected]>
2018-03-19libata: Apply NOLPM quirk to Crucial M500 480 and 960GB SSDsHans de Goede1-0/+8
There have been reports of the Crucial M500 480GB model not working with LPM set to min_power / med_power_with_dipm level. It has not been tested with medium_power, but that typically has no measurable power-savings. Note the reporters Crucial_CT480M500SSD3 has a firmware version of MU03 and there is a MU05 update available, but that update does not mention any LPM fixes in its changelog, so the quirk matches all firmware versions. In my experience the LPM problems with (older) Crucial SSDs seem to be limited to higher capacity versions of the SSDs (different firmware?), so this commit adds a NOLPM quirk for the 480 and 960GB versions of the M500, to avoid LPM causing issues with these SSDs. Cc: [email protected] Reported-and-tested-by: Martin Steigerwald <[email protected]> Signed-off-by: Hans de Goede <[email protected]> Signed-off-by: Tejun Heo <[email protected]>
2018-03-19drm/sun4i: backend: Check that we only have a single YUV planeMaxime Ripard2-2/+48
Just like for the frontend, a single plane can use a YUV format. Make sure we have that constraint covered in our atomic_check. This is preliminary to the actual YUV support to make sure we don't end up in an impossible to support situation. Reviewed-by: Chen-Yu Tsai <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/2f8586493d9139b12efe7e94f65e9a149f818e0e.1519931807.git-series.maxime.ripard@bootlin.com
2018-03-19staging: ncpfs: memory corruption in ncp_read_kernel()Dan Carpenter1-0/+4
If the server is malicious then *bytes_read could be larger than the size of the "target" buffer. It would lead to memory corruption when we do the memcpy(). Reported-by: Dr Silvio Cesare of InfoSect <Silvio Cesare <[email protected]> Signed-off-by: Dan Carpenter <[email protected]> Cc: stable <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2018-03-19Merge tag 'iio-fixes-for-4.16b' of ↵Greg Kroah-Hartman7-25/+46
git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-linus Jonathan writes: Second set of IIO fixes for the 4.16 cycle. A slightly fiddly revert then fix pair in here as the bug lead to an unused local variable that was then removed without us noticing the bug. The revert should only be needed on 4.16 - the fix goes back futher. * ccs811 - Fix the transition from 'boot' to 'application' mode. Fixes the case where the power is not cut between boot cycles. * meson-saradc - Fix missing mutex_unlock in an error path. * sd-modulator - Fix bindings doc to have the right value of io-channel-cells to reflect that this device type only ever outputs one channel. * st-accel - Revert drop of redundant pointer patch. - Use the now available pointer to avoid overwriting the platform data pointer and causing trouble on reprobing the driver. * st-pressure - Use local copy of the platform data pointer to avoid overwriting the one associated with the device, which would cause issues on reprobing the driver. * stm32-dfsdm - Use the right regmap_cfg for the type of device. - Correct the ID passed to stop channel to be the channel one. - Correct which clock is used to allow for the 'audio' clock. - Fix allocation of channels when more than one is enabled.
2018-03-19drm/sun4i: Add driver support for A80 display pipelineChen-Yu Tsai3-2/+18
This patch adds support for the compatible strings of the A80 display pipeline. Signed-off-by: Chen-Yu Tsai <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-03-19drm/sun4i: Add compatible strings for the A80 display pipelineChen-Yu Tsai1-1/+5
This patch adds compatible strings for the remaining documented components of the Allwinner A80 display pipeline. Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Chen-Yu Tsai <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-03-19drm/sun4i: Add support for A80 TCONsChen-Yu Tsai2-0/+28
The Allwinner A80 SoC has 2 documented TCONs. The display pipeline diagram from the user manual shows a third TCON, but it's missing an interrupt line, and its registers are not explained either. It's also not used in Allwinner's vendor BSP. The first TCON only has channel 0, for LCD panel output. The TCON hardware setup is peculiar in that the eDP reset must also be deasserted to allow access to the TCON. How the eDP module is wired in the SoC itself is never explained. The second TCON only has channel 1, and its output is connected to the HDMI encoder block. This patch adds a "needs_edp_reset" field to the tcon quirks structure, and adds quirks and compatible strings for the 2 documented TCONs. Signed-off-by: Chen-Yu Tsai <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-03-19drm/sun4i: Add DT binding for Detail Enhancement Unit in Allwinner A80 SoCChen-Yu Tsai1-0/+22
The display pipeline on the A80 SoC has what is called the Detail Enhancement Unit, or DEU for short, block in between the display frontend and backend. This unit can sharpen images in both luma and chroma channels. It seems to also do colorspace conversion. This patch adds the device tree binding for this hardware block. Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Chen-Yu Tsai <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-03-19drm/sun4i: Add compatible strings for A80 TCONsChen-Yu Tsai1-3/+8
The A80 has 2 or 3 TCONs. The documentation and vendor kernel are very vague about the third TCON, to the point that it might not exist. In the documentation, the first TCON is missing channel 1, and the second is missing channel 0. However the vendor kernel seems to be able to use them regardless. Here we model them like the old TCONs. An oddity is that TCON0 requires the reset control for the eDP block to be deasserted, for any register access to stick. This patch adds compatible strings for TCON0 and TCON1, with TCON0 requiring an extra "edp" reset control. Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Chen-Yu Tsai <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-03-19drm: Reduce object size of DRM_DEV_<LEVEL> usesJoe Perches2-57/+74
These macros are similar to the DRM_<LEVEL> with the addition of a struct device * to the arguments. Convert the single drm_dev_printk function into 2 separate functions. drm_dev_printk with a KERN_<LEVEL> * for generic use and drm_dev_dbg for conditional masked use. Remove the __func__ argument and use __builtin_return_address(0) to be similar to the DRM_<LEVEL> macros uses. Convert the DRM_DEV_<LEVEL> macros to remove now unnecessary arguments and use a consistent style. These macros are rarely used in the generic gpu/drm code so the code size does not change much for a defconfig, but when more drivers are enabled, there is ~4k savings. Many of these macros have no existing use at all. $ size -t drivers/gpu/drm/built-in.a | tail -1 1877530 44651 995 1923176 1d5868 (TOTALS) $ size -t drivers/gpu/drm/built-in.a | tail -1 1877527 44651 995 1923173 1d5865 (TOTALS) $ size -t drivers/gpu/drm/built-in.a | tail -1 17166750 2689238 108352 19964340 130a1b4 (TOTALS) $ size -t drivers/gpu/drm/built-in.a | tail -1 17168888 2691734 108352 19968974 130b3ce (TOTALS) Signed-off-by: Joe Perches <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/e5c164946e15375ac71b69b75f296efdf0b76e6d.1521233717.git.joe@perches.com
2018-03-19drm/doc: Put all driver docs into a separate chapterDaniel Vetter2-8/+22
We have quite a few driver docs now, which is great, but having them all in the top-level gpu documentation chapter makes it harder to spot the core/shared bits. Stuff them into a separate chapter and ecourage people to add even more! Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-03-19drm: dma_bufs: Fixed checkpatch issuesPaul McQuade1-8/+8
Fix a couple of checkpatch issues Signed-off-by: Paul McQuade <[email protected]> [seanpaul squashed series of 4 into one patch, and changed commit msg] Signed-off-by: Sean Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-03-19drm: remove drm_mode_object_{un/reference} aliasesHaneen Mohammed2-34/+0
This patch remove the compatibility aliases drm_mode_object_{reference/unreference} of drm_mode_object_{get/put} since all callers have been converted to the prefered _{get/put}. Remove the helpers from the semantic patch drm-get-put-cocci. Signed-off-by: Haneen Mohammed <[email protected]> Signed-off-by: Sean Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/20180319055820.GA17502@haneen-VirtualBox
2018-03-19drm/msm: fix building without debugfsArnd Bergmann1-0/+2
The adreno driver stopped building when CONFIG_DEBUGFS is disabled: drivers/gpu/drm/msm/adreno/adreno_device.c: In function 'adreno_load_gpu': drivers/gpu/drm/msm/adreno/adreno_device.c:153:16: error: 'const struct msm_gpu_funcs' has no member named 'debugfs_init' if (gpu->funcs->debugfs_init) { ^~ drivers/gpu/drm/msm/adreno/adreno_device.c:154:13: error: 'const struct msm_gpu_funcs' has no member named 'debugfs_init' gpu->funcs->debugfs_init(gpu, dev->primary); ^~ This adds an #ifdef around the code that references the hidden pointer. Fixes: 331dc0bc195b ("drm/msm: add a5xx specific debugfs") Signed-off-by: Arnd Bergmann <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-03-19drm/msm/mdp5: don't pre-reserve LM's if no dual-dsiRob Clark1-1/+5
If there is only a single DSI interface, don't reserve the first two layer-mixers for the dual-DSI use-case. This was causing problems for WB, not being able to assign a LM, on 8x16, which has only two LM's and a single DSI. Signed-off-by: Rob Clark <[email protected]>
2018-03-19drm/msm/mdp5: add missing LM flush bitsRob Clark1-0/+2
For some reason, layer-mixer 3 and 4 were missing. LM3 is used for writeback on 8x16. Signed-off-by: Rob Clark <[email protected]>
2018-03-19drm/msm/mdp5: print a bit more of the atomic stateRob Clark1-0/+5
Signed-off-by: Rob Clark <[email protected]>
2018-03-19drm/msm/mdp5: rework CTL START signal handlingRob Clark7-44/+35
For DSI cmd-mode and writeback, we need to write the CTL's START register to kick things off, but we only want to do that once both the encoder and the crtc have a chance to write their corresponding flush bits. The difficulty is that when there is a full modeset (ie. encoder state has changed) we want to defer the start until encoder->enable(). But if only plane's have changed, we want to do this from crtc->commit(). The start_mask was a previous attempt to handle this, but it didn't really do the right thing since atomic conversion. Instead track in the crtc state that the start should be deferred, set to try from encoder's (or in future writeback's) atomic_check(). This way the state is part of the atomic state, and rollback can work properly if an atomic test fails. Signed-off-by: Rob Clark <[email protected]>
2018-03-19drm/msm: Trigger fence completion from GPUBjorn Andersson3-16/+4
Interrupt commands causes the CP to trigger an interrupt as the command is processed, regardless of the GPU being done processing previous commands. This is seen by the interrupt being delivered before the fence is written on 8974 and is likely the cause of the additional CP_WAIT_FOR_IDLE workaround found for a306, which would cause the CP to wait for the GPU to go idle before triggering the interrupt. Instead we can set the (undocumented) BIT(31) of the CACHE_FLUSH_TS which will cause a special CACHE_FLUSH_TS interrupt to be triggered from the GPU as the write event is processed. Add CACHE_FLUSH_TS to the IRQ masks of A3xx and A4xx and remove the workaround for A306. Suggested-by: Jordan Crouse <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-03-19drm/msm/dsi: fix direct caller of msm_gem_free_object()Rob Clark2-3/+2
This should be using drm_gem_object_put(). Also since this is done only in driver unload path, we don't need to synchronize setting tx_gem_obj to NULL, so juse use the _unlocked() variant. Signed-off-by: Rob Clark <[email protected]>
2018-03-19drm/msm: strip out msm_fence_cbRob Clark2-3/+0
Remnants of pre-dma_fence fencing which got left behind by mistake. Signed-off-by: Rob Clark <[email protected]>
2018-03-19drm/msm: rename mdp->dispRob Clark35-25/+25
Since new display controller is called "dpu" instead of "mdp". Lets make the name of the toplevel directory for the display controllers a bit more generic. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Sean Paul <[email protected]>
2018-03-19drm/msm/dsi: Fix potential NULL pointer dereference in msm_dsi_modeset_initGustavo A. R. Silva1-1/+2
_dev_ is being dereferenced before it is null checked, hence there is a potential null pointer dereference. Fix this by moving the pointer dereference after _dev_ has been null checked. Fixes: d4e7f38d70ef ("drm/msm/dsi: check msm_dsi and dsi pointers before use") Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-03-19drm/msm/adreno/a5xx_debugfs: fix potential NULL pointer dereferenceGustavo A. R. Silva1-1/+3
_minor_ is being dereferenced before it is null checked, hence there is a potential null pointer dereference. Fix this by moving the pointer dereference after _minor_ has been null checked. Fixes: 024ad8df763f ("drm/msm: add a5xx specific debugfs") Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Rob Clark <[email protected]>
2018-03-19can: cc770: Fix use after free in cc770_tx_interrupt()Andri Yngvason1-3/+2
This fixes use after free introduced by the last cc770 patch. Signed-off-by: Andri Yngvason <[email protected]> Fixes: 746201235b3f ("can: cc770: Fix queue stall & dropped RTR reply") Cc: linux-stable <[email protected]> Signed-off-by: Marc Kleine-Budde <[email protected]>
2018-03-19drm/i915/gvt: force to set all context control bits from guestZhenyu Wang1-1/+8
Our shadow context content is from guest but with masked control reg like CTX_CONTEXT_CONTROL, we need to make sure all settings from guest would be set when this context is on hw, this trys to force mask enable bits for all to ensure every bits setting would be effective on hw. One regression found related to once inhibit bit is set, gpu engine are working on inhibit state until MI_LOAD_REG_IMM command or context image clear inhibit bit with mask bit set to 1, and val bit set to 0. In gvt-g currently workload has the highest priority, so gvt-g workload could trigger preempt context easily, preempt context set inhibit bit, then gvt-g workload is scheduled in, but gvt-g workload shadow context image usually doesn't set inhibit mask bit, so gpu is still in inhibit state when gvt workload is running. This caused gpu hang. Suggested-by: Zhang, Xiong <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]> Reviewed-by: Zhang, Xiong <[email protected]>
2018-03-19mtdchar: fix usage of mtd_ooblayout_ecc()OuYang ZhiZhong1-2/+2
Section was not properly computed. The value of OOB region definition is always ECC section 0 information in the OOB area, but we want to get all the ECC bytes information, so we should call mtd_ooblayout_ecc(mtd, section++, &oobregion) until it returns -ERANGE. Fixes: c2b78452a9db ("mtd: use mtd_ooblayout_xxx() helpers where appropriate") Cc: <[email protected]> Signed-off-by: OuYang ZhiZhong <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2018-03-19Revert "ACPI / battery: Add quirk for Asus GL502VSK and UX305LA"Daniel Drake1-45/+3
Revert commit c68f0676ef7d ("ACPI / battery: Add quirk for Asus GL502VSK and UX305LA") and commit 4446823e2573 ("ACPI / battery: Add quirk for Asus UX360UA and UX410UAK"). On many many Asus products, the battery is sometimes reported as charging or discharging even when it is full and you are on AC power. This change quirked the kernel to avoid advertising the discharging state when this happens on 4 laptop models, under the belief that this was incorrect information. I presume it originates from user reports who are confused that their battery status icon says that it is discharging. However, the reported information is indeed correct, and the quirk approach taken is inadequate and more thought is needed first. Specifically: 1. It only quirks discharging state, not charging 2. There are so many different Asus products and DMI naming variants within those product families that behave this way; Linux could grow to quirk hundreds of products and still not even be close at "winning" this battle. 3. Asus previously clarified that this behaviour is intentional. The platform will periodically do a partial discharge/charge cycle when the battery is full, because this is one way to extend the lifetime of the battery (leaving a battery at 100% charge and unused will decrease its usable capacity over time). My understanding is that any decent consumer product will have this behaviour, but it appears that Asus is different in that they expose this info through ACPI. However, the behaviour seems correct. The ACPI spec does not suggest in that the platform should hide the truth. It lets you report that the battery is full of charge, and discharging, and with external power connected; and Asus does this. 4. In terms of not confusing the user, this seems like something that could/should be handled by userspace, which can also detect these same (accurate) conditions in the general case. Revert this quirk before it gets included in a release, while we look for better approaches. Signed-off-by: Daniel Drake <[email protected]> Acked-by: Kai-Heng Feng <[email protected]> Signed-off-by: Rafael J. Wysocki <[email protected]>
2018-03-19drm/tegra: Shutdown on driver unbindThierry Reding1-0/+1
Since commit 846c7dfc1193 ("drm/atomic: Try to preserve the crtc enabled state in drm_atomic_remove_fb, v2."), removing the last framebuffer will no longer disable the corresponding pipeline, which causes the KMS core to complain about leaked connectors on driver unbind. Fix this by calling drm_atomic_helper_shutdown() on driver unbind, which will cause all display pipelines to be shut down and therefore drop the extra references on the connectors. Signed-off-by: Thierry Reding <[email protected]>
2018-03-19drm/tegra: dsi: Don't disable regulator on ->exit()Thierry Reding1-1/+0
The regulator is controlled as part of runtime PM, so it should not be additionally disabled from the ->exit() callback. Signed-off-by: Thierry Reding <[email protected]>
2018-03-19drm/tegra: dc: Detach IOMMU group from domain only onceThierry Reding1-3/+13
Detaching from an IOMMU group multiple times can lead to a crash. This could potentially be fixed in the IOMMU driver, but it's easy to avoid the subsequent detach operations in this driver, so do that as well. Signed-off-by: Thierry Reding <[email protected]>
2018-03-19selftests/x86/ptrace_syscall: Fix for yet more glibc interferenceAndy Lutomirski1-2/+6
glibc keeps getting cleverer, and my version now turns raise() into more than one syscall. Since the test relies on ptrace seeing an exact set of syscalls, this breaks the test. Replace raise(SIGSTOP) with syscall(SYS_tgkill, ...) to force glibc to get out of our way. Signed-off-by: Andy Lutomirski <[email protected]> Cc: Borislav Petkov <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: [email protected] Cc: [email protected] Link: http://lkml.kernel.org/r/bc80338b453afa187bc5f895bd8e2c8d6e264da2.1521300271.git.luto@kernel.org Signed-off-by: Ingo Molnar <[email protected]>
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