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2018-10-17spi: sh-msiof: document R8A779{7|8}0 bindingsSergei Shtylyov1-0/+2
Document the R-Car V3{M|H} (R8A779{7|8}0) SoCs in the Renesas MSIOF bindings. Signed-off-by: Sergei Shtylyov <[email protected]> Reviewed-by: Simon Horman <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-17spi: pic32-sqi: don't pass GFP_DMA32 to dma_alloc_coherentChristoph Hellwig1-1/+1
The DMA API does its own zone decisions based on the coherent_dma_mask. Signed-off-by: Christoph Hellwig <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-12spi: imx: use PIO mode if size is smallRobin Gong1-0/+3
Use PIO mode instead if size is smaller than fifo size, since dma may be less efficient. Signed-off-by: Robin Gong <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-12spi: imx: correct wml as the last sg lengthRobin Gong1-10/+19
Correct wml as the last rx sg length instead of the whole transfer length. Otherwise, mtd_stresstest will be failed as below: insmod mtd_stresstest.ko dev=0 ================================================= mtd_stresstest: MTD device: 0 mtd_stresstest: not NAND flash, assume page size is 512 bytes. mtd_stresstest: MTD device size 4194304, eraseblock size 65536, page size 512, count of eraseblocks 64, pa0 mtd_stresstest: doing operations mtd_stresstest: 0 operations done mtd_test: mtd_read from 1ff532, size 880 mtd_test: mtd_read from 20c267, size 64998 spi_master spi0: I/O Error in DMA RX m25p80 spi0.0: SPI transfer failed: -110 spi_master spi0: failed to transfer one message from queue mtd_test: error: read failed at 0x20c267 mtd_stresstest: error -110 occurred ================================================= insmod: ERROR: could not insert module mtd_stresstest.ko: Connection timed out Signed-off-by: Robin Gong <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-12spi: imx: move wml setting to later than setup_transferRobin Gong1-9/+14
Current dynamic burst length is based on the whole transfer length, that's ok if there is only one sg, but is not right in case multi sgs in one transfer,because the tail data should be based on the last sg length instead of the whole transfer length. Move wml setting for DMA to the later place, thus, the next patch could get the right last sg length for wml setting. This patch is a preparation one, no any function change involved. Signed-off-by: Robin Gong <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-12PCI: Provide pci_match_id() with CONFIG_PCI=nLubomir Rintel1-0/+4
This spares drivers from #ifdef-ing on CONFIG_PCI if the driver can be optionally built on machines without PCI bus. Consistent with acpi_driver_match_device() and similar. Acked-by: Bjorn Helgaas <[email protected]> Signed-off-by: Lubomir Rintel <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-12spi: Make GPIO CSs honour the SPI_NO_CS flagPhil Elwell1-1/+3
The SPI configuration state includes an SPI_NO_CS flag that disables all CS line manipulation, for applications that want to manage their own chip selects. However, this flag is ignored by the GPIO CS code in the SPI framework. Correct this omission with a trivial patch. Signed-off-by: Phil Elwell <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-11spi/spi-pxa2xx: add PXA2xx SSP SPI ControllerLubomir Rintel1-0/+24
This is the SPI controller found on Marvel MMP2 and perhaps more platforms. Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Lubomir Rintel <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-11spi: pxa2xx: Add devicetree supportLubomir Rintel2-29/+45
The MMP2 platform, that uses device tree, has this controller. Let's add devicetree alongside platform & PCI. Signed-off-by: Lubomir Rintel <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-11spi: pxa2xx: Use an enum for typeLubomir Rintel2-4/+4
That seems to be the correct type. Signed-off-by: Lubomir Rintel <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-11spi: spi-geni-qcom: Add SPI driver support for GENI based QUPGirish Mahadevan3-0/+716
This driver supports GENI based SPI Controller in the Qualcomm SOCs. The Qualcomm Generic Interface (GENI) is a programmable module supporting a wide range of serial interfaces including SPI. This driver supports SPI operations using FIFO mode of transfer. Signed-off-by: Girish Mahadevan <[email protected]> Signed-off-by: Dilip Kota <[email protected]> Signed-off-by: Alok Chauhan <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Tested-by: Douglas Anderson <[email protected]> Reviewed-by: Stephen Boyd <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-11spi: soc: qcom: GENI SE SPI controller device tree bindingDilip Kota2-25/+41
Move GENI SE SPI controller device-tree bindings from devicetree/bindings/soc/qcom/qcom,geni-se.txt to devicetree/bindings/spi/qcom,spi-geni-qcom.txt. Signed-off-by: Dilip Kota <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Reviewed-by: Stephen Boyd <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Alok Chauhan <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-11dt-bindings: soc: qcom: Remove SPI controller maximum frequency bindingDilip Kota1-2/+0
SPI controller driver should maintain the maximum frequency of the controller instead of relying on device tree bindings. Because maximum frequency is specific property of SPI controller. Signed-off-by: Dilip Kota <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Reviewed-by: Stephen Boyd <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Alok Chauhan <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-11spi: rockchip: simplify spi enable logicEmil Renner Berthing1-19/+9
Let the dma/non-dma code paths handle the spi enable flag themselves. This removes some logic to determine if the flag should be turned on before or after dma and also don't leave the spi enabled if the dma path fails. Signed-off-by: Emil Renner Berthing <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-11spi: rockchip: directly use direction constantsEmil Renner Berthing1-7/+4
The dma direction for the tx and rx dma channels never change, so just use the constants directly rather than storing them in device data. Signed-off-by: Emil Renner Berthing <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-11spi: rockchip: mark use_dma as boolEmil Renner Berthing1-3/+3
The driver data has a u32 field use_dma which is only ever used as a boolean, so change its type to reflect that. Signed-off-by: Emil Renner Berthing <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-11spi: rockchip: remove unneeded dma_capsEmil Renner Berthing1-2/+0
We no longer need the dma_caps since the dma driver already clamps the burst length to the hardware limit, so don't request and store dma_caps in device data. Signed-off-by: Emil Renner Berthing <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-11spi: rockchip: adjust dma watermark and burstlenHuibin Hong1-9/+3
Signal tx dma when spi fifo is less than half full, and limit tx bursts to half the fifo length. Clamp rx burst length to 1 to avoid alignment issues. Signed-off-by: Huibin Hong <[email protected]> Signed-off-by: Emil Renner Berthing <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-11spi: Introduce new driver for Qualcomm QuadSPI controllerGirish Mahadevan3-0/+588
New driver for Qualcomm QuadSPI(QSPI) controller that is used to communicate with slaves such as flash memory devices. The QSPI controller can operate in 2 or 4 wire mode but only supports SPI Mode 0. The controller can also operate in Single or Dual data rate modes. Signed-off-by: Girish Mahadevan <[email protected]> Signed-off-by: Ryan Case <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Reviewed-by: Stephen Boyd <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-11spi: Qualcomm Quad SPI(QSPI) documentationGirish Mahadevan1-0/+36
Bindings for Qualcomm Quad SPI used on SoCs such as sdm845. Signed-off-by: Girish Mahadevan <[email protected]> Signed-off-by: Ryan Case <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Reviewed-by: Rob Herring <[email protected]> Reviewed-by: Stephen Boyd <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-11dw: spi: add support for Amazon's Alpine spi controllerTalel Shenhar3-0/+17
Add support for a new devicetree compatible string called 'amazon,alpine-apb-ssi', which is necessary for the Amazon Alpine spi controller. 'amazon,alpine-dw-apb-ssi' is used in the dw spi driver if specified in the devicetree. Otherwise, fall back to driver default behavior, i.e. original dw IP hw driver behavior. Signed-off-by: Talel Shenhar <[email protected]> Signed-off-by: David Woodhouse <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-11spi: dw: add compatible for Amazon's Alpine spi controllerTalel Shenhar1-1/+1
This compatible adds the ability for dw spi controller driver to work with the dw spi controller found on Alpine chips. The dw spi controller has an auto-deselect of Chip-Select, in case there is no data inside the Tx FIFO. While working on platforms with Alpine chips, auto-deselect mode causes an issue for some spi devices that can't handle the Chip-Select deselect in the middle of a transaction. It is a normal behavior for a Tx FIFO to be empty in the middle of a transaction, due to busy cpu. In the Alpine chip family an option to change the default behavior was added to the original dw spi controller to prevent this issue of de-asserting Chip-Select once TX FIFO is empty. The change was to allow SW manual control of the Chip-Select. With this change, as long as the Slave Enable Register is asserted, the Chip-Select will be asserted. As a result, it is necessary to deselect the Slave Select Register once the transaction is done. This feature is enabled via a new device compatible string called 'amazon,alpine-dw-apb-ssi'. Once the driver identifies the new compatible string, it enables the hw fixup logic, by writing to a dedicated register found in the IP reserved area and will start manual deselecting the Slave Select Register when the transfer ends. Signed-off-by: Talel Shenhar <[email protected]> Signed-off-by: David Woodhouse <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-11Merge tag 'qcom-geni-immutable-for-mark-brown' of ↵Mark Brown2-26/+28
git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into spi-4.20 Immutable branch for QCOM Geni patches
2018-10-10spi: spidev: Fix OF tree warning logicTrent Piepho1-5/+3
spidev will make a big fuss if a device tree node binds a device by using "spidev" as the node's compatible property. However, the logic for this isn't looking for "spidev" in the compatible, but rather checking that the device is NOT compatible with spidev's list of devices. This causes a false positive if a device not named "rohm,dh2228fv", etc. binds to spidev, even if a means other than putting "spidev" in the device tree was used. E.g., the sysfs driver_override attribute. Signed-off-by: Trent Piepho <[email protected]> Reviewed-by: Jan Kundrát <[email protected]> Tested-by: Jan Kundrát <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-10spi: Add driver_override SPI device attributeTrent Piepho2-0/+52
This attribute works the same was as the identically named attribute for PCI, AMBA, and platform devices. For reference, see: commit 3cf385713460 ("ARM: 8256/1: driver coamba: add device binding path 'driver_override'") commit 3d713e0e382e ("driver core: platform: add device binding path 'driver_override'") commit 782a985d7af2 ("PCI: Introduce new device binding path using pci_dev.driver_override") If the name of a driver is written to this attribute, then the device will bind to the named driver and only the named driver. The device will bind to the driver even if the driver does not list the device in its id table. This behavior is different than the driver's bind attribute, which only allows binding to devices that are listed as supported by the driver. It can be used to bind a generic driver, like spidev, to a device. Signed-off-by: Trent Piepho <[email protected]> Reviewed-by: Jan Kundrát <[email protected]> Tested-by: Jan Kundrát <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-10spi: rb4xx: Use SPI_BPW_MASK to set bits_per_word_maskAxel Lin1-1/+1
Improve readability a bit. Signed-off-by: Axel Lin <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-10spi: fsl-lpspi: Prevent FIFO under/overrun by defaultHieu Tran Dang1-1/+1
Certain devices don't work well when a transmit FIFO underrun or receive FIFO overrun occurs. Example is the SAF400x radio chip when running at high speed which leads to garbage being sent to/received from the chip. In which case, it should stall waiting for further data to be available before proceeding. This patch unset the NOSTALL bit in CFGR1 by default to prevent this issue. Signed-off-by: Hieu Tran Dang <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-09spi: spi-ep93xx: Use dma_data_direction for ep93xx_spi_dma_{finish,prepare}Nathan Chancellor1-11/+25
Clang warns when one enumerated type is implicitly converted to another. drivers/spi/spi-ep93xx.c:342:62: warning: implicit conversion from enumeration type 'enum dma_transfer_direction' to different enumeration type 'enum dma_data_direction' [-Wenum-conversion] nents = dma_map_sg(chan->device->dev, sgt->sgl, sgt->nents, dir); ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~ ./include/linux/dma-mapping.h:428:58: note: expanded from macro 'dma_map_sg' #define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0) ~~~~~~~~~~~~~~~~ ^ drivers/spi/spi-ep93xx.c:348:57: warning: implicit conversion from enumeration type 'enum dma_transfer_direction' to different enumeration type 'enum dma_data_direction' [-Wenum-conversion] dma_unmap_sg(chan->device->dev, sgt->sgl, sgt->nents, dir); ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~ ./include/linux/dma-mapping.h:429:62: note: expanded from macro 'dma_unmap_sg' #define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0) ~~~~~~~~~~~~~~~~~~ ^ drivers/spi/spi-ep93xx.c:377:56: warning: implicit conversion from enumeration type 'enum dma_transfer_direction' to different enumeration type 'enum dma_data_direction' [-Wenum-conversion] dma_unmap_sg(chan->device->dev, sgt->sgl, sgt->nents, dir); ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~ ./include/linux/dma-mapping.h:429:62: note: expanded from macro 'dma_unmap_sg' #define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0) ~~~~~~~~~~~~~~~~~~ ^ 3 warnings generated. dma_{,un}map_sg expect an enum of type dma_data_direction but this driver uses dma_transfer_direction for everything. Convert the driver to use dma_data_direction for these two functions. There are two places that strictly require an enum of type dma_transfer_direction: the direction member in struct dma_slave_config and the direction parameter in dmaengine_prep_slave_sg. To avoid using an explicit cast, add a simple function, ep93xx_dma_data_to_trans_dir, to safely map between the two types because they are not 1 to 1 in meaning. Signed-off-by: Nathan Chancellor <[email protected]> Reviewed-by: Nick Desaulniers <[email protected]> Reviewed-by: Mika Westerberg <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-08spidev: Enable the Liebherr's BK4 board to work with spidev driverLukasz Majewski1-0/+1
With this commit the DSPI driver on the BK4 board can be used for SPI transmission managed from user space (via /dev/spidev0.0). Example usage/testing: insmod ./spi-fsl-dspi.ko ./spidev_test -D /dev/spidev0.0 -s 3000000 -v -H -b 8 -p "\xCC\x11\x22\x74" Signed-off-by: Lukasz Majewski <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-04spi: pxa2xx: Rewrite switch code block in interrupt_transferGustavo A. R. Silva1-1/+3
Rewrite switch code block to directly do the expected number of shifts in each case and have break statements. Addresses-Coverity-ID: 1056539 ("Missing break in switch") Suggested-by: Mark Brown <[email protected]> Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-03spi: slave: Fix missing break in switchGustavo A. R. Silva1-0/+1
Apparently, this code does not actually fall through to the next case because the machine restarts before it has a chance. However, for the sake of maintenance and readability, we better add the missing break statement. Addresses-Coverity-ID: 1437892 ("Missing break in switch") Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-01dt-bindings: spi: sh-msiof: Add r8a7744 supportBiju Das1-0/+1
Document RZ/G1N (R8A7744) SoC bindings. Signed-off-by: Biju Das <[email protected]> Reviewed-by: Chris Paterson <[email protected]> Reviewed-by: Simon Horman <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-10-01dt-bindings: spi: rspi: Add r8a7744 to the compatible listBiju Das1-0/+1
Document RZ/G1N (r8a7744) SoC specific bindings. Signed-off-by: Biju Das <[email protected]> Reviewed-by: Chris Paterson <[email protected]> Reviewed-by: Simon Horman <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-09-28spi: mediatek: add spi slave for Mediatek MT2712Leilk Liu3-0/+565
This patch adds basic spi slave for MT2712. Signed-off-by: Leilk Liu <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-09-28spi: mediatek: add bindings for Mediatek MT2712 soc platformLeilk Liu1-0/+32
This patch adds a DT binding documentation for the MT2712 soc. Signed-off-by: Leilk Liu <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-09-27spi: switch to SPDX license identifierMarco Felsch2-21/+3
Use the appropriate SPDX license identifier and drop the previous license text. Signed-off-by: Marco Felsch <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-09-27spi: spi-mem: Fix inverted logic in op sanity checkGeert Uytterhoeven1-4/+4
On r8a7791/koelsch: m25p80 spi0.0: error -22 reading 9f m25p80: probe of spi0.0 failed with error -22 Apparently the logic in spi_mem_check_op() is wrong, rejecting the spi-mem operation if any buswidth is valid, instead of invalid. Fixes: 380583227c0c7f52 ("spi: spi-mem: Add extra sanity checks on the op param") Signed-off-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-09-27dt-bindings: spi: rspi: Add R7S9210 supportChris Brandt1-1/+2
Add support for RZ/A2 Signed-off-by: Chris Brandt <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-09-27spi: sprd: don't mark remove function as __exitArnd Bergmann1-1/+1
The __exit section is left out for built-in drivers, so a 'remove' callback must not be marked as such to avoid breaking when we unbind a device at runtime. This was pointed out by kbuild: `sprd_spi_remove' referenced in section `.data' of drivers/spi/spi-sprd.o: defined in discarded section `.exit.text' of drivers/spi/spi-sprd.o Fixes: e7d973a31c24 ("spi: sprd: Add SPI driver for Spreadtrum SC9860") Signed-off-by: Arnd Bergmann <[email protected]> Acked-by: Baolin Wang <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-09-23soc: qcom: geni: geni_se_clk_freq_match() should always accept multiplesDouglas Anderson1-15/+22
The geni_se_clk_freq_match() has some strange semantics. Specifically it is defined with two modes: 1. It can find a clock that's an exact multiple of the requested rate 2. It can find a non-exact match but it can't handle multiples then ...but callers should always be able to handle a clock that is a multiple of the requested clock so mode #2 doesn't really make sense. Let's change the semantics so that the non-exact match can also accept multiples and then change the code to handle that. The only caller of this code is the unlanded SPI driver [1] which currently passes "exact = True", thus it should be safe to change the semantics in this way. ...and, in fact, the SPI driver should likely be modified to pass "exact = False" (with the new semantics) since that will allow it to work with SPI devices that request a clock rate that doesn't exactly match a rate we can make. [1] https://lkml.kernel.org/r/[email protected] Fixes: eddac5af0654 ("soc: qcom: Add GENI based QUP Wrapper driver") Signed-off-by: Douglas Anderson <[email protected]> Reviewed-by: Matthias Kaehlcke <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2018-09-23soc: qcom: geni: Don't ignore clk_round_rate() errors in geni_se_clk_tbl_get()Douglas Anderson1-2/+2
The function clk_round_rate() is defined to return a "long", not an "unsigned long". That's because it might return a negative error code. Change the call in geni_se_clk_tbl_get() to check for errors. While we're at it, get rid of a useless init of "freq". NOTE: overall the idea that we should iterate over clk_round_rate() to try to reconstruct a table already present in the clock driver is questionable. Specifically: - This method relies on "clk_round_rate()" rounding up. - This method only works if the table is sorted and has no duplicates. ...this patch doesn't try to fix those problems, it just makes the error handling more correct. Fixes: eddac5af0654 ("soc: qcom: Add GENI based QUP Wrapper driver") Signed-off-by: Douglas Anderson <[email protected]> Reviewed-by: Matthias Kaehlcke <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2018-09-23soc: qcom: geni: Make version macros simplerStephen Boyd1-9/+4
This macro doesn't work, because it hides a local variable inside of the macro to hold the version and that variable name is called 'ver' and 'version' sometimes. Let's change this to be more explicit. Introduce three macros for the major, minor, and step of the version, and require callers to pass the version in to get the part of the version out. This way we don't hide local variables inside macros and things are less evil overall. Cc: Karthikeyan Ramasubramanian <[email protected]> Cc: Sagar Dharia <[email protected]> Cc: Girish Mahadevan <[email protected]> Signed-off-by: Stephen Boyd <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Reviewed-by: Bjorn Andersson <[email protected]> Signed-off-by: Andy Gross <[email protected]>
2018-09-20spi: pic32: Use proper enum in dmaengine_prep_slave_rgNathan Chancellor1-2/+2
Clang warns when one enumerated type is converted implicitly to another: drivers/spi/spi-pic32.c:323:8: warning: implicit conversion from enumeration type 'enum dma_data_direction' to different enumeration type 'enum dma_transfer_direction' [-Wenum-conversion] DMA_FROM_DEVICE, ^~~~~~~~~~~~~~~ drivers/spi/spi-pic32.c:333:8: warning: implicit conversion from enumeration type 'enum dma_data_direction' to different enumeration type 'enum dma_transfer_direction' [-Wenum-conversion] DMA_TO_DEVICE, ^~~~~~~~~~~~~ 2 warnings generated. Use the proper enums from dma_transfer_direction (DMA_FROM_DEVICE = DMA_DEV_TO_MEM = 2, DMA_TO_DEVICE = DMA_MEM_TO_DEV = 1) to satify Clang. Link: https://github.com/ClangBuiltLinux/linux/issues/159 Signed-off-by: Nathan Chancellor <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-09-20spi: spi-mem: Add extra sanity checks on the op paramBoris Brezillon1-6/+48
Some combinations are simply not valid and should be rejected before the op is passed to the SPI controller driver. Add an spi_mem_check_op() helper and use it in spi_mem_exec_op() and spi_mem_supports_op() to make sure the spi-mem operation is valid. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-09-18spi: spi-davinci: Don't error when SPI_CS_WORD and cs_gpioDavid Lechner1-3/+0
This remove the check and subsequent return of error for the case when a SPI device requires SPI_CS_WORD and is also configured to use a GPIO for the CS line. Commit a134cc414e86 ("spi: always use software fallback for SPI_CS_WORD when using cs_gio") handles this case now, so this check is no longer necessary. Signed-off-by: David Lechner <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-09-18spi: always use software fallback for SPI_CS_WORD when using cs_gioDavid Lechner1-2/+4
This modifies the condition for using the software fallback implementation for SPI_CS_WORD when the SPI controller is using a GPIO for the CS line. When using a GPIO for CS, the hardware implementation won't work, so we just enable the software fallback globally in this case. Signed-off-by: David Lechner <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-09-18spi: mediatek: Don't modify spi_transfer when transfer.Peter Shih1-16/+21
Mediatek SPI driver modifies some fields (tx_buf, rx_buf, len, tx_dma, rx_dma) of the spi_transfer* passed in when doing transfer_one and in interrupt handler. This is somewhat unexpected, and there are some caller (e.g. Cr50 spi driver) that reuse the spi_transfer for multiple messages. Add a field to record how many bytes have been transferred, and calculate the right len / buffer based on it instead. Signed-off-by: Pi-Hsun Shih <[email protected]> Change-Id: I23e218cd964f16c0b2b26127d4a5ca6529867673 Signed-off-by: Mark Brown <[email protected]>
2018-09-18spi/bcm63xx-hsspi: keep pll clk enabledJonas Gorski1-4/+16
If the pll clock needs to be enabled to get its rate, it will also need to be enabled to provide it. So ensure it is kept enabled through the lifetime of the device. Fixes: 0d7412ed1f5dc ("spi/bcm63xx-hspi: Enable the clock before calling clk_get_rate().") Signed-off-by: Jonas Gorski <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-09-17spi: pxa2xx: Remove the shutdown callbackLubomir Rintel1-9/+0
It makes no sense to remove the device on shutdown. And it break things when the hardware crucial for shutdown (such as the embedded controller) is attached to the SPI bus. Signed-off-by: Lubomir Rintel <[email protected]> Signed-off-by: Mark Brown <[email protected]>
2018-09-17spi: spi-davinci: Add support for SPI_CS_WORDDavid Lechner1-3/+8
This adds support for the SPI_CS_WORD flag to the TI DaVinci SPI driver. This mode can be used as long as we are using the hardware chip select and not a GPIO chip select. Signed-off-by: David Lechner <[email protected]> Signed-off-by: Mark Brown <[email protected]>