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2015-10-15Merge branch 'drm-armada-devel' of git://ftp.arm.linux.org.uk/~rmk/linux-arm ↵Dave Airlie11-658/+297
into drm-next * remove support for the non-component support from the Armada DRM driver, switching it to component-only mode. * create a "armada plane" to allow the primary and overlay planes to share some code. * increase efficiency by using inherently atomic operations, rather than spinlocking to achieve atomicity. Eg, if we want to exchange a value, using xchg(). * increase PM savings by stopping the external pixel clock when we're in DPMS mode. * 'drm-armada-devel' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: drm/armada: move frame wait wakeup into plane work drm/armada: convert overlay plane vbl worker to a armada plane worker drm/armada: move CRTC flip work to primary plane work drm/armada: move frame wait into armada_frame drm/armada: move the locking for armada_drm_vbl_event_remove() drm/armada: move the update of dplane->ctrl0 out of spinlock drm/armada: move write to dma_ctrl0 to armada_drm_crtc_plane_disable() drm/armada: provide a common helper to disable a plane drm/armada: allocate primary plane ourselves drm/armada: add primary plane creation drm/armada: introduce generic armada_plane struct drm/armada: update armada overlay to use drm_universal_plane_init() drm/armada: use xchg() to atomically update dplane->old_fb drm/armada: factor out retirement of old fb drm/armada: rename overlay identifiers drm/armada: redo locking and atomics for armada_drm_crtc_complete_frame_work() drm/armada: disable CRTC clock during DPMS drm/armada: use drm_plane_force_disable() to disable the overlay plane drm/armada: move vbl code into armada_crtc drm/armada: remove non-component support
2015-10-14drm/amdgpu: fix lockup when clean pending fencesJunwei Zhang1-3/+3
The first lockup fence will lock the fence list of scheduler. Then cancel the delayed workqueues for all clean pending fences without waiting the workqueues to finish. Change-Id: I9bec826de1aa49d587b0662f3fb4a95333979429 Signed-off-by: Junwei Zhang <[email protected]> Reviewed-by: Christian König <[email protected]>
2015-10-14drm/amdgpu: add timer to fence to detect scheduler lockupJunwei Zhang3-3/+61
Change-Id: I67e987db0efdca28faa80b332b75571192130d33 Signed-off-by: Junwei Zhang <[email protected]> Reviewed-by: David Zhou <[email protected]> Reviewed-by: Christian König <[email protected]>
2015-10-14drm/amdgpu: add VM CS mapping trace pointChristian König2-1/+19
Output all VM mappings a command submission uses. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu: add option to clear VM page tables after every submitChristian König3-1/+21
This makes it much easier to find when userspace misses to send some buffers. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu: add option to stop on VM faultChristian König4-6/+80
Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu: only print meaningful VM faultsChristian König2-4/+12
Port of radeon commit 9b7d786b900baf7c0d1a7e211570aef1cb27590f. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu: also trace already allocated VMIDsChristian König1-1/+3
Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu: Drop unnecessary #include <linux/vga_switcheroo.h>Lukas Wunner2-2/+0
This was added to two radeon files even though they don't use any vga_switcheroo symbols, the amdgpu fork inherited them: Added to amdgpu_acpi.c by commit d7a2952f1ade ("drm/radeon: Add support for the ATIF ACPI method to the radeon driver"). Added to amdgpu_bios.c by commit 6a9ee8af344e ("vga_switcheroo: initial implementation (v15)"). Signed-off-by: Lukas Wunner <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-10-14drm/radeon: Drop unnecessary #include <linux/vga_switcheroo.h>Lukas Wunner3-3/+0
This was added to three files even though they don't use any vga_switcheroo symbols: Added to radeon_acpi.c by commit d7a2952f1ade ("drm/radeon: Add support for the ATIF ACPI method to the radeon driver"). Added to radeon_asic.c by commit 0a10c85129c2 ("drm/radeon: create radeon_asic.c"). Added to radeon_bios.c by commit 6a9ee8af344e ("vga_switcheroo: initial implementation (v15)"). Signed-off-by: Lukas Wunner <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu: clean up pageflip interrupt handlingAlex Deucher3-159/+51
Check to make sure we aren't touching a non-existent display controller and simplify the code. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu: rework sdma structuresAlex Deucher9-258/+245
Rework the sdma structures in the driver to consolidate all of the sdma info into a single structure and allow for asics that may have different numbers of sdma instances. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu: unpin cursor BOs on suspend and pin them again on resumeAlex Deucher1-1/+30
Everything is evicted from VRAM before suspend, so we need to make sure all BOs are unpinned and re-pinned after resume. Fixes broken mouse cursor after resume introduced by commit b9729b17. Port of radeon commit: f3cbb17bcf676a2fc6aedebe9fbebd59e550c51a Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu/dce8: Fold set_cursor() into show_cursor()Alex Deucher1-13/+5
Port of radeon commit: 8991668ab4e26f985a8485719bce5d6d0623a644 Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu/dce8: Clean up reference counting and pinning of the cursor BOsAlex Deucher1-37/+24
Take a GEM reference for and pin the new cursor BO, unpin and drop the GEM reference for the old cursor BO in dce8 crtc_cursor_set2, and use amdgpu_crtc->cursor_addr in dce8 set_cursor. This fixes dce8 cursor_reset accidentally incrementing the cursor BO pin count, and cleans up the code a little. Port of radeon commit: cd404af0c930104462aa91344f07d002cf8248ed Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu/dce8: Move hotspot handling out of set_cursorAlex Deucher1-19/+17
It's only needed in dce8 crtc_cursor_set2. Port of radeon commit: 2e007e611bc0a46dfed1547e0228a57f800e703d Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu/dce8: Re-show the cursor after a modeset (v2)Alex Deucher1-24/+57
Setting a mode seems to clear the cursor registers, so we need to re-program them to make sure the cursor is visible. Port of radeon commit: 6d3759fac636028849f3bbec80c4b77e9bfdb1d2 v2: change radeon reference in error message Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu/dce8: Use cursor_set2 hook for enabling / disabling the HW cursorAlex Deucher1-23/+51
The cursor_set2 hook provides the cursor hotspot position within the cursor image. When the hotspot position changes, we can adjust the cursor position such that the hotspot doesn't move on the screen. This prevents the cursor from appearing to intermittently jump around on the screen when the position of the hotspot within the cursor image changes. Port of radeon commits: 78b1a6010b46a69bcd47b723a80f92693f26d17b 3feba08d79c32777a845c3c8a4ab93092bdf6f19 Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu/dce11: Fold set_cursor() into show_cursor()Alex Deucher1-13/+5
Port of radeon commit: 8991668ab4e26f985a8485719bce5d6d0623a644 Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu/dce11: Clean up reference counting and pinning of the cursor BOsAlex Deucher1-37/+24
Take a GEM reference for and pin the new cursor BO, unpin and drop the GEM reference for the old cursor BO in dce11 crtc_cursor_set2, and use amdgpu_crtc->cursor_addr in dce11 set_cursor. This fixes dce11 cursor_reset accidentally incrementing the cursor BO pin count, and cleans up the code a little. Port of radeon commit: cd404af0c930104462aa91344f07d002cf8248ed Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu/dce11: Move hotspot handling out of set_cursorAlex Deucher1-19/+17
It's only needed in dce11 crtc_cursor_set2. Port of radeon commit: 2e007e611bc0a46dfed1547e0228a57f800e703d Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu/dce11: Re-show the cursor after a modeset (v2)Alex Deucher1-24/+57
Setting a mode seems to clear the cursor registers, so we need to re-program them to make sure the cursor is visible. Port of radeon commit: 6d3759fac636028849f3bbec80c4b77e9bfdb1d2 v2: change radeon reference in error output Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu/dce11: Use cursor_set2 hook for enabling / disabling the HW cursorAlex Deucher1-23/+51
The cursor_set2 hook provides the cursor hotspot position within the cursor image. When the hotspot position changes, we can adjust the cursor position such that the hotspot doesn't move on the screen. This prevents the cursor from appearing to intermittently jump around on the screen when the position of the hotspot within the cursor image changes. Port of radeon commits: 78b1a6010b46a69bcd47b723a80f92693f26d17b 3feba08d79c32777a845c3c8a4ab93092bdf6f19 Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu/dce10: Fold set_cursor() into show_cursor()Alex Deucher1-13/+5
Port of radeon commit: 8991668ab4e26f985a8485719bce5d6d0623a644 Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu/dce10: Clean up reference counting and pinning of the cursor BOsAlex Deucher1-37/+24
Take a GEM reference for and pin the new cursor BO, unpin and drop the GEM reference for the old cursor BO in dce10 crtc_cursor_set2, and use amdgpu_crtc->cursor_addr in dce10 set_cursor. This fixes dce10 cursor_reset accidentally incrementing the cursor BO pin count, and cleans up the code a little. Port of radeon commit: cd404af0c930104462aa91344f07d002cf8248ed Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu/dce10: Move hotspot handling out of set_cursorAlex Deucher1-19/+17
It's only needed in dce10 crtc_cursor_set2. Port of radeon commit: 2e007e611bc0a46dfed1547e0228a57f800e703d Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu/dce10: Re-show the cursor after a modeset (v2)Alex Deucher1-24/+57
Setting a mode seems to clear the cursor registers, so we need to re-program them to make sure the cursor is visible. Port of radeon commit: 6d3759fac636028849f3bbec80c4b77e9bfdb1d2 v2: change radeon reference in error message Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu/dce10: Use cursor_set2 hook for enabling / disabling the HW cursorAlex Deucher2-23/+55
The cursor_set2 hook provides the cursor hotspot position within the cursor image. When the hotspot position changes, we can adjust the cursor position such that the hotspot doesn't move on the screen. This prevents the cursor from appearing to intermittently jump around on the screen when the position of the hotspot within the cursor image changes. Port of radeon commits: 78b1a6010b46a69bcd47b723a80f92693f26d17b 3feba08d79c32777a845c3c8a4ab93092bdf6f19 Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu/atom: add support for new div32 opcodes (v3)Alex Deucher2-2/+25
Better precision than the regular div opcode. v2: drop 64 bit divide v3: fix op handling. This actually is a 64 bit divide. Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu/atom: add support for new mul32 opcodes (v2)Alex Deucher2-2/+18
Better precision than the regular mul opcode. v2: handle big endian properly. Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu/atom: add support for process ds opcodeAlex Deucher1-1/+10
Just skips a data section. Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-10-14drm/amdgpu/atom: implement debug opcodeAlex Deucher1-1/+2
Basically a nop. Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-10-13Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds29-94/+219
Pull drm fixes from Dave Airlie: "I got a bit behind last week, so here is a delayed fixes pull: - a bunch of radeon/amd gpu fixes - some nouveau regression fixes (ppc bios reading and runtime pm fix) - one drm core oops fix - two qxl locking fixes - one qxl regression fix" * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: drm/nouveau/bios: fix OF loading drm/nouveau/fbcon: take runpm reference when userspace has an open fd drm/nouveau/nouveau: Disable AGP for SiS 761 drm/nouveau/display: allow up to 16k width/height for fermi+ drm/nouveau/bios: translate devinit pri/sec i2c bus to internal identifiers drm: Fix locking for sysfs dpms file drm/amdgpu: fix memory leak in amdgpu_vm_update_page_directory drm/amdgpu: fix 32-bit compiler warning drm/qxl: avoid dependency lock drm/qxl: avoid buffer reservation in qxl_crtc_page_flip drm/qxl: fix framebuffer dirty rectangle tracking. drm/amdgpu: flag iceland as experimental drm/amdgpu: check before checking pci bridge registers drm/amdgpu: fix num_crtc on CZ drm/amdgpu: restore the fbdev mode in lastclose drm/radeon: restore the fbdev mode in lastclose drm/radeon: add quirk for ASUS R7 370 drm/amdgpu: add pm sysfs files late drm/radeon: add pm sysfs files late
2015-10-13MAINTAINERS: add link to the Intel Graphics for Linux web siteJani Nikula1-0/+1
There's plenty of drm/i915 related hardware and software documentation, and firmware downloads for the latest platforms. Cc: Daniel Vetter <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2015-10-13drm/i915: Move skl/bxt gt specific workarounds to ring initMika Kuoppala2-61/+43
Some registers are, naturally, lost in gpu reset/suspend cycle. And some registers, for example in display domain, are not subject to gpu reset so they retain their contents. As hang recovery triggers a reset, recoverable gpu hang can currently flush out essential workarounds and cause havoc later on. When register GEN8_GARBNTL is missing the WaEnableGapsTsvCreditFix:skl, it can cause random system hangs [1]. This workaround was added in: commit 245d96670d26 ("drm/i915:skl: Add WaEnableGapsTsvCreditFix") But another set of system hangs were observed and the failure pattern indicated that there was random gpu hang preceding the system hang [2]. This lead to the realization that we lose this workaround and BDW_SCRATCH1 on reset. Add these workarounds setup in display init to skl/bxt ring init where LRI workarounds are also setup. This way their setup is not dependent on display side init. References: [1] https://bugs.freedesktop.org/show_bug.cgi?id=90854 References: [2] https://bugs.freedesktop.org/show_bug.cgi?id=92315 Reported-by: Tomi Sarvela <[email protected]> Cc: Tomi Sarvela <[email protected]> Cc: Ville Syrjälä <[email protected]> Signed-off-by: Mika Kuoppala <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Tested-by: Tomi Sarvela <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2015-10-13drm/i915: Drop i915_gem_obj_is_pinned() from set-cache-levelChris Wilson1-21/+78
Since the remove of the pin-ioctl, we only care about not changing the cache level on buffers pinned to the hardware as indicated by obj->pin_display. By knowing that only objects pinned to the hardware will have an elevated vma->pin_count, so we can coallesce many of the linear walks over the obj->vma_list. v2: Try and retrospectively add comments explaining the steps in rebinding the active VMA. Signed-off-by: Chris Wilson <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2015-10-13drm/i915: revert a few more watermark commitsPaulo Zanoni6-199/+293
This is a squash of the following commits: Revert "drm/i915: Drop intel_update_sprite_watermarks" This reverts commit 47c99438b52d12df50e182583634a4cfede3c920. Revert "drm/i915/ivb: Move WaCxSRDisabledForSpriteScaling w/a to atomic check" This reverts commit 7809e5ae35b9d8d0710f0874b2e3f10be144e38b. Revert "drm/i915/skl: Eliminate usage of pipe_wm_parameters from SKL-style WM (v3)" This reverts commit 3a05f5e2e78eab7ffe816abb59b6769e331a1957. With these reverts, SKL finally stops failing every single FBC test with FIFO underrun error messages. After some brief testing, it also seems that this commit prevents the machine from completely freezing when we run igt/kms_fbc_crc (see fd.o #92355). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92355 Cc: Matt Roper <[email protected]> Signed-off-by: Paulo Zanoni <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2015-10-13drm/i915: Remove dev_priv argument from NEEDS_FORCE_WAKEVille Syrjälä1-8/+8
Signed-off-by: Ville Syrjälä <[email protected]> Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2015-10-13drm/i915: Clean up LVDS register handlingVille Syrjälä1-16/+14
Keep single 'lvds_reg' and 'lvds' variable around in intel_lvds_init(), and read it just once at the start. Also intel_lvds_get_config() doesn't need to figure out which reg to use since it can just consult lvds_encoder->reg. Signed-off-by: Ville Syrjälä <[email protected]> Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2015-10-13drm/i915: Throw out some useless variablesVille Syrjälä3-60/+28
Drop some useless 'reg' variables when we only use them once. v2: A few more, including a few variable moves Signed-off-by: Ville Syrjälä <[email protected]> Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2015-10-13drm/i915: Parametrize and fix SWF registersVille Syrjälä3-25/+50
Parametrize the SWF registers. This also fixes the register offsets, which were mostly garbage in the old defines. Also save/restore only as many SWF registers that each platform has. Signed-off-by: Ville Syrjälä <[email protected]> Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2015-10-13drm/i915: s/PIPE_FRMCOUNT_GM45/PIPE_FRMCOUNT_G4X/ etc.Ville Syrjälä3-11/+11
The PIPE_FRMCOUNT_GM45 and PIPE_FLIPCOUNT_GM45 names have bothered me for a long time. The work equally well for ELK and onwards, so let's s/GM45/G4X/. Signed-off-by: Ville Syrjälä <[email protected]> Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2015-10-13drm/i915: Turn GEN5_ASSERT_IIR_IS_ZERO() into a functionVille Syrjälä1-14/+17
Signed-off-by: Ville Syrjälä <[email protected]> Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2015-10-13drm/i915: Fix a few bad hex numbers in register definesVille Syrjälä1-2/+2
A few register mask defines were missing the '0x' from hex numbers. Or at least I assume those were meant to be hex numbers. Put the '0x' in place. Signed-off-by: Ville Syrjälä <[email protected]> Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2015-10-13drm/i915: Protect register macro argumentsVille Syrjälä1-46/+46
Always put parens around macro argument evaluations. Signed-off-by: Ville Syrjälä <[email protected]> Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2015-10-13drm/i915: Include gpio_mmio_base in GMBUS reg definesVille Syrjälä2-37/+29
Signed-off-by: Ville Syrjälä <[email protected]> Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2015-10-13drm/i915: Parametrize HSW video DIP data registersVille Syrjälä3-28/+32
Signed-off-by: Ville Syrjälä <[email protected]> Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2015-10-13drm/i915: Eliminate weird parameter inversion from BXT PPS registersVille Syrjälä1-4/+4
v2: Keep using the same registers (PCH_*) instead of accidentally starting to use the other ones (BXT_*)2) (Jesse) Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2015-10-13drm/i915: Hold dev->event_lock whilst inspecting intel_crtc->unpin_workChris Wilson1-25/+32
We should serialise access to the intel_crtc->unpin_work through the dev->event_lock spinlock. It should not be possible for it to disappear without severe error as the mmio_flip worker has not tagged the unpin_work pending flip-completion. Similarly if the error exists, just taking the unpin_work whilst holding the spinlock and then using it unserialised just masks the race. (It is supposed to be valid as the unpin_work exists until the flip completion interrupt which should not fire until we flush the mmio writes to update the display base which is the last time we access the unpin_work from the kthread.) References: https://bugs.freedesktop.org/show_bug.cgi?id=92335 Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2015-10-13i915: switch from acpi_os_ioremap to memremapWilliams, Dan J5-62/+62
i915 expects the OpRegion to be cached (i.e. not __iomem), so explicitly map it with memremap rather than the implied cache setting of acpi_os_ioremap(). Cc: Daniel Vetter <[email protected]> Cc: Jani Nikula <[email protected]> Cc: [email protected] Cc: David Airlie <[email protected]> Cc: [email protected] Signed-off-by: Dan Williams <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
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