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2019-08-23drm/amd/display: set av_mute in hw_init for HDMICharlene Liu4-0/+28
[Description] OS will reserve HW state in UEFI mode. Driver init_hw reset to RGB which caused HDMI green in YCbCr mode. read HW blank_color based on acc_mode. Signed-off-by: Charlene Liu <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: Add Logging for Gamma Related informationWyatt Wood2-8/+8
[Why] A recent bug showed that logging would be useful in debugging various gamma issues. [How] Add logging in dc. Fix formatting for easier graphing. Signed-off-by: Wyatt Wood <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: Enable HW rotationJaehyun Chung3-5/+60
[Why] HW rotation is not enabled. Calculations for cursor rotation are wrong for the values passed to set_cursor_position. [How] Swap Src rect and height and vertically mirror surface for the correct surface rotation direction. Cursor position is rotated according to angle. Offset calculations are tweaked for non-rotated cursor hotspot and width/height. Signed-off-by: Jaehyun Chung <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: add Cursor Degamma logic for DCN2Bayan Zabihiyan7-9/+15
[Why] We need to have the ability to to tell us set degamma on the cursor. [How] Pass a flag down to register programming that tells us if the current surface format needs cursor degamma. Signed-off-by: Bayan Zabihiyan <[email protected]> Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: fix odm validationDmytro Laktyushkin1-21/+19
Update bw validation to use prev and next odm pipe pointers for populating dml inputs. Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: fix odm stream releaseDmytro Laktyushkin1-33/+32
Need to memset all odm pipes when calling dc_remove_stream_from_ctx Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: fix dcn20 odm dpp programmingDmytro Laktyushkin2-1/+7
dcn20 requires special casing for odm. This change treats odm as alternative to mpc tree on dcn20. This is planned to be fixed in a future refactor Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: Fix number of slices not being checked for dscNikola Cornij1-1/+1
[why] num_slices_h was not being checked [How] Fix the typo and check num_slices_h Signed-off-by: Nikola Cornij <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: fix odm pipe copyDmytro Laktyushkin2-1/+7
ODM next and prev pipe were missing from dc_copy_state Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Nikola Cornij <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: fix trigger not generated for freesyncYogesh Mohan Marimuthu1-0/+3
[Why] In newer hardware MANUAL_FLOW_CONTROL is not a trigger bit. Due to this front porch is fixed and in these hardware freesync does not work. [How] Change the programming to generate a pulse so that the event will be triggered, front porch will be cut short and freesync will work. Signed-off-by: Yogesh Mohan Marimuthu <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: fix stuck test pattern on right half of displayZi Yu Liao1-1/+1
[why] With visual confirm enabled, displays where ODM combine is enabled has a test pattern stuck on the right half of the display even though the display is unblanked. [how] Add a condition to not show the colour ramp test pattern when the display is unblanked. Signed-off-by: Zi Yu Liao <[email protected]> Reviewed-by: Eric Yang <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: support spdifCharlene Liu2-11/+10
[Description] port spdif fix to staging: spdif hardwired to afmt inst 1. spdif func pointer spdif resource allocation (reserve last audio endpoint for spdif only) Signed-off-by: Charlene Liu <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: Refactoring VTEMAhmad Othman4-220/+148
[Why] Video Timing Extended Metadata packet (VTEM) is not specific to freesync. So move it out of freesync module [How] - Moved VTEM from freesync module to info_packet module - Created new structure for VTEM parameters that can be used for VRR and FVA Signed-off-by: Ahmad Othman <[email protected]> Reviewed-by: Chris Park <[email protected]> Acked-by: Ahmad Othman <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: 3.2.47Anthony Koo1-1/+1
Signed-off-by: Anthony Koo <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: remove unused functionQingqing Zhuo2-6/+0
[Why] This function is not being used, it was left in when introducing DCN2 [How] Remove the function Signed-off-by: Qingqing Zhuo <[email protected]> Reviewed-by: Eric Bernstein <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: cleaned up coding error in init_hwMartin Leung1-11/+0
[why] during a refactor a redundant code that has unknown behaviour was added. [how] removed old bad code Fixes: 8a31820b1218 ("drm/amd/display: Make init_hw and init_pipes generic for seamless boot") Signed-off-by: Martin Leung <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: Add VM page fault handle implementationJaehyun Chung6-3/+21
[How] Allocate memory for default page and program memory block addr into default page addr register. Signed-off-by: Jaehyun Chung <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: refactor Device ID for external chipsQingqing Zhuo3-10/+23
IEEE OUI will now be used while referring to certain vendors. instead of normal index Signed-off-by: Qingqing Zhuo <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: Zero-out dsc init regsNikola Cornij1-0/+2
[why] Before a statically allocated PPS data structure, that did get zeroed-out at startup, had been re-used for making packed PPS SDP. With S3 fix, using a non-initialized PPS data structure was introduced, while wrongly assuming it'd get initialized before it's populated. As a consequence 'vbr_enable' and perhaps some other fields are left uninitialized when making packed PPS SDP. This can affect 'simple_422' as well because of the way PPS SDP packing is done (the fields are not masked first, only shifted). The behavior will be different, depending on the content of uninitialized data. [how] Zero-out PPS data structure at initialization time before it's populated Fixes: 1a9e3d4569fc ("drm/amd/display: Set DSC before DIG front-end is connected to its back-end") Signed-off-by: Nikola Cornij <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: Implement voltage limitation stubJoseph Gravenor1-1/+9
add new function to get the voltage at the end of dcn_validate_bandwidth, to check against the highest voltage we allow. Created a stub to allow for optimizations Signed-off-by: Joseph Gravenor <[email protected]> Reviewed-by: Eric Yang <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Acked-by: Sun peng Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: add null checks before loggingWyatt Wood1-3/+6
Adding NULL checks to various parameters in log_tf, to avoid nullptr errors Signed-off-by: Wyatt Wood <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Acked-by: Nikola Cornij <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: set Hratio and VRatio in dmlIlya Bakoulin1-0/+4
Set the writeback Hratio and Vratio in dml. Signed-off-by: Ilya Bakoulin <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: fix dp stream enableDmytro Laktyushkin2-3/+3
A previous odm change broke stream enable by always setting n_multiply as if odm was on. This fixes the check for odm by making sure opp count is >1 rather than not 0. Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: load iram for abm 2.3Josip Pavic1-12/+109
[Why] ABM 2.3 firmware expects information in iRAM that differs from previous versions of ABM, so a mechanism is required to provide it with that information. [How] Extend the existing iRAM definition to include parameters added by ABM 2.3, and load it if DMCU is running ABM 2.3. Signed-off-by: Josip Pavic <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: fix MPO HUBP underflow with Scatter GatherZi Yu Liao1-0/+3
[why] With Scatter Gather enabled, HUBP underflows during MPO enabled video playback. hubp_init has a register write that fixes this problem, but the register is cleared when HUBP gets power gated. [how] Make a call to hubp_init during enable_plane, so that the fix can be applied after HUBP powers back on again. Signed-off-by: Zi Yu Liao <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: fix audio endpoint not getting disabled issueSu Sung Chung10-42/+74
[Why] Disable_audio_stream gets enum option as a paramenter which will decide if we free acquired resources or not. However checks for the option is guarded by the other condition which check if audio stream is getting diabled more than once. With both conditions combined, if we attempt to disable audio stream twice in a row, first with keep and second with free as an option, we will never free any resources, which will make system think there is audio endpoint connected even after we plug out the device [How] Get rid of option as parameter to disable_audio_stream and move the part of the code that free acquired resources to outside where to keep or to free resources is actually determined Signed-off-by: Su Sung Chung <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: Delete dead code in command_table_helperJulian Parkin3-96/+12
[Why] dig_encoder_sel_to_atom will always return zero on any ASIC version past DCE80 since programming of the FE selection is handled by driver, but the translation code was left in the function, making it look like a coding error. [How] Remove code that has no effect, and replace with a comment describing why it returns zero. Signed-off-by: Julian Parkin <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: re structure odm to allow 4 to 1 supportDmytro Laktyushkin12-265/+316
Currently odm is handled using top_bottom pipe by special casing the differing opps to differentiate from mpc combine. Since top/bottom pipe list was made to track mpc muxing this creates difficulties in adding a 4 pipe odm case support. Rather than continue using mpc combine list, this change reworks odm to use it's own linked list to keep track of odm combine pipes. This also opens up options for using mpo with odm, if a practical use case is ever found. Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amdgpu: set adev->num_vmhubs for gmc6,7,8Alex Deucher3-0/+6
So that we properly handle them on older asics. Fixes: 3ff985485b29 ("drm/amdgpu: Export function to flush TLB of specific vm hub") Tested-by: Tom St Denis <[email protected]> Reviewed-by: Xiaojie Yuan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amdgpu/display: add flag for multi-display mclk switchingAlex Deucher4-2/+9
Add a dcfeaturemask flag for mclk switching. Disable by default; enable once the feature has seen more testing. Set amdgpu.dcfeaturemask=2 on the kernel command line in grub to enable this. Acked-by: Evan Quan <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/display: update bw_calcs to take pipe sync into account (v3)Alex Deucher1-2/+28
Properly set all_displays_in_sync so that when the data is propagated to powerplay, it's set properly and we can enable mclk switching when all monitors are in sync. v2: fix logic, clean up v3: check for blending chains, simplify logic Acked-by: Evan Quan <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amdgpu/powerplay/vega10: enable mclk switching if monitors are syncedAlex Deucher1-1/+2
If DC has synced the displays, we can enable mclk switching to save power. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amdgpu/powerplay/smu7: enable mclk switching if monitors are syncedAlex Deucher1-3/+4
If DC has synced the displays, we can enable mclk switching to save power. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/powerplay: Fix Vega20 power reading againKent Russell2-6/+8
For the 40.46 SMU release, they changed CurrSocketPower to AverageSocketPower, but this was changed back in 40.47 so just check if it's 40.46 and make the appropriate change Tested with 40.45, 40.46 and 40.47 successfully Signed-off-by: Kent Russell <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23amd/amdkfd: add Arcturus vf DID supportFrank.Min1-0/+1
Add the virtual function PCI device id. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Frank.Min <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amd/powerpaly: fix navi series custom peak level value errorKevin Wang1-0/+4
fix other navi asic set peak performance level error. because the navi10_ppt.c will handle navi12 14 asic, it will use navi10 peak value to set other asic, it is not correct. after patch: only navi10 use custom peak value, other asic will used default value. Signed-off-by: Kevin Wang <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23drm/amdgpu: correct ras error count typeGuchun Chen4-7/+7
Use unsigned long type for the same ras count variable. This will avoid overflow on 64 bit system. Signed-off-by: Guchun Chen <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-23omapdrm: no need to check return value of debugfs_create functionsGreg Kroah-Hartman1-9/+2
When calling debugfs functions, there is no need to ever check the return value. The function can work or not, but the code logic should never do something different based on this. Cc: Tomi Valkeinen <[email protected]> Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Laurent Pinchart <[email protected]> Cc: Sebastian Reichel <[email protected]> Cc: Jyri Sarha <[email protected]> Cc: Tony Lindgren <[email protected]> Cc: zhong jiang <[email protected]> Cc: [email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]> Signed-off-by: Tomi Valkeinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Laurent Pinchart <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-08-23drm/omap: Add 'alpha' and 'pixel blend mode' plane propertiesJean-Jacques Hiblot1-1/+8
Add the following properties for planes: * alpha * pixel blend mode. Only "Pre-multiplied" and "Coverage" are supported Signed-off-by: Jean-Jacques Hiblot <[email protected]> Signed-off-by: Tomi Valkeinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-08-23Merge branch 'linux-5.4' of git://github.com/skeggsb/linux into drm-nextDave Airlie70-286/+685
This is mostly just the stuff I missed last round. Various cleanup patches + fixes, improvements to display colour management, and some code to avoid loading when power cables aren't properly attached. Signed-off-by: Dave Airlie <[email protected]> From: Ben Skeggs <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/CACAvsv7hqj9_VHq+YiGL8Z8XsU2vPbqbNPC=LeN1Rb0XxMQypQ@mail.gmail.com
2019-08-23drm/nouveau/volt: Fix for some cards having 0 maximum voltageMark Menzynski1-0/+2
Some, mostly Fermi, vbioses appear to have zero max voltage. That causes Nouveau to not parse voltage entries, thus users not being able to set higher clocks. When changing this value Nvidia driver still appeared to ignore it, and I wasn't able to find out why, thus the code is ignoring the value if it is zero. CC: Maarten Lankhorst <[email protected]> Signed-off-by: Mark Menzynski <[email protected]> Reviewed-by: Karol Herbst <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/dispnv50: Fix runtime PM ref tracking for non-blocking modesetsLyude Paul2-24/+17
This is something that got noticed a while ago back when I was fixing a large number of runtime PM related issues in nouveau, but never got fixed: https://patchwork.freedesktop.org/series/46815/#rev7 It's not safe to iterate the entire list of CRTCs in nv50_disp_atomic_commit(), as we could be doing a non-blocking modeset on one CRTC in parallel with one or more other CRTCs. Likewise, this means it's also not safe to do so in order to track runtime PM state. While this code is certainly wrong, so far the only issues I've seen this cause in the wild is the occasional PM ref unbalance after an atomic check failure + module reloading (since the PCI device will outlive nouveau in such scenarios). So, do this far more elegantly: grab a runtime PM ref across the modeset and commit tail, then grab/put references for each CRTC enable/disable. This also ends up being much simpler then the previous broken solution we had. Finally, since we've removed all it's users: get rid of nouveau_drm->have_disp_power_ref. Signed-off-by: Lyude Paul <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/dispnv04: Remove runtime PMLyude Paul1-50/+1
Originally when trying to fix the issue of runtime PM references with non-blocking CRTCs on nv50, I ended up stumbling on this code when trying to remove nouveau_drm->have_disp_power_ref, and attempted to fix it to remove the dependency on have_disp_power_ref. However, Ilia Mirkin pointed out that this code is actually completely useless, as pre-nv50 never had runtime PM support in the first place! Go figure. So, since it's useless just get rid of it. Note that since the only thing nouveau_crtc_set_config() was doing was grabbing a runtime PM ref, calling drm_crtc_helper_set_config() then dropping the ref; we can just remove the function entirely and just call drm_crtc_helper_set_config() directly. Signed-off-by: Lyude Paul <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/gpio: check function 76 in the power check as wellMark Menzynski2-0/+2
Added GPIO is "Power Alert". It's uncertain if this GPIO is set on GPU initialization or only if a change is detected by the GPU at runtime. This GPIO can be found on Tesla and sometimes on Fermi GPUs. Untested, wrote according to documentation. Signed-off-by: Mark Menzynski <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/gpio: check the gpio function 16 in the power check as wellMark Menzynski2-0/+2
Added GPIO is "Thermal and External Power Detect". It's uncertain if this GPIO is set on GPU initialization or only if a change is detected by the GPU at runtime. This GPIO can be found in Rankine and Curie and rarely on Tesla GPUs VBIOS. Untested, wrote according to documentation. Signed-off-by: Mark Menzynski <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/gpio: fail if gpu external power is missingMark Menzynski2-0/+31
Currently, nouveau doesn't check if GPU is missing power. This patch makes nouveau fail when this happens on latest GPUs. It checks GPIO function 121 (External Power Emergency), which should detect power problems on GPU initialization. This can be disabled with nouveau.config=NvPowerChecks=1 Tested on TU104, GP106 and GF100. v3: * Add config override for disabling power checks Signed-off-by: Mark Menzynski <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/bios/gpio: sort gpios by valuesMark Menzynski1-1/+1
One gpio was in wrong place, moved it for better readability. Signed-off-by: Mark Menzynski <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/therm: don't attempt fan control where PMU is already managing itBen Skeggs3-3/+23
There's already a condition in place which attempts to detect this, but since we've begun to require a PMU subdev even on boards where we don't load a custom FW, it's become inaccurate. This will prevent unnecessarily running a periodic fan update thread on GP100 and newer, where we don't yet override the default PMU FW. Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/therm: skip probing for devices not specified in thermal tablesBen Skeggs3-0/+18
Saves some time during driver load, as described by the relevant section[1] of the DCB 4.x specification. [1] https://nvidia.github.io/open-gpu-doc/DCB/DCB-4.x-Specification.html#_i2c_device_table Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/kms/gv100-: attach pixel blend mode property to planesBen Skeggs3-1/+28
Signed-off-by: Ben Skeggs <[email protected]>
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