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2019-08-22drm/amd/powerplay: init smu tables for rnAaron Liu2-0/+48
Initialize smu tables for renoir: WATERMARKS/DPMCLOCKS/SMU_METRICS Signed-off-by: Aaron Liu <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amd/powerplay: add smu tables for rnAaron Liu2-0/+29
add and map smu tables for renoir Signed-off-by: Aaron Liu <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amd/powerplay: using valid mapping check for rnAaron Liu2-6/+12
Check whether the message mapping is valid Signed-off-by: Aaron Liu <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amd/powerplay: fix checking gfxoff status for rnAaron Liu1-15/+35
For renoir, it should use mmSMUIO_GFX_MISC_CNTL to check gfxoff status. For the first time to enter gfxoff status, it maybe takes about one second more. So just set the max timeout to 5s. GFXOFF_STATUS(bits 2:1)'s description is below: 0=GFXOFF(default). 1=Transition out of GFX State. 2=Not in GFXOFF. 3=Transition into GFXOFF. Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu: add and enable gfxoff featureAaron Liu3-1/+49
This patch updates gfxoff feature. Signed-off-by: Aaron Liu <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu: add set_gfx_cgpg implement (v2)Aaron Liu3-0/+18
add set_gfx_cgpg implement v2: check if using sw_smu (Alex) Signed-off-by: Aaron Liu <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amd/powerplay: udpate smu_v12_0_check_fw_version (v2)Aaron Liu2-10/+27
This interface support SMU_MSG_GetDriverIfVersion and SMU_MSG_GetSmuVersion checking. v2: squash in driver_if changes (Alex) Signed-off-by: Aaron Liu <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amd/powerplay: powerup sdma/vcn for all apu seriesHuang Rui1-2/+2
All apu series need powerup sdma and vcn via smu messages. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu/powerplay: add Renoir VCN power managementLeo Liu3-2/+21
Thus VCN can be powered up for normal operations Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu: skip dpm init for renoirHuang Rui1-0/+9
Renoir DPM is not functional so far, we skip it for the comment. Will revert this patch once SMU 12 is functional. Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu/powerplay: add power up/down SDMA interfaces for renoirAaron Liu4-6/+42
1.Implement PowerUpSDMA/PowerDownSDMA interfaces in the swSMU for renoir 2.adjust smu ip block ahead of gfx&sdma ip block Signed-off-by: Aaron Liu <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu/powerplay: add smu ip block for renoir (v2)Aaron Liu4-1/+24
add swSMU [smu_v12_0] for renoir v2: whitespace fixes (Alex) Signed-off-by: Aaron Liu <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu/powerplay: add smu_v12_0.c & smu_v12_0.h for renoirAaron Liu2-0/+207
add smu_v12_0.c & smu_v12_0.h for renoir Signed-off-by: Aaron Liu <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu/powerplay: add initial renoir_ppt.c for renoir (v3)Aaron Liu3-0/+193
Add renoir_ppt and map ppsmc to amdgpu_smu.h v2: squash in ppsmc updates (Alex) v3: squash in driver_if updates (Alex) Signed-off-by: Aaron Liu <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amd/powerplay: add smu12_driver_if.h (v3)Aaron Liu1-0/+217
This patch adds smu12_driver_if.h v2: squash in updates (Alex) v3: more updates (Alex) Signed-off-by: Aaron Liu <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu/powerplay: Add smu_v12_0_ppsmc.h (v2)Alex Deucher1-0/+106
This is the SMU v12 driver message interface. v2: squash in updates Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amd/display: fix a potential null pointer dereferenceColin Ian King1-1/+2
Currently the pointer init_data is dereferenced on the assignment of fw_info before init_data is sanity checked to see if it is null. Fix te potential null pointer dereference on init_data by only performing dereference after it is null checked. Addresses-Coverity: ("Dereference before null check") Fixes: 9adc8050bf3c ("drm/amd/display: make firmware info only load once during dc_bios create") Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu/powerplay: remove redundant assignment to variable baco_stateColin Ian King1-1/+1
Variable baco_state is initialized to a value that is never read and it is re-assigned later. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused Value") Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdkfd: Make deallocate_hiq_sdma_mqd staticYueHaibing1-1/+2
Fix sparse warning: drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c:1846:6: warning: symbol 'deallocate_hiq_sdma_mqd' was not declared. Should it be static? Reported-by: Hulk Robot <[email protected]> Signed-off-by: YueHaibing <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu/sdma5: fix number of sdma5 trap irq types for navi1xXiaojie Yuan1-1/+2
v2: set num_types based on num_instances navi1x has 2 sdma engines but commit "e7b58d03b678 drm/amdgpu: reorganize sdma v4 code to support more instances" changes the max number of sdma irq types (AMDGPU_SDMA_IRQ_LAST) from 2 to 8 which causes amdgpu_irq_gpu_reset_resume_helper() to recover irq of sdma engines with following logic: (enable irq for sdma0) * 1 time (enable irq for sdma1) * 1 time (disable irq for sdma1) * 6 times as a result, after gpu reset, interrupt for sdma1 is lost. Signed-off-by: Xiaojie Yuan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amd/display: Enable SST DSC in DMDavid Francis2-12/+24
In create_stream_for_sink, check for SST DP connectors Parse DSC caps to DC format, then, if DSC is supported, compute the config DSC hardware will be programmed by dc_commit_state Tested-by: Mikita Lipski <[email protected]> Signed-off-by: David Francis <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22Revert "drm/amd/display: Fix underscan not using proper scaling"David Francis1-11/+1
This reverts commit 80e80ec817f161560b4159608fb41bd289abede3. This commit fixed an issue with underscan commits not updating all needed timing values, but through various refactors it is no longer necessary. It causes corruption on odm combine by overwriting the halved h_active in the stream timing Signed-off-by: David Francis <[email protected]> Reviewed-by: Roman Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22Revert "drm/amd/display: add global master update lock for DCN2"David Francis4-71/+1
This reverts commit 6c5be4ac630805d3a3b20157a0c6421ef815fe78. This commit was accidentally promoted twice Signed-off-by: David Francis <[email protected]> Reviewed-by: Roman Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22Revert "drm/amd/display: navi10 bring up skip dsc encoder config"David Francis1-8/+0
This reverts commit ec8763486dd3d2fb585c2e6747520406e7dcef98. Re-enable enc2_dp_set_dsc_config. This function caused warnings due to missing register definitions. With the registers added, this now works Signed-off-by: David Francis <[email protected]> Reviewed-by: Roman Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22Revert "drm/amd/display: skip dsc config for navi10 bring up"David Francis1-9/+0
This reverts commit 9e14d4f17e23ce46d346a6a22a295b4a65b9d918. optc dsc config was causing warnings due to missing register definitions. With the registers restored, the function can be re-enabled The reverted commit also disabled sanity checks and dsc power gating. The sanity check warnings are not associated with dsc, and power gating on dsc still has an issue on non-dsc monitors where the dsc hardware block is never init and so cannot respond to power gating requests. Therefore, those are left as is Signed-off-by: David Francis <[email protected]> Reviewed-by: Roman Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu: fix dma_fence_wait without referenceChristian König1-12/+15
We need to grab a reference to the fence we wait for. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/powerplay: Fix Vega20 Average Power value v4Kent Russell2-2/+13
The SMU changed reading from CurrSocketPower to AverageSocketPower, so reflect this accordingly. This fixes the issue where Average Power Consumption was being reported as 0 from SMU 40.46-onward v2: Fixed headline prefix v3: Add check for SMU version for proper compatibility v4: Style fix Signed-off-by: Kent Russell <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22amd/amdgpu: add Arcturus vf DID supportFrank.Min1-0/+1
Reviewed-by: Feifei Xu <[email protected]> Signed-off-by: Frank.Min <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu: unity mc base address for arcturusFrank.Min1-6/+6
arcturus for sriov would use the unified mc base address Reviewed-by: Christian König <[email protected]> Signed-off-by: Frank.Min <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu: disable agp for sriovFrank.Min2-2/+9
Since agp is not used for sriov, just disable it Reviewed-by: Christian König <[email protected]> Signed-off-by: Frank.Min <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm: meson: use match data to detect vpu compatibilityJulien Masson11-62/+77
This patch introduce new enum which contains all VPU family (GXBB, GXL, GXM and G12A). This enum is used to detect the VPU compatible with the device. We only need to set .data to the corresponding enum in the device table, no need to check .compatible string anymore. Signed-off-by: Julien Masson <[email protected]> Tested-by: Neil Armstrong <[email protected]> Acked-by: Neil Armstrong <[email protected]> Signed-off-by: Neil Armstrong <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/87imqpz21w.fsf@masson.i-did-not-set--mail-host-address--so-tickle-me
2019-08-22drm/amdgpu/powerplay: silence a warning in smu_v11_0_setup_pptableAlex Deucher1-1/+1
I think gcc is confused as I don't see how size could be used uninitialized, but go ahead and silence the warning. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/i915: Update DRIVER_DATE to 20190822Rodrigo Vivi1-2/+2
Signed-off-by: Rodrigo Vivi <[email protected]>
2019-08-22drm/i915: Kill the undead i915_gem_batch_pool.cChris Wilson1-132/+0
You have to cut it off at the neck, otherwise it just reappears in the next merge, like it did in commit 3f866026f0ce ("Merge drm/drm-next into drm-intel-next-queued") References: 3f866026f0ce ("Merge drm/drm-next into drm-intel-next-queued") Signed-off-by: Chris Wilson <[email protected]> Cc: Rodrigo Vivi <[email protected]> Acked-by: Joonas Lahtinen <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-08-22drm/i915: Replace i915_vma_put_fence()Chris Wilson7-55/+53
Avoid calling i915_vma_put_fence() by using our alternate paths that bind a secondary vma avoiding the original fenced vma. For the few instances where we need to release the fence (i.e. on binding when the GGTT range becomes invalid), replace the put_fence with a revoke_fence. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Matthew Auld <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-08-22drm/i915: Pull obj->userfault tracking under the ggtt->mutexChris Wilson3-5/+11
Since we want to revoke the ggtt vma from only under the ggtt->mutex, we need to move protection of the userfault tracking from the struct_mutex to the ggtt->mutex. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Matthew Auld <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-08-22drm/i915: Track ggtt fence reservations under its own mutexChris Wilson6-49/+87
We can reduce the locking for fence registers from the dev->struct_mutex to a local mutex. We could introduce a mutex for the sole purpose of tracking the fence acquisition, except there is a little bit of overlap with the fault tracking, so use the i915_ggtt.mutex as it covers both. Signed-off-by: Chris Wilson <[email protected]> Cc: Mika Kuoppala <[email protected]> Reviewed-by: Matthew Auld <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-08-22drm: fix module name in edid_firmware log messageJani Nikula1-1/+1
The module is drm_kms_helper, not drm_kms_firmware. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=204549 Reported-by: Göran Uddeborg <[email protected]> Fixes: ac6c35a4d8c7 ("drm: add backwards compatibility support for drm_kms_helper.edid_firmware") Reviewed-by: Daniel Vetter <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-08-22drm/i915: Generalise the clflush dma-workerChris Wilson4-80/+183
Extract the dma-fence worker used by clflush for wider use, as we anticipate using workers coupled to dma-fences more frequently. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Matthew Auld <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-08-22Merge drm/drm-next into drm-intel-next-queuedRodrigo Vivi1747-23141/+143286
We need the rename of reservation_object to dma_resv. The solution on this merge came from linux-next: From: Stephen Rothwell <[email protected]> Date: Wed, 14 Aug 2019 12:48:39 +1000 Subject: [PATCH] drm: fix up fallout from "dma-buf: rename reservation_object to dma_resv" Signed-off-by: Stephen Rothwell <[email protected]> --- drivers/gpu/drm/i915/gt/intel_engine_pool.c | 8 ++++---- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pool.c b/drivers/gpu/drm/i915/gt/intel_engine_pool.c index 03d90b49584a..4cd54c569911 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_pool.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_pool.c @@ -43,12 +43,12 @@ static int pool_active(struct i915_active *ref) { struct intel_engine_pool_node *node = container_of(ref, typeof(*node), active); - struct reservation_object *resv = node->obj->base.resv; + struct dma_resv *resv = node->obj->base.resv; int err; - if (reservation_object_trylock(resv)) { - reservation_object_add_excl_fence(resv, NULL); - reservation_object_unlock(resv); + if (dma_resv_trylock(resv)) { + dma_resv_add_excl_fence(resv, NULL); + dma_resv_unlock(resv); } err = i915_gem_object_pin_pages(node->obj); which is a simplified version from a previous one which had: Reviewed-by: Christian König <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]>
2019-08-22Merge branch 'etnaviv/next' of https://git.pengutronix.de/git/lst/linux into ↵Dave Airlie21-659/+922
drm-next Most importantly per-process address spaces on GPUs that are capable of providing proper isolation has finished baking. This is the base for our softpin implementation, which allows us to support the texture descriptor buffers used by GC7000 series GPUs without a major UAPI extension/rework. Shortlog of notable changes: - code cleanup from Fabio - fix performance counters on GC880 and GC2000 GPUs from Christian - drmP.h header removal from Sam - per process address space support on MMUv2 GPUs from me - softpin support from me Signed-off-by: Dave Airlie <[email protected]> From: Lucas Stach <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-08-21drm/amdkfd: remove set but not used variable 'pdd'YueHaibing1-11/+0
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_process.c: In function restore_process_worker: drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_process.c:949:29: warning: variable pdd set but not used [-Wunused-but-set-variable] It is not used since commit 5b87245faf57 ("drm/amdkfd: Simplify kfd2kgd interface") Reported-by: Hulk Robot <[email protected]> Signed-off-by: YueHaibing <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-21drm/amd/display: remove duplicated include from dc_link.cYueHaibing1-4/+0
Remove duplicated include. Reported-by: Hulk Robot <[email protected]> Signed-off-by: YueHaibing <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-21drm/amdgpu: remove duplicated include from gfx_v9_0.cYueHaibing1-1/+0
Remove duplicated include. Signed-off-by: YueHaibing <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-21drm/amdgpu: remove set but not used variable 'psp_enabled'YueHaibing1-5/+0
Fixes gcc '-Wunused-but-set-variable' warning: drivers/gpu/drm/amd/amdgpu/nv.c: In function 'nv_common_early_init': drivers/gpu/drm/amd/amdgpu/nv.c:471:7: warning: variable 'psp_enabled' set but not used [-Wunused-but-set-variable] It's not used since inroduction in commit c6b6a42175f5 ("drm/amdgpu: add navi10 common ip block (v3)") Signed-off-by: YueHaibing <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-21drm/amd/display: Fix 32-bit divide error in wait_for_alt_modeNathan Chancellor1-2/+2
When building arm32 allyesconfig: ld.lld: error: undefined symbol: __aeabi_uldivmod >>> referenced by dc_link.c >>> gpu/drm/amd/display/dc/core/dc_link.o:(wait_for_alt_mode) in archive drivers/built-in.a >>> referenced by dc_link.c >>> gpu/drm/amd/display/dc/core/dc_link.o:(wait_for_alt_mode) in archive drivers/built-in.a time_taken_in_ns is of type unsigned long long so we need to use div_u64 to avoid this error. Fixes: b5b1f4554904 ("drm/amd/display: Enable type C hotplug") Reported-by: Randy Dunlap <[email protected]> Acked-by: Randy Dunlap <[email protected]> # build-tested Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Nathan Chancellor <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-21drm/amdgpu: prevent memory leaks in AMDGPU_CS ioctlNicolai Hähnle1-2/+7
Error out if the AMDGPU_CS ioctl is called with multiple SYNCOBJ_OUT and/or TIMELINE_SIGNAL chunks, since otherwise the last chunk wins while the allocated array as well as the reference counts of sync objects are leaked. Signed-off-by: Nicolai Hähnle <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-21drm/amd/display: Lock the CRTC when setting CRC sourceNicholas Kazlauskas1-12/+51
[Why] We need to ensure that we're holding the lock on the CRTC when setting the CRC source since we're modifying the CRTC state directly. We also need to wait for any outstanding non-blocking commits to finish so they aren't reading state that's potentially being modified - non-blocking commits don't hold the CRTC lock while doing commit tail work. [How] Lock the CRTC using its mutex. While holding the lock check if there's any commit active on the CRTC - if there is, it's non-blocking and we should wait until it's finished by waiting for hw_done to be signaled since that's the last point where we touch CRTC state. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: David Francis <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-21drm/amd/display: Split out DC programming for CRC captureNicholas Kazlauskas3-44/+49
[Why] Calling amdgpu_dm_crtc_set_crc_source in amdgpu_dm directly has the consequence of adding additional vblank references or starting DPRX CRC capture more than once without calling stop first. Vblank references for CRC capture should be managed entirely by opening and closing the CRC file from userspace. Stream state also shouldn't be required on the CRC so we can close the file after the CRTC has been disabled. [How] Do DC programming required for configuring CRC capture separately from setting the source. Whenever we re-enable or reset a CRC this programming should be reapplied. CRC vblank reference handling in amdgpu_dm can be entirely dropped after this. Stream state also no longer needs to be required since we can just defer the programming to when the stream is actually enabled. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: David Francis <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-21drm/amd/display: Use connector list for finding DPRX CRC auxNicholas Kazlauskas1-4/+15
[Why] This change is a refactor in preparation for adding locking and removing the requirement for a stream state on the CRTC for enabling CRC capture to fix igt@kms_plane_multiple@* warnings. [How] We can get the aux by finding the matching connector for the CRTC with the assumption that we're not doing cloning. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: David Francis <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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