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2019-08-23drm/nouveau/kms/gv100-: attach alpha property to planesBen Skeggs3-1/+7
Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/kms/gv100-: add support for plane zpos propertyBen Skeggs5-12/+40
Has a nice side-effect that we only update HW for this when it changes now, rather than every time we do a page flip. Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/kms/nv50-: attach immutable zpos property to planesBen Skeggs2-0/+18
Defaulting to the fixed layout enforced in HW by EVO, and that we currently use by default on NVD. Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/kms/nv50-: create primary plane before overlay planesBen Skeggs1-7/+7
zpos normalisation uses plane id to determine ordering for duplicate zpos values, and we likely want to keep primary plane on the bottom here. Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/kms/nv50-: use __drm_atomic_helper_plane_reset()Ben Skeggs1-3/+2
We have some of this open-coded already, use the helper to prevent problems when adding (for example) support for the alpha property. Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/kms/gv100-: implement csc + enable modern colour managment ↵Ben Skeggs5-7/+99
properties Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/kms/gv100-: use premultiplied alpha blending between planesBen Skeggs1-3/+3
This is apparently the assumed default behaviour when blend properties are absent. Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/kms/nv50-: enable modern color management propertiesIlia Mirkin1-0/+5
For GF119:GV100, we can enable DEGAMMA/CTM/GAMMA. For earlier GPUs, as there is no CTM, having both degamma and gamma is a bit pointless. Later GPUs currently lack an implementation. Signed-off-by: Ilia Mirkin <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/kms/gf119-: add ctm property supportIlia Mirkin4-0/+89
This adds support on GF119:GV100 (exclusive) for CTM (aka CSC). Signed-off-by: Ilia Mirkin <[email protected]>
2019-08-23drm/nouveau/kms/nv50-: remove overlay alpha formatsIlia Mirkin4-14/+0
The overlay logic can only do colorkey-based selection, not alpha-blending. Signed-off-by: Ilia Mirkin <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/fifo/gk104-: fix parsing of mmu fault dataBen Skeggs10-26/+67
Pascal was particularly incorrect, as the register changed to be more in the same format as the MMU fault buffers are. Shouldn't have impacted much more than confusing MMU fault log messages. Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/fifo/gf1xx: convert to using nvkm_fault_dataBen Skeggs3-86/+106
Would like to be able to reuse gf100_fifo_intr_fault() for (some of) the later chipsets too, as it's identical. Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/bios/init: handle INIT_RESET_END devinit opcodeRhys Kidd1-1/+12
Signal that the reset sequence has completed. This opcode signals that the software reset sequence has completed. Ordinarily, no actual operations are performed by the opcode. However it allows for possible software work arounds by devinit engines in software agents other than the VBIOS, such as the resman, FCODE, and EFI driver. Signed-off-by: Rhys Kidd <[email protected]> Reviewed-by: Lyude Paul <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/bios/init: handle INIT_RESET_BEGUN devinit opcodeRhys Kidd1-1/+12
Signal that the reset sequence has begun. This opcode signals that the software reset sequence has begun. Ordinarily, no actual operations are performed by the opcode. However it allows for possible software work arounds by devinit engines in software agents other than the VBIOS, such as the resman, FCODE, and EFI driver. Signed-off-by: Rhys Kidd <[email protected]> Reviewed-by: Lyude Paul <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/bios: downgrade absence of tmds table to info from an errorRhys Kidd1-1/+1
Absence of a TMDS Info Table is common on Optimus setups where the NVIDIA gpu is not connected directly to any outputs. Reporting an error in this scenario is too harsh. Accordingly, change the error message to an info message. By default the error message also causes a boot flicker for these sytems. Signed-off-by: Rhys Kidd <[email protected]> Reviewed-by: Lyude Paul <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau: Disable atomic support on a per-device basisVille Syrjälä1-1/+1
We now have per-device driver_features, so let's use that to disable atomic only for pre-nv50. Cc: Ben Skeggs <[email protected]> Cc: Lyude Paul <[email protected]> Cc: [email protected] Cc: Daniel Vetter <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Suggested-by: Daniel Vetter <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Reviewed-by: Lyude Paul <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/kms/nv50-: add fp16 scanout supportIlia Mirkin7-18/+66
Older hardware seems to want 0..1024 values, while new hardware takes 0..1 values. We set the gain to 1024 for the earlier display classes. Signed-off-by: Ilia Mirkin <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/kms/nv50-: disable input lut harderBen Skeggs1-0/+2
Under some circumstances, it could be left enabled when it shouldn't be. Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/kms/tu102-: disable input lut when input is already FP16Ben Skeggs1-1/+3
On Turing, an input LUT is required to transform inputs in fixed-point formats to FP16 for the internal display pipe. We provide an identity mapping whenever a window is enabled for this reason. HW has error checks to ensure when the input is already FP16, that the input LUT is also disabled. Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/kms/gv100: allow windows to use PACKED8BPP formatsBen Skeggs1-1/+1
Required for upcoming FP16 scanout support. Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau: fix nvif/device.h is included more than onceHariprasad Kelam1-1/+0
remove duplicate inclusion of nvif/device.h Issue identified by includecheck Signed-off-by: Hariprasad Kelam <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/dispnv04: subdev/bios.h is included more than onceHariprasad Kelam1-1/+0
remove duplicate inclusion of subdev/bios.h Issue identified by includecheck Signed-off-by: Hariprasad Kelam <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/mmu: use struct_size() helperGustavo A. R. Silva1-1/+1
Make use of the struct_size() helper instead of an open-coded version in order to avoid any potential type mistakes, in particular in the context in which this code is being used. So, replace the following form: sizeof(*kind) + sizeof(*kind->data) * mmu->kind_nr; with: struct_size(kind, data, mmu->kind_nr) This code was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau: drop use of drmp.hSam Ravnborg23-28/+14
Drop use of the deprecated drmP.h file from drm/nouveau. Build tested using allyesconfig and allmodconfig. Signed-off-by: Sam Ravnborg <[email protected]> Cc: Ben Skeggs <[email protected]> Cc: [email protected] Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau: drop drmP.h from all header filesSam Ravnborg4-4/+3
Drop include of the deprecated drmP.h from all nouveau heder files. This allows us to remove drmP.h from all .c files without any side-effects in a follow-up commit. Build tested using allyeyconfig and allmodconfig Signed-off-by: Sam Ravnborg <[email protected]> Cc: Ben Skeggs <[email protected]> Cc: [email protected] Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau: drop drmP.h from nouveau_drv.hSam Ravnborg5-1/+13
Drop the deprecated drmP.h header from nouveau_drv.h. Fix fallout in other parts of the driver. Build tested using allmodconfig and allyesconfig. Signed-off-by: Sam Ravnborg <[email protected]> Cc: Ben Skeggs <[email protected]> Cc: [email protected] Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau: drop use of DRM_UDELAYSam Ravnborg1-1/+1
The DRM_UDELAY is a simple wrapper for udealy() and to be consistent call udelay() direct like in may other places. This avoids the need to pull in drm_os_linux.h when we later drop drmP.h uses in nouveau. Signed-off-by: Sam Ravnborg <[email protected]> Cc: Ben Skeggs <[email protected]> Cc: [email protected] Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/bios/init: fix spelling mistake "CONDITON" -> "CONDITION"Colin Ian King1-1/+1
There is a spelling mistake in a warning message. Fix it. Signed-off-by: Colin Ian King <[email protected]> Reviewed-by: Mukesh Ojha <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-08-23drm/nouveau/secboot: Make acr_r352_ls_gpccs_func staticYueHaibing1-1/+1
Fix sparse warning: drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.c:1092:1: warning: symbol 'acr_r352_ls_gpccs_func' was not declared. Should it be static? Reported-by: Hulk Robot <[email protected]> Signed-off-by: YueHaibing <[email protected]> Signed-off-by: Ben Skeggs <[email protected]>
2019-08-22drm/panfrost: Fix sleeping while atomic in panfrost_gem_openRob Herring1-4/+6
We can't hold the mm_lock spinlock as panfrost_mmu_map() can sleep: BUG: sleeping function called from invalid context at kernel/locking/mutex.c:909 in_atomic(): 1, irqs_disabled(): 0, pid: 974, name: glmark2-es2-drm 1 lock held by glmark2-es2-drm/974: CPU: 5 PID: 974 Comm: glmark2-es2-drm Tainted: G W L 5.3.0-rc1+ #94 Hardware name: 96boards Rock960 (DT) Call trace: dump_backtrace+0x0/0x130 show_stack+0x14/0x20 dump_stack+0xc4/0x10c ___might_sleep+0x158/0x228 __might_sleep+0x50/0x88 __mutex_lock+0x58/0x800 mutex_lock_interruptible_nested+0x1c/0x28 drm_gem_shmem_get_pages+0x24/0xa0 drm_gem_shmem_get_pages_sgt+0x48/0xd0 panfrost_mmu_map+0x38/0xf8 [panfrost] panfrost_gem_open+0xc0/0xd8 [panfrost] drm_gem_handle_create_tail+0xe8/0x198 drm_gem_handle_create+0x3c/0x50 panfrost_gem_create_with_handle+0x70/0xa0 [panfrost] panfrost_ioctl_create_bo+0x48/0x80 [panfrost] drm_ioctl_kernel+0xb8/0x110 drm_ioctl+0x244/0x3f0 do_vfs_ioctl+0xbc/0x910 ksys_ioctl+0x78/0xa8 __arm64_sys_ioctl+0x1c/0x28 el0_svc_common.constprop.0+0x90/0x168 el0_svc_handler+0x28/0x78 el0_svc+0x8/0xc Fixes: a5efb4c9a562 ("drm/panfrost: Restructure the GEM object creation") Cc: Tomeu Vizoso <[email protected]> Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Reviewed-by: Steven Price <[email protected]> Signed-off-by: Rob Herring <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-08-22drm/amd/display: fix calc_pll_max_vco_constructDmytro Laktyushkin1-1/+1
This was broken by a previous change switching to cached fw_info. Fixed by inverting a valid bool check. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=111432 Fixes: 9adc8050bf3c ("drm/amd/display: make firmware info only load once during dc_bios create") Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu: enable VCN DPG for RenoirThong Thai1-1/+3
This will enable indirect SRAM loading for VCN DPG mode initialization. Signed-off-by: Thong Thai <[email protected]> Reviewed-by: Leo Liu <[email protected]> Reviewed-by: Prike Liang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22Revert "drm/amdgpu: use direct loading on renoir vcn for the moment"Thong Thai2-12/+6
This reverts commit 444a0fea5107e9ad7e3cbbafed78678489e31713. We are ready to enable it now. Signed-off-by: Thong Thai <[email protected]> Reviewed-by: Leo Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu: update gc/sdma goldensetting for rnAaron Liu2-6/+5
This patch updates gc/sdma goldensetting for renoir Signed-off-by: Aaron Liu <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amd/powerplay: Disable renoir smu feature retrieve for the momentPrike Liang1-0/+4
To avoid the dpm frequence range get failed when DPM enabled and it will be enabled later once handle well the feature bit map struct. Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amd/powerplay: enable renoir dpm featurePrike Liang1-8/+0
enable the dpm feature for the renoir. Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu: enable SDMA power gating for rnPrike Liang1-1/+1
Enable SDMA PG flag during device ip early init. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Prike Liang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu/sdma4: set sdma clock gating for rnPrike Liang1-0/+1
Add support for SDMA clockgating on RN. Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu/mmhub1: set mmhub clock gating for rnPrike Liang1-0/+1
setup mmhub clockgating. Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu: enable DF clock gating for rnPrike Liang1-1/+2
Enable DF clock gating during DF IP early init. Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu: enable athub clock gating for rnPrike Liang1-1/+3
Enable athub MG and LS clock gating. Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu: enable IH clock gating for rnPrike Liang1-1/+2
Enable IH clock gating during IH block initialized. Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu: enable vcn clock gating for rnPrike Liang1-1/+2
Enable VCN middle grain clock gating. Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu: enable rom clock gating for rnPrike Liang1-1/+2
Enable rom light sleep clock gating. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Prike Liang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu: enable HDP clock gating for rnPrike Liang1-1/+2
Enable HDP light sleep clock gating. Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu: enable BIF clock gating for rnPrike Liang1-1/+2
Enable BIF light sleep clock gating. Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu: enable sdma clock gating for rnPrike Liang1-1/+3
Enable sdma middle grain and light sleep clock gating. Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu: enable mmhub clock gating for rnPrike Liang1-1/+3
Enable mmhub midle grain and light sleep clock gating. Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amdgpu: enable gfx clock gating for rnPrike Liang1-1/+7
Enable gfx cg/mg/cp etc clock gating. Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-22drm/amd/powerplay: add DPMCLOCKS table implementationAaron Liu5-5/+32
This patch adds add DPMCLOCKS table implementation Rename smu_populate_smc_pptable to smu_populate_smc_tables Signed-off-by: Aaron Liu <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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