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The mt7623 dtsi has support for the i2c block, but this is not documented.
Add the documentation for SoC mt7623 to de description.
Signed-off-by: Matthias Brugger <[email protected]>
Acked-by: Rob Herring <[email protected]>
Acked-by: Wolfram Sang <[email protected]>
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The bindings file list bindings for mt1827 and mt8135 but
these bindings are not supported by the driver. Remove the bindings.
Also do some minor style changes to the compatible documentation
Signed-off-by: Matthias Brugger <[email protected]>
Acked-by: Rob Herring <[email protected]>
Acked-by: Wolfram Sang <[email protected]>
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The i2c-mt6577.txt actually holds the bindings for all mediatek supported i2c
controller. Change the name to i2c.mtk.txt to reflect that.
Signed-off-by: Matthias Brugger <[email protected]>
Acked-by: Rob Herring <[email protected]>
Acked-by: Wolfram Sang <[email protected]>
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Follow the recent trend for the license description, and fix the wrongly
stated X11 to MIT.
The X11 license text [1] is explicitly for the X Consortium and has a
couple of extra clauses. The MIT license text [2] is actually what the
current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Signed-off-by: Masahiro Yamada <[email protected]>
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Reserve enough space below the kernel base.
The assumed address map is:
80000000 - 80ffffff : for IPP
81000000 - 81ffffff : for ARM secure
82000000 - : for Linux
Signed-off-by: Masahiro Yamada <[email protected]>
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Add the required DT parts to enable Ethernet (dwmac-sun8i driver) on
the Nano Pi NEO2 board. It uses an external Realtek RTL8211E PHY
connected via RGMII to provide GbE network. Specially unlike other
Allwinner boards, the phy is connected to MDIO address 7, not 1.
This includes the regulator (which is controlled by a GPIO pin) and
the actual Ethernet MAC node, referring the RGMII pins of the device.
Signed-off-by: Icenowy Zheng <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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Add the required DT parts to enable Ethernet (dwmac-sun8i driver) on
the Orange Pi Prime board. It uses an external Realtek RTL8211E PHY
connected via RGMII to provide GbE network.
This includes the regulator (which is controlled by a GPIO pin) and
the actual Ethernet MAC node, referring the RGMII pins of the device.
Signed-off-by: Icenowy Zheng <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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The reg_vcc3v3 node is wrongly placed at the start of the / part, but
not with other fixed regulators used by the board, which makes the
device nodes unsorted.
As Orange Pi Prime and Nano Pi NEO2 device trees are copy'n'paste works,
they share the device node unsorted issue.
Fix this by move reg_vcc3v3 node to the position before reg_usb0_vbus.
Signed-off-by: Icenowy Zheng <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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Pine64 have made an official baseboard when SoPine SoM is out.
The official baseboard is like the original Pine64 -- but with SD card
slot replaced with Pine64's eMMC module slot.
Add a device tree for SoPine with the baseboard.
Signed-off-by: Icenowy Zheng <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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The dwmac-sun8i hardware is present on the BananaPi M64.
It uses an external PHY rtl8211e via RGMII.
Signed-off-by: Corentin Labbe <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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The dwmac-sun8i hardware is present on the pine64 plus.
It uses an external PHY rtl8211e via RGMII.
Signed-off-by: Corentin Labbe <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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The dwmac-sun8i hardware is present on the pine64
It uses an external PHY via RMII.
Signed-off-by: Corentin Labbe <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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The dwmac-sun8i is an Ethernet MAC that supports 10/100/1000 Mbit
connections. It is very similar to the device found in the Allwinner
H3, but lacks the internal 100 Mbit PHY and its associated control
bits.
This adds the necessary bits to the Allwinner A64 SoC .dtsi, but keeps
it disabled at this level.
Signed-off-by: Corentin Labbe <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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This patch add the dt node for the syscon register present on the
Allwinner A64.
Only two register are present in this syscon and the only one useful is
the one dedicated to EMAC clock.
Signed-off-by: Corentin Labbe <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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SoPine is a SoM by Pine64, which have a gold finger compatible with the
slot of DDR3 SODIMM (signals are not compatible), and have an A64, an
AXP803, a LPDDR3 DRAM chip, a power led and a MicroSD slot on it.
The card detect pin of the MicroSD slot on the SoM is pulled down, which
makes it unusable; however, the slot is at the surface of the SoM that
is closed to the baseboard, so it's nearly impossible to hot-swap it,
thus I make it non-removable.
Signed-off-by: Icenowy Zheng <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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The A64 device tree file has some remnants of raw number references
to the CCU node, likely from when the CCU bindings and device tree
changes were first merged.
Convert these, and the R_CCU ones, to use the proper defined macros
from their respective device tree binding header files.
Signed-off-by: Chen-Yu Tsai <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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Pine64 exposes all A64 UARTs, not just UART0.
Since the pins can be used as GPIO, don't enable the new UART nodes by
default, but prepare the pinctrl settings to aid in activating them via
overlays, i.e., overriding the status property of &uartX nodes.
For UART4 (Euler) the safer route of not including RTS/CTS pins is chosen,
whereas for UART1 (Bluetooth) they are included.
Add the corresponding pinctrl nodes where missing.
Suggested-by: Maxime Ripard <[email protected]>
Signed-off-by: Andreas Färber <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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Allwinner A64 have a RSB controller like the one on A23/A33 SoCs.
Add it and its pinmux.
Signed-off-by: Icenowy Zheng <[email protected]>
Acked-by: Chen-Yu Tsai <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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Enabling uart2 node currently leads to a /dev/ttyS1 device, with ttyS0..4
always present, causing confusion on the user's part.
dtc cannot resolve an overlay's &uart2 reference for strings, only for
phandles, so it would need to hardcode the full node path.
Avoid this and enforce reliable numbering by adding serialX aliases for:
UART1 - on Wifi/BT connector
UART2 - on Pi-2 connector
UART3 - on Euler connector
UART4 - on Euler connector
Signed-off-by: Andreas Färber <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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UART2 is exposed on the Pi connector of Pine64. Make a pinctrl node
available at the SoC level, to simplify enabling UART2 via DT overlay.
Signed-off-by: Andreas Färber <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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NanoPi NEO2 is a board with the same size factor with the original
NanoPi NEO by FriendlyELEC.
It has a H5 instead of H3 on NanoPi NEO, and the ethernet is upgraded to
1Gbps (with external RTL8211E PHY).
Add support for this board.
Signed-off-by: Icenowy Zheng <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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Orange Pi Prime is a new Allwinner H5-based SBC by Xunlong.
It's like a Orange Pi Plus 2E with H3 replaced with H5, eMMC replaced
with onboard SPI NOR Flash and wireless card changed to Realtek
RTL8723BS (with Bluetooth functionality).
Signed-off-by: Icenowy Zheng <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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Switch to use the new compatible for the SCPI sensors so that the
sensor readings are reported using the correct scale.
Signed-off-by: Carlo Caione <[email protected]>
Signed-off-by: Kevin Hilman <[email protected]>
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The dwmac-sun8i hardware is present on the Orange PI PC2.
It uses an external PHY rtl8211e via RGMII.
This patch create the needed regulator, emac and phy nodes.
Signed-off-by: Corentin Labbe <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000
speed.
This patch enable the dwmac-sun8i on Allwinner H3/H5 SoC Device-tree.
SoC H3/H5 have an internal PHY, so optionals syscon and ephy are set.
Signed-off-by: Corentin Labbe <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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This patch add the dt node for the syscon register present on the
Allwinner H3/H5
Only two register are present in this syscon and the only one useful is
the one dedicated to EMAC clock..
Signed-off-by: Corentin Labbe <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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Now that the R_CCU device tree binding headers have been merged, we
can convert the raw number references in the device trees to use the
defined macros.
Signed-off-by: Chen-Yu Tsai <[email protected]>
Signed-off-by: Maxime Ripard <[email protected]>
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The TX status trigger of the wlan interface is named phy0tx, so this
updates the default-trigger for the WLAN LED to use that instead.
Signed-off-by: Bjorn Andersson <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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Add the DT node for Kryo CPU clock controller on msm8996
devices.
Signed-off-by: Rajendra Nayak <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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SMEM allows various subsystems/processors to share
memory/data (heap format) in order to enable various
peripherals.
Signed-off-by: Jeremy McNicoll <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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This regulator is not moving anywhere. Sit, stay...
Signed-off-by: Jeremy McNicoll <[email protected]>
Signed-off-by: Andy Gross <[email protected]>
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The Stingray SoC has two instances of SDHCI controller
and one instance of iProc PWM.
Let's enable above mentioned devices in Stingray DT.
Signed-off-by: Srinath Mannam <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Ray Jui <[email protected]>
Reviewed-by: Scott Branden <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
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We have two instance of PL022 SPI controllers, one instance of
DMA PL330, and one non-secure SP805 Watchdog on Stingray SOC.
This patch adds DT nodes for the above mentioned devices in
Stingray DT.
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Pramod KUMAR <[email protected]>
Reviewed-by: Ray Jui <[email protected]>
Reviewed-by: Scott Branden <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
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This patch adds I2C DT nodes on Stingray SoC.
Signed-off-by: Oza Pawandeep <[email protected]>
Reviewed-by: Vikram Prakash <[email protected]>
Reviewed-by: Ray Jui <[email protected]>
Reviewed-by: Scott Branden <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
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The GPIOs on Stingray SOC are based on iProc GPIOs hence
using this we add GPIO DT nodes for Stingray SOC.
Signed-off-by: Pramod Kumar <[email protected]>
Reviewed-by: Ray Jui <[email protected]>
Reviewed-by: Scott Branden <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
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This patch adds pinctrl and pinmux related DT nodes for
Stingray SOC.
For manageability, pinctrl and pinmum DT nodes are added
as separate DTSi file and included in main DTSi file.
Signed-off-by: Pramod Kumar <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Ray Jui <[email protected]>
Reviewed-by: Vikram Prakash <[email protected]>
Reviewed-by: Scott Branden <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
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This patch adds NAND controller DT Node and NAND chip DT
node for Stingray SOC and Stingray reference boards.
Signed-off-by: Pramod Kumar <[email protected]>
Signed-off-by: Abhishek Shah <[email protected]>
Reviewed-by: Vikram Prakash <[email protected]>
Reviewed-by: Ray Jui <[email protected]>
Reviewed-by: Scott Branden <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
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This patch describes Stingray SOC clock tree using
DT nodes in Stingray DTS.
Signed-off-by: Sandeep Tripathy <[email protected]>
Reviewed-by: Ray Jui <[email protected]>
Reviewed-by: Scott Branden <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
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The Broadcom Stingray SoC is a new member in Broadcom iProc
SoC family.
This patch adds initial DTS files for Broadcom Stingray SoC
and two of its reference boards (bcm958742k and bcm958742t).
We have lot of reference boards and large number of devices
in Broadcom Stingray SoC so eventually we will have quite
a few DTS files for Stingray. To tackle, we have added a
separate directory for Stingray DTS files.
Signed-off-by: Anup Patel <[email protected]>
Signed-off-by: Scott Branden <[email protected]>
Reviewed-by: Ray Jui <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
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Update iproc clock dt-binding documentation with
Stingray pll and clock details.
Signed-off-by: Sandeep Tripathy <[email protected]>
Reviewed-by: Ray Jui <[email protected]>
Reviewed-by: Scott Branden <[email protected]>
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
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Compiling the UniPhier DT files with W=1, DTC warns like follows:
Warning (simple_bus_reg): Node /soc/smpctrl@59800000 simple-bus unit address format error, expected "59801000"
Signed-off-by: Masahiro Yamada <[email protected]>
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Compiling the DT file with W=1, DTC warns like follows:
Warning (unit_address_vs_reg): Node /opp_table0/opp@1000000000 has a
unit name, but no reg property
Fix this by replacing '@' with '-' as the OPP nodes will never have a
"reg" property.
Reported-by: Krzysztof Kozlowski <[email protected]>
Reported-by: Masahiro Yamada <[email protected]>
Suggested-by: Mark Rutland <[email protected]>
Signed-off-by: Viresh Kumar <[email protected]>
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Masahiro Yamada <[email protected]>
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This patch adds DT bindings info for Broadcom Stingray SOC
and related reference boards.
Signed-off-by: Anup Patel <[email protected]>
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
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into next/dt64
Realtek ARM64 based SoC DT for v4.12
This adds an initial DT for the RTD1295 SoC and a TV box based on it.
* tag 'realtek-arm64-dt-for-4.12' of git://github.com/afaerber/linux:
ARM64: dts: Add Realtek RTD1295 and Zidoo X9S
dt-bindings: arm: Add Realtek RTD1295 bindings
dt-bindings: Add vendor prefix for Zidoo
Signed-off-by: Olof Johansson <[email protected]>
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https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64
Renesas ARM64 Based SoC DT Updates for v4.13
* Add support for R-Car H3 ES2.0
* Break out common board support
* Set drive-strength for ravb pins for r8a7795/h3ulcb and r8a7796/m3ulcb
* Enable HDMI outputs on r8a7795/salvator-x
* Add R-Car audio to DT of r8a7796 SoC
* Add current sense amplifiers to DT of r8a779[56]/salvator-x
* Enable NFS-root on r8a7796/salvator-x
* Enable HS200 for eMMC on r8a779[56]/salvator-x,
r8a7795/h3ulcb and r8a7796/m3ulcb
* Enable EthernetAVB, I2C r8a7796/m3ulcb
* Update memory node to 2 GiB map on r8a7796/m3ulcb
* tag 'renesas-arm64-dt-for-v4.13' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (35 commits)
arm64: dts: r8a7795: salvator-x: Add support for R-Car H3 ES2.0
arm64: dts: r8a7795: Add support for R-Car H3 ES2.0
arm64: dts: ulcb: Set drive-strength for ravb pins
arm64: dts: renesas: r8a7795-salvator-x: Enable HDMI outputs
arm64: dts: renesas: r8a7795-salvator-x: Add DU external dot clocks
arm64: dts: renesas: salvator-x: Add HDMI output connectors
arm64: dts: renesas: salvator-x: Add DU external dot clock sources
arm64: dts: renesas: r8a7795: Add HDMI encoder support
arm64: dts: salvator-x: Add panel backlight support
arm64: dts: r8a7796: Add PWM device nodes
arm64: dts: r8a7796: add Sound MIX support
arm64: dts: r8a7796: add Sound CTU support
arm64: dts: r8a7796: add Sound DVC support
arm64: dts: r8a7796: add Sound SRC support
arm64: dts: r8a7796: add Sound SSI DMA support
arm64: dts: r8a7796: add Sound SSI PIO support
arm64: dts: r8a7796: add AUDIO_DMAC support
arm64: dts: salvator-x: Add current sense amplifiers
arm64: dts: renesas: Extract common ULCB board support
arm64: dts: renesas: Extract common Salvator-X board support
...
Signed-off-by: Olof Johansson <[email protected]>
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All SoCs supported up to now rely on the fallback binding of mt6577.
Fix the binding description to reflect this.
Signed-off-by: Matthias Brugger <[email protected]>
Acked-by: Rob Herring <[email protected]>
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This patch adds the SPICC Controller pins nodes for Amlogic GXL SoCs.
Signed-off-by: Neil Armstrong <[email protected]>
Signed-off-by: Kevin Hilman <[email protected]>
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This patch adds the SPICC Controller pins nodes for Amlogic GXBB SoCs.
Signed-off-by: Neil Armstrong <[email protected]>
Signed-off-by: Kevin Hilman <[email protected]>
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The Amlogic Meson GXL SoCs embeds an 10/100 Ethernet PHY, this patchs adds
the Link and Activity LEDs signals pins nodes.
Signed-off-by: Neil Armstrong <[email protected]>
Signed-off-by: Kevin Hilman <[email protected]>
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Add the AO and EE domain CEC pins nodes for the Amlogic Meson GXL SoCs.
Signed-off-by: Neil Armstrong <[email protected]>
Signed-off-by: Kevin Hilman <[email protected]>
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