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2015-12-22NVMe: IO ending fixes on surprise removalKeith Busch1-1/+19
This patch fixes a lost request discovered during IO + hot removal. The driver's pci removal deletes gendisks prior to shutting down the controller to allow dirty data to sync. Dirty data can not be synced on a surprise removal, though, and would potentially block indefinitely. The driver previously had marked the queue as dying in this scenario to prevent new requests from attempting, however it will still block for requests that already entered the queue. This patch fixes this by quiescing IO first, then aborting the requeued requests before deleting disks. Reported-by: Sujith Pandel <[email protected]> Signed-off-by: Keith Busch <[email protected]> Tested-by: Sujith Pandel <[email protected]> Signed-off-by: Jens Axboe <[email protected]>
2015-12-22KVM: x86: Reload pit counters for all channels when restoring stateAndrew Honig1-2/+6
Currently if userspace restores the pit counters with a count of 0 on channels 1 or 2 and the guest attempts to read the count on those channels, then KVM will perform a mod of 0 and crash. This will ensure that 0 values are converted to 65536 as per the spec. This is CVE-2015-7513. Signed-off-by: Andy Honig <[email protected]> Signed-off-by: Paolo Bonzini <[email protected]>
2015-12-22KVM: MTRR: treat memory as writeback if MTRR is disabled in guest CPUIDPaolo Bonzini2-3/+19
Virtual machines can be run with CPUID such that there are no MTRRs. In that case, the firmware will never enable MTRRs and it is obviously undesirable to run the guest entirely with UC memory. Check out guest CPUID, and use WB memory if MTRR do not exist. Cc: [email protected] Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=107561 Signed-off-by: Paolo Bonzini <[email protected]>
2015-12-22KVM: MTRR: observe maxphyaddr from guest CPUID, not hostPaolo Bonzini1-2/+7
Conversion of MTRRs to ranges used the maxphyaddr from the boot CPU. This is wrong, because var_mtrr_range's mask variable then is discontiguous (like FF00FFFF000, where the first run of 0s corresponds to the bits between host and guest maxphyaddr). Instead always set up the masks to be full 64-bit values---we know that the reserved bits at the top are zero, and we can restore them when reading the MSR. This way var_mtrr_range gets a mask that just works. Fixes: a13842dc668b40daef4327294a6d3bdc8bd30276 Cc: [email protected] Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=107561 Signed-off-by: Paolo Bonzini <[email protected]>
2015-12-22KVM: MTRR: fix fixed MTRR segment look upAlexis Dambricourt1-1/+1
This fixes the slow-down of VM running with pci-passthrough, since some MTRR range changed from MTRR_TYPE_WRBACK to MTRR_TYPE_UNCACHABLE. Memory in the 0K-640K range was incorrectly treated as uncacheable. Fixes: f7bfb57b3e89ff89c0da9f93dedab89f68d6ca27 Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=107561 Cc: [email protected] Signed-off-by: Alexis Dambricourt <[email protected]> [Use correct BZ for "Fixes" annotation. - Paolo] Signed-off-by: Paolo Bonzini <[email protected]>
2015-12-22drm/i915: Correct max delay for HDMI hotplug live status checkingGary Wang1-3/+4
The total delay of HDMI hotplug detecting with 30ms have already been split into a resolution of 3 retries of 10ms each, for the worst cases. But it still suffered from only waiting 10ms at most in intel_hdmi_detect(). This patch corrects it by reading hotplug status with 4 times at most for 30ms delay. v2: - straight up to loop execution for more clear in code readability - mdelay will replace with msleep by Daniel's new patch drm/i915: mdelay(10) considered harmful - suggest to re-evaluate try times for being compatible to old HDMI monitor Reviewed-by: Cooper Chiou <[email protected]> Tested-by: Gary Wang <[email protected]> Cc: Jani Nikula <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Gavin Hindman <[email protected]> Cc: Sonika Jindal <[email protected]> Cc: Shashank Sharma <[email protected]> Signed-off-by: Gary Wang <[email protected]> [danvet: fixup conflict with s/mdelay/msleep/ patch.] Cc: [email protected] Signed-off-by: Daniel Vetter <[email protected]> (cherry picked from commit 61fb3980dd396880ffba48523b1e27579868b82b) Signed-off-by: Jani Nikula <[email protected]>
2015-12-22drm/i915: mdelay(10) considered harmfulDaniel Vetter1-1/+1
I missed this myself when reviewing commit 237ed86c693d8a8e4db476976aeb30df4deac74b Author: Sonika Jindal <[email protected]> Date: Tue Sep 15 09:44:20 2015 +0530 drm/i915: Check live status before reading edid Long sleeps like this really shouldn't waste cpu cycles spinning. Cc: Sonika Jindal <[email protected]> Cc: "Wang, Gary C" <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Sonika Jindal <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> (cherry picked from commit 71a199bacb398ee54eeac001699257dda083a455) Signed-off-by: Jani Nikula <[email protected]>
2015-12-22drm/i915: Kill intel_crtc->cursor_boVille Syrjälä2-6/+0
The vma may have been rebound between the last time the cursor was enabled and now, so skipping the cursor gtt offset deduction is not safe unless we would also reset cursor_bo to NULL when disabling the cursor. Just thow cursor_bo to the bin instead since it's lost all other uses thanks to universal plane support. Chris pointed out that cursor updates are currently too slow via universal planes that micro optimizations like these wouldn't even help. v2: Add a note about futility of micro optimizations (Chris) Cc: [email protected] References: http://lists.freedesktop.org/archives/intel-gfx/2015-December/082976.html Cc: Chris Wilson <[email protected]> Cc: Takashi Iwai <[email protected]> Cc: Jani Nikula <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Chris Wilson <[email protected]> (cherry picked from commit 1264859d648c4bdc9f0a098efbff90cbf462a075) Signed-off-by: Jani Nikula <[email protected]>
2015-12-22drm/i915: Workaround CHV pipe C cursor failVille Syrjälä1-0/+17
Turns out CHV pipe C was glued on somewhat poorly, and there's something wrong with the cursor. If the cursor straddles the left screen edge, and is then moved away from the edge or disabled, the pipe will often underrun. If enough underruns are triggered quickly enough the pipe will fall over and die (it just scans out a solid color and reports a constant underrun). We need to turn the disp2d power well off and on again to recover the pipe. None of that is very nice for the user, so let's just refuse to place the cursor in the compromised position. The ddx appears to fall back to swcursor when the ioctl returns an error, so theoretically there's no loss of functionality for the user (discounting swcursor bugs). I suppose most cursors images actually have the hotspot not exactly at 0,0 so under typical conditions the fallback will in fact kick in as soon as the cursor touches the left edge of the screen. Any atomic compositor should anyway be prepared to fall back to GPU composition when things don't work out, so there should be no problem with those. Other things that I tried to solve this include flipping all display related clock gating knobs I could find, increasing the minimum gtt alignment all the way up to 512k. I also tried to see if there are more specific screen coordinates that hit the bug, but the findings were somewhat inconclusive. Sometimes the failures happen almost across the whole left edge, sometimes more at the very top and around the bottom half. I wasn't able to find any real pattern to these variations, so it seems our only choice is to just refuse to straddle the left screen edge at all. Cc: [email protected] Cc: Jason Plum <[email protected]> Testcase: igt/kms_chv_cursor_fail Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92826 Signed-off-by: Ville Syrjälä <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Daniel Vetter <[email protected]> (cherry picked from commit b29ec92c4f5e6d45d8bae8194e664427a01c6687) Signed-off-by: Jani Nikula <[email protected]>
2015-12-22drm/i915: Only spin whilst waiting on the current requestChris Wilson2-9/+26
Limit busywaiting only to the request currently being processed by the GPU. If the request is not currently being processed by the GPU, there is a very low likelihood of it being completed within the 2 microsecond spin timeout and so we will just be wasting CPU cycles. v2: Check for logical inversion when rebasing - we were incorrectly checking for this request being active, and instead busywaiting for when the GPU was not yet processing the request of interest. v3: Try another colour for the seqno names. v4: Another colour for the function names. v5: Remove the forced coherency when checking for the active request. On reflection and plenty of recent experimentation, the issue is not a cache coherency problem - but an irq/seqno ordering problem (timing issue). Here, we do not need the w/a to force ordering of the read with an interrupt. Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> Cc: "Rogozhkin, Dmitry V" <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Eero Tamminen <[email protected]> Cc: "Rantala, Valtteri" <[email protected]> Cc: [email protected] Signed-off-by: Daniel Vetter <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 821485dc2ad665f136c57ee589bf7a8210160fe2) Signed-off-by: Jani Nikula <[email protected]>
2015-12-22drm/i915: Limit the busy wait on requests to 5us not 10ms!Chris Wilson1-2/+45
When waiting for high frequency requests, the finite amount of time required to set up the irq and wait upon it limits the response rate. By busywaiting on the request completion for a short while we can service the high frequency waits as quick as possible. However, if it is a slow request, we want to sleep as quickly as possible. The tradeoff between waiting and sleeping is roughly the time it takes to sleep on a request, on the order of a microsecond. Based on measurements of synchronous workloads from across big core and little atom, I have set the limit for busywaiting as 10 microseconds. In most of the synchronous cases, we can reduce the limit down to as little as 2 miscroseconds, but that leaves quite a few test cases regressing by factors of 3 and more. The code currently uses the jiffie clock, but that is far too coarse (on the order of 10 milliseconds) and results in poor interactivity as the CPU ends up being hogged by slow requests. To get microsecond resolution we need to use a high resolution timer. The cheapest of which is polling local_clock(), but that is only valid on the same CPU. If we switch CPUs because the task was preempted, we can also use that as an indicator that the system is too busy to waste cycles on spinning and we should sleep instead. __i915_spin_request was introduced in commit 2def4ad99befa25775dd2f714fdd4d92faec6e34 [v4.2] Author: Chris Wilson <[email protected]> Date: Tue Apr 7 16:20:41 2015 +0100 drm/i915: Optimistically spin for the request completion v2: Drop full u64 for unsigned long - the timer is 32bit wraparound safe, so we can use native register sizes on smaller architectures. Mention the approximate microseconds units for elapsed time and add some extra comments describing the reason for busywaiting. v3: Raise the limit to 10us v4: Now 5us. Reported-by: Jens Axboe <[email protected]> Link: https://lkml.org/lkml/2015/11/12/621 Reviewed-by: Tvrtko Ursulin <[email protected]> Cc: "Rogozhkin, Dmitry V" <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Eero Tamminen <[email protected]> Cc: "Rantala, Valtteri" <[email protected]> Cc: [email protected] Signed-off-by: Daniel Vetter <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit ca5b721e238226af1d767103ac852aeb8e4c0764) Signed-off-by: Jani Nikula <[email protected]>
2015-12-22drm/i915: Break busywaiting for requests on pending signalsChris Wilson1-5/+8
The busywait in __i915_spin_request() does not respect pending signals and so may consume the entire timeslice for the task instead of returning to userspace to handle the signal. In the worst case this could cause a delay in signal processing of 20ms, which would be a noticeable jitter in cursor tracking. If a higher resolution signal was being used, for example to provide fairness of a server timeslices between clients, we could expect to detect some unfairness between clients (i.e. some windows not updating as fast as others). This issue was noticed when inspecting a report of poor interactivity resulting from excessively high __i915_spin_request usage. Fixes regression from commit 2def4ad99befa25775dd2f714fdd4d92faec6e34 [v4.2] Author: Chris Wilson <[email protected]> Date: Tue Apr 7 16:20:41 2015 +0100 drm/i915: Optimistically spin for the request completion v2: Try to assess the impact of the bug Signed-off-by: Chris Wilson <[email protected]> Reviewed-by: Tvrtko Ursulin <[email protected]> Cc: Jens Axboe <[email protected]> Cc; "Rogozhkin, Dmitry V" <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Eero Tamminen <[email protected]> Cc: "Rantala, Valtteri" <[email protected]> Cc: [email protected] Signed-off-by: Daniel Vetter <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 91b0c352ace9afec1fb51590c7b8bd60e0eb9fbd) Signed-off-by: Jani Nikula <[email protected]>
2015-12-22drm/i915: Disable primary plane if we fail to reconstruct BIOS fb (v2)Matt Roper1-0/+15
If we fail to reconstruct the BIOS fb (e.g., because the FB is too large), we'll be left with plane state that indicates the primary plane is visible yet has a NULL fb. This mismatch causes problems later on (e.g., for the watermark code). Since we've failed to reconstruct the BIOS FB, the best solution is to just disable the primary plane and pretend the BIOS never had it enabled. v2: Add intel_pre_disable_primary() call (Maarten) Cc: Daniel Vetter <[email protected]> Cc: Ville Syrjälä <[email protected]> Cc: Maarten Lankhorst <[email protected]> Cc: [email protected] Signed-off-by: Matt Roper <[email protected]> Reviewed-by: Maarten Lankhorst <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] (cherry picked from commit 200757f5d7c6f7f7032a0a07bbb8c02a840bbf7d) Signed-off-by: Jani Nikula <[email protected]>
2015-12-22drm/i915: Set the map-and-fenceable flag for preallocated objectsChris Wilson4-19/+27
As we mark the preallocated objects as bound, we should also flag them correctly as being map-and-fenceable (if appropriate!) so that later users do not get confused and try and rebind the pinned vma in order to get a map-and-fenceable binding. Signed-off-by: Chris Wilson <[email protected]> Cc: "Goel, Akash" <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Jesse Barnes <[email protected]> Cc: [email protected] Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Daniel Vetter <[email protected]> (cherry picked from commit d0710abbcd88b1ff17760e97d74a673e67b49ea1) Signed-off-by: Jani Nikula <[email protected]>
2015-12-22drm/i915: Drop the broken cursor base==0 special casingVille Syrjälä1-17/+12
The cursor code tries to treat base==0 to mean disabled. That fails when the cursor bo gets bound at ggtt offset 0, and the user is left looking at an invisible cursor. We lose the disabled->disabled optimization, but that seems like something better handled at a slightly higher level. Cc: [email protected] Cc: Takashi Iwai <[email protected]> Cc: Jani Nikula <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Chris Wilson <[email protected]> (cherry picked from commit 663f3122d00c0b412d429f105dca129aa8f4f094) Signed-off-by: Jani Nikula <[email protected]>
2015-12-22Merge tag 'drm-vc4-next-2015-12-21' of http://github.com/anholt/linux into ↵Dave Airlie1-21/+20
drm-next I've decided to just send this fixes-for-next pull request now, even if we don't have a patch for the CONFIG_PM_SLEEP build failure reviewed. If you like my patch for that, I'd be happy to see it applied directly. This pull request brings in little fixes from Dan Carpenter for the 3D support added in this -next cycle. * tag 'drm-vc4-next-2015-12-21' of http://github.com/anholt/linux: drm/vc4: fix an error code drm/vc4: allocate enough memory in vc4_save_hang_state() drm/vc4: copy_to_user() returns the number of bytes remaining
2015-12-21amd/powerplay: fix copy paste typo in hardwaremanager.cAlex Deucher1-1/+1
Signed-off-by: Alex Deucher <[email protected]>
2015-12-21amd/powerplay: disable powerplay by default initiallyAlex Deucher1-1/+1
Hopefully we can enable this by default once we get more upstream feedback on stability, etc. Signed-off-by: Alex Deucher <[email protected]>
2015-12-21amd/powerplay: don't enable ucode fan control if vbios has no fan tableAlex Deucher1-0/+3
Some systems have a single fan controlled by ACPI or some other method. Reviewed-by: Tom St Denis <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-21drm/amd/powerplay: show gpu load when print gpu performance for Cz. (v2)Rex Zhu1-1/+12
Show GPU load in in the debugfs output. v2: integrate Tom's optimization Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]>
2015-12-21drm/amd/powerplay: check whether need to enable thermal control. (v2)Rex Zhu1-1/+8
In I+A platform(skylake), it is controlled by intel. v2: integrate Tom's fix Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]>
2015-12-21drm/amd/powerplay: add point check to avoid NULL point hang.Rex Zhu1-13/+47
Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
2015-12-21drm/amdgpu/powerplay: Program a calculated value as Deep Sleep clock.David Rokhvarg1-2/+4
This replaces programming of a hardcoded value. Signed-off-by: David Rokhvarg <[email protected]>
2015-12-21drm/amd/powerplay: Don't return an error if fan table is missingAlex Deucher1-1/+1
It's a valid configuration on some laptops. Reviewed-by: Tom St Denis <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-21drm/powerplay/hwmgr: log errors in tonga_hwmgr_backend_initAlex Deucher1-0/+2
Helpful in debugging init issues. Reviewed-by: Tom St Denis <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-21drm/powerplay: add debugging output to processpptables.cAlex Deucher1-13/+29
To help track down init errors. Reviewed-by: Tom St Denis <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-21drm/powerplay: add debugging output to tonga_processpptables.cAlex Deucher1-13/+26
To help track down init errors. Reviewed-by: Tom St Denis <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-21amd/powerplay: Add structures required to report configuration changeEric Yang5-39/+139
Add required structures for amd_powerplay_display_configuration_change Signed-off-by: Eric Yang <[email protected]>
2015-12-21amd/powerplay: Fix get dal power levelVitaly Prosyak6-15/+12
Simplify data struct for get dal power level Signed-off-by: Vitaly Prosyak <[email protected]>
2015-12-21amd\powerplay Implement get dal power levelVitaly Prosyak6-19/+85
Implement get dal power level and simple clock info Signed-off-by: Vitaly Prosyak <[email protected]>
2015-12-21drm/amd/powerplay: display gpu load when print performance for tonga.Rex Zhu1-1/+12
Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Jammy Zhou <[email protected]> Signed-off-by: Rex Zhu <[email protected]>
2015-12-21drm/amdgpu/powerplay: enable sysfs and debugfs interfaces lateAlex Deucher1-1/+4
To avoid users accessing them before the module has finished initializing them and make sure they are only created if dpm has properly initialized. Reviewed-by: Christian König <[email protected]> Reviewed-by: Jammy Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-21drm/amd/powerplay: move shared function of vi to hwmgr. (v2)Rex Zhu4-19/+379
v2: agd: rebase on upstream Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]>
2015-12-21drm/amd/powerplay: check whether enable dpm in powerplay.Rex Zhu1-1/+4
Change-Id: I0a2dbf8ef7d4a3e9788fe211fc5964dd2487c519 Signed-off-by: Rex Zhu <[email protected]>
2015-12-21drm/amd/powerplay: fix bug that dpm funcs in debugfs/sysfs missing.Rex Zhu1-1/+14
in dpm module, sysfs init func move to late_init from sw_init. Reviewed-by: Alex Deucher <[email protected]> Change-Id: Ice4a73212d8e3106d05f04a27043820ffd32929e Signed-off-by: Rex Zhu <[email protected]>
2015-12-21drm/amd/powerplay: fix boolreturn.cocci warningskbuild test robot1-2/+2
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/ppatomctrl.c:475:10-11: WARNING: return of 0/1 in function 'atomctrl_lookup_gpio_pin' with return type bool Return statements in functions returning bool should use true/false instead of 1/0. Generated by: scripts/coccinelle/misc/boolreturn.cocci CC: yanyang1 <[email protected]> Signed-off-by: Fengguang Wu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2015-12-21drm/amd/powerplay: add functions set/get_fan_control_mode in hwmgr for Fiji.Eric Huang2-0/+27
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Eric Huang <[email protected]>
2015-12-21drm/amd/powerplay: add functions set/get_fan_control_mode in hwmgr for Tonga.Eric Huang2-0/+27
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Eric Huang <[email protected]>
2015-12-21drm/amd/powerplay: Fix a bug in fan control setting default mode for Tonga ↵Eric Huang2-2/+2
and Fiji. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Eric Huang <[email protected]>
2015-12-21drm/amd/powerplay: Add thermal protection support for Fiji.Eric Huang4-1/+892
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Eric Huang <[email protected]>
2015-12-21drm/amd/powerplay: add display configeration changed function in hwmgr for Fiji.Eric Huang2-0/+68
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Eric Huang <[email protected]>
2015-12-21drm/amdgpu: Prepare DKMS build for powerplay module.Qiang Yu1-1/+1
Signed-off-by: Qiang Yu <[email protected]> Reviewed-by: Jammy Zhou <[email protected]>
2015-12-21drm/amd/amdgpu: enable uvd&vce clock gating for Fiji.Eric Huang1-1/+2
Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Eric Huang <[email protected]>
2015-12-21drm/amd/amdgpu: add vce3.0 clock gating support. (v2)Eric Huang1-1/+148
v2: fix grbm locking Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Eric Huang <[email protected]>
2015-12-21drm/amd/amdgpu: add uvd6.0 clock gating support. (v2)Eric Huang1-2/+259
v2: fix bug in register mask setting. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Acked-by: Jammy Zhou <[email protected]> Signed-off-by: Eric Huang <[email protected]>
2015-12-21drm/amd/powerplay: add multimedia power gating support for Fiji.Eric Huang5-3/+281
Acked-by: Jammy Zhou <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Eric Huang <[email protected]>
2015-12-21drm/amdgpu: rename fiji_smumgr.h to fiji_smum.hJammy Zhou3-2/+2
This conflicts with fiji_smumgr.h from powerplay in DKMS environment Signed-off-by: Jammy Zhou <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Jordan Lazare <[email protected]>
2015-12-21drm/amdgpu: rename tonga_smumgr.h to tonga_smum.hJammy Zhou3-2/+2
This conflicts with the tonga_smumgr.h from powerplay in DKMS environement Signed-off-by: Jammy Zhou <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Jordan Lazare <[email protected]>
2015-12-21drm/amd/powerplay: Add PPLib debug print macro.David Rokhvarg2-4/+40
- The macro is silent by default. - Use the macro to print Display Configuration - related changes. Signed-off-by: David Rokhvarg <[email protected]>
2015-12-21drm/amd/powerplay: enable/disable NB pstate feature for Carrizo.Rex Zhu2-15/+87
Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: David Rokhvarg <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Jammy Zhou <[email protected]>
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