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2013-04-23drm: add drm_edid_to_eld helper extracting SADs from EDID (v2)Rafał Miłecki2-0/+68
Some devices (ATI/AMD cards) don't support passing ELD struct to the hardware but just require filling specific registers and then the hardware/firmware does the rest. In such cases we need to read the info from SAD blocks and put them in the correct registers. agd5f: note that the returned pointer needs to be kfreed as per Christian's suggestion. v2: fix warning Signed-off-by: Rafał Miłecki <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2013-04-23drm/radeon/si: add support for golden register initAlex Deucher1-0/+793
Signed-off-by: Alex Deucher <[email protected]>
2013-04-23drm/radeon/cayman,TN: add support for golden register init (v2)Alex Deucher1-0/+281
v2: add richland support Signed-off-by: Alex Deucher <[email protected]>
2013-04-23drm/radeon/evergreen: add support for golden register initAlex Deucher1-0/+863
Signed-off-by: Alex Deucher <[email protected]>
2013-04-23drm/radeon/7xx: add support for golden register initAlex Deucher1-0/+652
Signed-off-by: Alex Deucher <[email protected]>
2013-04-23drm/radeon: add helper function to support golden registersAlex Deucher2-0/+39
Golden registers are arrays of register settings from the hw team that need to be initialized at asic startup. Signed-off-by: Alex Deucher <[email protected]>
2013-04-23drm/radeon: fix typo in si_select_se_sh()Alex Deucher1-1/+1
Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2013-04-23drm/radeon: switch audio handling to use callbacksAlex Deucher6-88/+87
Register audio callbacks for asic where we support audio. Cleans up the code and makes it easier to add support for newer asics. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2013-04-23drm/radeon: clean up audio dto programmingAlex Deucher4-62/+50
Split into DCE2/3 and DCE4/5 variants. Still todo is to calculate the DTO dividers properly. Add proper formula to the comments. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2013-04-23drm/radeon: clean up audio supported checkAlex Deucher1-4/+1
Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2013-04-23drm/radeon: raise UVD clocks on init v3Christian König1-8/+24
v2: not only raise the clocks on VCPU boot, but also on IB test. v3: agd5f: fix r600_uvd_init return value. fixes: https://bugs.freedesktop.org/show_bug.cgi?id=63730 Signed-off-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2013-04-23drm/radeon: raise UVD clocks only on demandChristian König3-2/+34
That not only saves some power, but also solves problems with older chips where an idle UVD block on higher clocks can cause problems. Signed-off-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2013-04-22drm/radeon: put UVD PLLs in bypass modeChristian König3-23/+41
Just power down the PLL when we get a VCLK or DCLK of zero. Enabling the bypass mode early should also allow us to switch UVD clocks on the fly. Signed-off-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2013-04-22drm/radeon: disable audio format interrupts on EvergreenAlex Deucher1-1/+3
The audio format change interrupts are an aid in debugging, but not required for operation. Signed-off-by: Alex Deucher <[email protected]>
2013-04-22drm/radeon: fix hdmi mode enable on RS600/RS690/RS740Alex Deucher1-2/+2
These chips were previously skipped since they are pre-R600. Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2013-04-22drm/radeon/evergreen: write default channel numbersRafał Miłecki1-0/+21
Signed-off-by: Rafał Miłecki <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2013-04-22drm/radeon/evergreen: reorder HDMI setupRafał Miłecki1-12/+15
Driver fglrx setups audio and ACR packets after basic initialization, which sounds sane, do the same. Signed-off-by: Rafał Miłecki <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2013-04-22drm/radeon/evergreen: setup HDMI before enabling itRafał Miłecki2-4/+12
Closed source driver fglrx seems to enable infoframes and audio packets at the end, which makes sense, do the same. Signed-off-by: Rafał Miłecki <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2013-04-22drm/radeon: add helpers for masking and setting bits in regsRafał Miłecki2-10/+8
Signed-off-by: Rafał Miłecki <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2013-04-22drm/radeon: fix alignment of UVD fenceChristian König2-5/+4
Signed-off-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2013-04-22drm/radeon: cleanup UVD address checksChristian König1-12/+14
Message and feedback buffers must be at start of VRAM, not at start of address space. Signed-off-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2013-04-22drm/radeon: disable the crtcs in mc_stop (evergreen+) (v2)Alex Deucher1-0/+12
Just disabling the mem requests should be enough, but that doesn't seem to work correctly on efi systems. May fix: https://bugs.freedesktop.org/show_bug.cgi?id=57567 https://bugs.freedesktop.org/show_bug.cgi?id=43655 https://bugzilla.kernel.org/show_bug.cgi?id=56441 v2: blank displays first, then disable. Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2013-04-22drm/radeon: disable the crtcs in mc_stop (r5xx-r7xx) (v2)Alex Deucher2-0/+12
Just disabling the mem requests should be enough, but that doesn't seem to work correctly on efi systems. v2: blank displays first, then disable. Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2013-04-22drm/radeon: properly lock disp in mc_stop/resume for evergreen+Alex Deucher2-4/+45
Need to wait for the new addresses to take affect before re-enabling the MC. Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2013-04-22drm/radeon: properly lock disp in mc_stop/resume for r5xx-r7xxAlex Deucher2-0/+44
Need to wait for the new addresses to take affect before re-enabling the MC. Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2013-04-22drm/radeon: update wait_for_vblank for evergreen+Alex Deucher1-8/+36
Properly wait for the next vblank region. The previous code didn't always wait long enough depending on the timing. Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2013-04-22drm/radeon: update wait_for_vblank for r5xx-r7xxAlex Deucher1-8/+44
Properly wait for the next vblank region. The previous code didn't always wait long enough depending on the timing. Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2013-04-22drm/radeon: update wait_for_vblank for r1xx-r4xxAlex Deucher1-24/+53
Properly wait for the next vblank region. The previous code didn't always wait long enough depending on the timing. Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2013-04-22Merge tag 'drm/tegra/for-3.10' of git://anongit.freedesktop.org/tegra/linux ↵Dave Airlie55-644/+7540
into drm-next drm/tegra: Changes for v3.10-rc1 The bulk of this pull-request is the host1x series that has been in the works for a few months. The current implementation looks good and has been tested by several independent parties. So far no issues have been found. To be on the safe side, the new Tegra-specific DRM IOCTLs depend on staging in order to give some amount of flexibility to change them just in case. The plan is to remove that dependency once more userspace exists to verify the adequacy of the IOCTLs. Currently only the 2D engine is supported, but patches are in the works to enable 3D support on top of this framework as well. Various bits of open-source userspace exist to test the 2D and 3D support[0]. This is still a bit immature but it allows to verify that the kernel interfaces work properly. To round things off there are two smaller cleanup patches, one of them adding a new pixel format and the other removing a redundent Kconfig dependency. [0]: https://github.com/grate-driver * tag 'drm/tegra/for-3.10' of git://anongit.freedesktop.org/tegra/linux: drm/tegra: don't depend on OF drm/tegra: Support the XBGR8888 pixelformat drm/tegra: Add gr2d device gpu: host1x: drm: Add memory manager and fb gpu: host1x: Remove second host1x driver gpu: host1x: drm: Rename host1x to host1x_drm drm/tegra: Move drm to live under host1x gpu: host1x: Add debug support gpu: host1x: Add channel support gpu: host1x: Add syncpoint wait and interrupts gpu: host1x: Add host1x driver
2013-04-22drm/tegra: don't depend on OFStephen Warren1-1/+1
ARCH_TEGRA always enabled OF, so there's no need for any driver to depend on it. Signed-off-by: Stephen Warren <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2013-04-22drm/tegra: Support the XBGR8888 pixelformatThierry Reding1-0/+5
While at it, also include the RGB565 pixelformat in the list of formats supported by overlays. Signed-off-by: Thierry Reding <[email protected]> Tested-by: Erik Faye-Lund <[email protected]>
2013-04-22drm/tegra: Add gr2d deviceTerje Bergstrom9-3/+732
Add client driver for 2D device, and IOCTLs to pass work to host1x channel for 2D. Also adds functions that can be called to access sync points from DRM. Signed-off-by: Arto Merilainen <[email protected]> Signed-off-by: Terje Bergstrom <[email protected]> Reviewed-by: Thierry Reding <[email protected]> Tested-by: Thierry Reding <[email protected]> Tested-by: Erik Faye-Lund <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2013-04-22gpu: host1x: drm: Add memory manager and fbArto Merilainen8-34/+700
This patch introduces a memory manager for tegra drm and moves existing parts to use it. As cma framebuffer helpers can no more be used, this patch adds also a separate framebuffer driver for tegra. Signed-off-by: Arto Merilainen <[email protected]> Signed-off-by: Terje Bergstrom <[email protected]> Reviewed-by: Thierry Reding <[email protected]> Tested-by: Thierry Reding <[email protected]> Tested-by: Erik Faye-Lund <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2013-04-22gpu: host1x: Remove second host1x driverTerje Bergstrom10-342/+317
Remove second host1x driver, and bind tegra-drm to the new host1x driver. The logic to parse device tree and track clients is moved to drm.c. Signed-off-by: Arto Merilainen <[email protected]> Signed-off-by: Terje Bergstrom <[email protected]> Reviewed-by: Thierry Reding <[email protected]> Tested-by: Thierry Reding <[email protected]> Tested-by: Erik Faye-Lund <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2013-04-22gpu: host1x: drm: Rename host1x to host1x_drmArto Merilainen6-26/+28
Both host1x and drm drivers have host1x structures. This patch renames the host1x structure under drm to follow name host1x_drm. Signed-off-by: Arto Merilainen <[email protected]> Signed-off-by: Terje Bergstrom <[email protected]> Reviewed-by: Thierry Reding <[email protected]> Tested-by: Thierry Reding <[email protected]> Tested-by: Erik Faye-Lund <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2013-04-22drm/tegra: Move drm to live under host1xTerje Bergstrom16-14/+11
Make drm part of host1x driver. Signed-off-by: Arto Merilainen <[email protected]> Signed-off-by: Terje Bergstrom <[email protected]> Reviewed-by: Thierry Reding <[email protected]> Tested-by: Thierry Reding <[email protected]> Tested-by: Erik Faye-Lund <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2013-04-22gpu: host1x: Add debug supportTerje Bergstrom15-0/+807
Add support for host1x debugging. Adds debugfs entries, and dumps channel state to UART in case of stuck job. Signed-off-by: Arto Merilainen <[email protected]> Signed-off-by: Terje Bergstrom <[email protected]> Reviewed-by: Thierry Reding <[email protected]> Tested-by: Thierry Reding <[email protected]> Tested-by: Erik Faye-Lund <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2013-04-22gpu: host1x: Add channel supportTerje Bergstrom25-1/+2913
Add support for host1x client modules, and host1x channels to submit work to the clients. Signed-off-by: Arto Merilainen <[email protected]> Signed-off-by: Terje Bergstrom <[email protected]> Reviewed-by: Thierry Reding <[email protected]> Tested-by: Thierry Reding <[email protected]> Tested-by: Erik Faye-Lund <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2013-04-22gpu: host1x: Add syncpoint wait and interruptsTerje Bergstrom10-0/+846
Add support for sync point interrupts, and sync point wait. Sync point wait used interrupts for unblocking wait. Signed-off-by: Arto Merilainen <[email protected]> Signed-off-by: Terje Bergstrom <[email protected]> Reviewed-by: Thierry Reding <[email protected]> Tested-by: Thierry Reding <[email protected]> Tested-by: Erik Faye-Lund <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2013-04-22gpu: host1x: Add host1x driverTerje Bergstrom15-0/+957
Add host1x, the driver for host1x and its client unit 2D. The Tegra host1x module is the DMA engine for register access to Tegra's graphics- and multimedia-related modules. The modules served by host1x are referred to as clients. host1x includes some other functionality, such as synchronization. Signed-off-by: Arto Merilainen <[email protected]> Signed-off-by: Terje Bergstrom <[email protected]> Reviewed-by: Thierry Reding <[email protected]> Tested-by: Thierry Reding <[email protected]> Tested-by: Erik Faye-Lund <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2013-04-22drm: Perform a full mode set when the pixel format changedLaurent Pinchart1-0/+3
Test whether the pixel format changes in the mode set handler, and perform a full mode set instead of a mode set base if it does. Signed-off-by: Laurent Pinchart <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2013-04-22drm: Don't allow page flip to change pixel formatLaurent Pinchart1-0/+6
A page flip is not a mode set, changing the frame buffer pixel format doesn't make sense and isn't handled by most drivers anyway. Disallow it. Signed-off-by: Laurent Pinchart <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
2013-04-22Merge branch 'exynos-drm-next' of ↵Dave Airlie9-507/+324
git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next Inki writes: This is initial pull request for Exynos. It includes a big change that it makes drm_display_mode for timings parameters to be used for exynos4 and exynos5 commonly and cleans up unnecessary codes. And also it adds device tree support for fimd to get timing values and interrupt source from dts file. In addition, one more patch, device tree support feature for Exynos FIMC, is being reviewed. This patch was posted a little ago like below, http://www.mail-archive.com/[email protected]/msg17568.html So we are going to request git pull one more time after reviewed. * 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: drm/exynos: prepare FIMD clocks Revert "of/exynos_g2d: Add Bindings for exynos G2D driver" drm/exynos: drm_connector: Fix error check condition drm/exynos: drm_rotator: Fix incorrect usage of IS_ERR_OR_NULL drm/exynos: mixer: Fix incorrect usage of IS_ERR_OR_NULL drm/exynos: hdmi: Fix incorrect usage of IS_ERR_OR_NULL drm/exynos: change the method for getting the interrupt drm/exynos: enable OF_VIDEOMODE and FB_MODE_HELPERS for exynos drm fimd drm/exynos: Add display-timing node parsing using video helper function drm/exynos: hdmi: move mode_fixup to drm common hdmi drm/exynos: hdmi: using drm_display_mode timings for exynos4
2013-04-22Merge branch 'drm-intel-fixes' of ↵Dave Airlie26-291/+706
git://people.freedesktop.org/~danvet/drm-intel into drm-next Daniel writes: As promised a stash of (mostly) fixes. Two pieces of non-fixes included: - A notch more gtt refactoring from Ben, beating to death with igt in our nightly testing. - Support for display display-less server chips (again from Ben). New hw support which is only likely to break itself ;-) Otherwise just tons of fixes: - hpd irq storm mitigation from Egbert Eich. Your -next tree already has the infrastructure, this here just supplies the logic. - sdvo hw state check fix from Egbert Eich - fb cb tune settings for the pch pll clocks on cpt/ppt - "Bring a bigger gun" coherence workaround for multi-threade, mulit-core & thrashing tiled gtt cpu access from Chris. - Update haswell mPHY code. - l3$ caching for context objects on ivb/hsw (Chris). - dp aux refclock fix for haswell (Jani) - moar overclocking fixes for snb/ivb (Ben) - ecobits ppgtt pte caching control fixes from Ville - fence stride check fixes and limit improvements (Ville) - fix up crtc force restoring, potentially resulting in tons of hw state check WARNs - OOPS fix for NULL derefencing of fb pointers when force-restoring a crtc when other crtcs are disabled and the force-restored crtc is _not_ the first one. - Fix pfit disabling on gen2/3. - Haswell ring freq scaling fixes (Chris). - backlight init/teardown fix (failed eDP init killed the lvds backlight) from Jani - cpt/ppt fdi polarity fixes from Paulo (should help a lot of the FDI link train failures). - And a bunch of smaller things all over. * 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel: (56 commits) drm/i915: fix bpc vs. bpp confusion in intel_crtc_compute_config drm/i915: move cpu_transcoder to the pipe configuration drm/i915: preserve the PBC bits of TRANS_CHICKEN2 drm/i915: set CPT FDI RX polarity bits based on VBT drm/i915: Add Reenable Timer to turn Hotplug Detection back on (v4) drm/i915: Disable HPD interrupt on pin when irq storm is detected (v3) drm/i915: Mask out the HPD irq bits before setting them individually. drm/i915: (re)init HPD interrupt storm statistics drm/i915: Add HPD IRQ storm detection (v5) drm/i915: WARN when LPT-LP is not paired with ULT CPU drm/i915: don't intel_crt_init on any ULT machines drm/i915: remove comment about IVB link training from intel_pm.c drm/i915: VLV doesn't have LLC drm/i915: Scale ring, rather than ia, frequency on Haswell drm/i915: shorten debugfs output simple attributes drm/i915: Fixup pfit disabling for gen2/3 drm/i915: Fixup Oops in the pipe config computation drm/i915: ensure single initialization and cleanup of backlight device drm/i915: don't touch the PF regs if the power well is down drm/i915: add intel_using_power_well ...
2013-04-21drm/exynos: prepare FIMD clocksVikas Sajjan1-2/+12
While migrating to common clock framework (CCF), I found that the FIMD clocks were pulled down by the CCF. If CCF finds any clock(s) which has NOT been claimed by any of the drivers, then such clock(s) are PULLed low by CCF. Calling clk_prepare() for FIMD clocks fixes the issue. This patch also replaces clk_disable() with clk_unprepare() during exit, since clk_prepare() is called in fimd_probe(). Signed-off-by: Vikas Sajjan <[email protected]> Signed-off-by: Inki Dae <[email protected]>
2013-04-18drm/i915: fix bpc vs. bpp confusion in intel_crtc_compute_configDaniel Vetter1-2/+2
Oops. This regression has been introduced in commit 5d2d38ddcac991f71c19d03d95bde8e14abc0352 Author: Daniel Vetter <[email protected]> Date: Wed Mar 27 00:45:01 2013 +0100 drm/i915: clean up pipe bpp confusion Reported-by: Jesse Barnes <[email protected]> Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2013-04-18drm/i915: move cpu_transcoder to the pipe configurationDaniel Vetter4-24/+32
For a bunch of reason we need to more accurately track this: - hw pipe state readout for Haswell needs the cpu transcoder. - We need to know the right cpu transcoder in a bunch of places in ->disable and other modeset callbacks. In the future we need to add hw state readout&check support, too. But to avoid ugly merge conflicts do the rote sed job now without any functional changes. v2: Preserve the cpu_transcoder value when overwriting crtc->config. Reported by Paulo. Cc: Paulo Zanoni <[email protected]> Reviewed-by: Paulo Zanoni <[email protected]> Reviewed-by: Chris Wilson <[email protected]> (v1) [danvet: Removed rough whitespace that Chris spotted.] Signed-off-by: Daniel Vetter <[email protected]>
2013-04-18drm/i915: preserve the PBC bits of TRANS_CHICKEN2Paulo Zanoni2-3/+11
Bits 30 and 24:0 are PBC, so don't zero them. Some of the other bits are being zeroed, but I couldn't find a reason for this, so leave them as they are for now to avoid regressions. Signed-off-by: Paulo Zanoni <[email protected]> Reviewed-by: Imre Deak <[email protected]> [danvet: Delete the redudant #define that Imre spotted in his review.] Signed-off-by: Daniel Vetter <[email protected]>
2013-04-18drm/i915: set CPT FDI RX polarity bits based on VBTPaulo Zanoni5-6/+16
Check the VBT to see if the machine has inverted FDI RX polarity on CPT. Based on this bit, set the appropriate bit on the TRANS_CHICKEN2 registers. This should fix some machines that were showing black screens on all outputs. Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60029 Signed-off-by: Paulo Zanoni <[email protected]> Reviewed-by: Imre Deak <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
2013-04-18drm/i915: Add Reenable Timer to turn Hotplug Detection back on (v4)Egbert Eich2-1/+52
We disable hoptplug detection when we encounter a hotplug event storm. Still hotplug detection is required on some outputs (like Display Port). The interrupt storm may be only temporary (on certain Dell Laptops for instance it happens at certain charging states of the system). Thus we enable it after a certain grace period (2 minutes). Should the interrupt storm persist it will be detected immediately and it will be disabled again. v2: Reordered drm_i915_private: moved hotplug_reenable_timer to hpd state tracker. v3: Clarified loop start value, Removed superfluous test for Ivybridge and Haswell, Restructured loop to avoid deep nesting (all suggested by Ville Syrjälä) v4: Fixed two bugs pointed out by Jani Nikula. Signed-off-by: Egbert Eich <[email protected]> Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
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