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2019-09-06Merge branch 'etnaviv/next' of https://git.pengutronix.de/git/lst/linux into ↵Dave Airlie1-1/+3
drm-next single etnaviv fix for an error path. Signed-off-by: Dave Airlie <[email protected]> From: Lucas Stach <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-09-06Merge tag 'drm-next-5.4-2019-08-30' of ↵Dave Airlie99-140/+91412
git://people.freedesktop.org/~agd5f/linux into drm-next drm-next-5.4-2019-08-30: amdgpu: - Add DC support for Renoir - Add some GPUVM hw bug workarounds - add support for the smu11 i2c controller - GPU reset vram lost bug fixes - Navi1x powergating fixes - Navi12 power fixes - Renoir power fixes - Misc bug fixes and cleanups Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-09-03Merge tag 'exynos-drm-next-for-v5.4' of ↵Dave Airlie7-3/+19
git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next - JUst one cleanup which drops the use of drmP.h header file. Signed-off-by: Dave Airlie <[email protected]> From: Inki Dae <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-09-02drm/etnaviv: fix missing unlock on error in etnaviv_iommuv1_context_alloc()Wei Yongjun1-1/+3
Add the missing unlock before return from function etnaviv_iommuv1_context_alloc() in the error handling case. Fixes: 27b67278e007 ("drm/etnaviv: rework MMU handling") Signed-off-by: Wei Yongjun <[email protected]> Signed-off-by: Lucas Stach <[email protected]>
2019-09-01drm/exynos: drop use of drmP.hSam Ravnborg7-3/+19
There was a few uses of drmP that was missed in the last patch removing this header from exynos. Remove the final uses of this header. Signed-off-by: Sam Ravnborg <[email protected]> Cc: Inki Dae <[email protected]> Cc: Joonyoung Shim <[email protected]> Cc: Seung-Woo Kim <[email protected]> Cc: Kyungmin Park <[email protected]> Cc: David Airlie <[email protected]> Cc: Daniel Vetter <[email protected]> Cc: Kukjin Kim <[email protected]> Cc: Krzysztof Kozlowski <[email protected]> Cc: Jingoo Han <[email protected]> Signed-off-by: Inki Dae <[email protected]>
2019-08-30drm/amdgpu: Move null pointer dereference checkAustin Kim1-2/+3
Null pointer dereference check should have been checked, ahead of below routine. struct amdgpu_device *adev = hwmgr->adev; With this commit, it could avoid potential NULL dereference. Signed-off-by: Austin Kim <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-30drm/amdgpu: Fix undefined dm_ip_block for navi12Petr Cvek1-0/+2
There is missing "if defined" CONFIG_DRM_AMD_DC block for non DC configurations. This will cause link error. The patch is fixing that. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=110979 Signed-off-by: Petr Cvek <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-30drm/amdgpu: fix no interrupt issue for renoir emu (v2)Aaron Liu1-8/+10
In renoir's vega10_ih model, there's a security change in mmIH_CHICKEN register, that limits IH to use physical address (FBPA, GPA) directly. Those chicken bits need to be programmed first. Signed-off-by: Aaron Liu <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-30drm/amdgpu: update IH_CHICKEN in oss 4.0 IP header for VG/RV seriesAaron Liu1-0/+4
In Renoir's emulator, those chicken bits need to be programmed. Signed-off-by: Aaron Liu <[email protected]> Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-30drm/amd/powerplay: SMU_MSG_OverridePcieParameters is unsupport for APUAaron Liu1-0/+3
For apu, SMU_MSG_OverridePcieParameters is unsupport. So return directly in smu_override_pcie_parameters function. Signed-off-by: Aaron Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Evan Quan <[email protected]> Acked-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-30drm/amdgpu: Handle job is NULL use case in amdgpu_device_gpu_recoverAndrey Grodzovsky1-6/+4
This should be checked at all places job is accessed. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amdgpu: Enable DC on RenoirRoman Li2-0/+9
Enable DC support for renoir. Acked-by: Harry Wentland <[email protected]> Signed-off-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/display: Add DCN2.1 changes to DMLRoman Li2-0/+23
Hook up the DML changes for renoir. Acked-by: Harry Wentland <[email protected]> Signed-off-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/display: Correct order of RV family clk managers for RenoirRoman Li1-6/+6
Need to check for renoir first. Acked-by: Harry Wentland <[email protected]> Signed-off-by: Roman Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/display: add Renoir to kconfigBhawanpreet Lakha1-0/+8
Add a kconfig option to enable renoir. Acked-by: Harry Wentland <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/display: build dcn21 blocksBhawanpreet Lakha1-0/+3
Enable the building of dcn21 support. Acked-by: Harry Wentland <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/display: add dcn21 core DC changesBhawanpreet Lakha4-0/+11
Add missing parameters, to make dcn21 compile without errors Acked-by: Harry Wentland <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/display: add dal_asic_id for renoirBhawanpreet Lakha1-0/+5
Add the rev id for renoir. Acked-by: Harry Wentland <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/display: call update_bw_bounding_boxBhawanpreet Lakha2-0/+10
call update_bw_bounding_box in DC construct Acked-by: Harry Wentland <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/display: Handle Renoir in amdgpu_dm (v2)Bhawanpreet Lakha1-0/+14
Hook up renoir support to KMS. v2: squash in "Fixes for Renoir in amdgpu_dm" Acked-by: Harry Wentland <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/display: Handle Renoir in DCBhawanpreet Lakha3-0/+20
add Renoir DCN version in DC and handle it Acked-by: Harry Wentland <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/display: Fix register namesBhawanpreet Lakha1-2/+2
rename VM_CONTEXT0 to MMVM_CONTEXT0 as that is the name defined in the register files Acked-by: Harry Wentland <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/display: Add Renoir DMLBhawanpreet Lakha6-0/+8058
DML provides the display configuration validation as provided by the hw teams. Acked-by: Harry Wentland <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/display: Add Renoir GPIOBhawanpreet Lakha7-0/+687
Misc display related configuration details. Acked-by: Harry Wentland <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/display: Add Renoir resource (v2)Bhawanpreet Lakha3-1/+1726
Manages the renoir display resources (crtcs, phys, plls, etc.). v2: rebase (Alex) Acked-by: Harry Wentland <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/display: Add Renoir clock managerBhawanpreet Lakha7-0/+1013
Controls display clocks and interfaces with powerplay for clock and power requirements. Acked-by: Harry Wentland <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/display: Add Renoir Hubbub (v2)Bhawanpreet Lakha3-1/+728
Controls the display hw's interface to memory. v2: rebase (Alex) Acked-by: Harry Wentland <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/display: Add Renoir hubbub registers listBhawanpreet Lakha3-0/+118
These are the registers used to program the hubbub hw. Acked-by: Harry Wentland <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/display: Add hubp block for Renoir (v2)Bhawanpreet Lakha3-0/+387
This provides the interface to memory for the display hw. v2: minor cleanup (Alex) Acked-by: Harry Wentland <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/display: Add Renoir irq_services (v2)Bhawanpreet Lakha3-0/+418
Provides the interface to configure display interrrupts on renoir. v2: rebase fix (Alex) Acked-by: Harry Wentland <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/display: Add pp_smu functions for RenoirBhawanpreet Lakha1-0/+47
This defines the interface for communicating requirements between DC and powerplay. Acked-by: Harry Wentland <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/display: Add Renoir hw_seq register listBhawanpreet Lakha1-0/+97
These are the registers used to for the hw sequences for modesetting. Acked-by: Harry Wentland <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/display: Add Renoir clock registers listBhawanpreet Lakha1-0/+17
These are the registers used to program the clock hw. Acked-by: Harry Wentland <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/display: Add Renoir registers (v3)Bhawanpreet Lakha7-0/+75988
add registers for dcn, clk, and renoir ip offsets v2: header cleanup (Alex) v3: Add DPCS registers (Hersen) Acked-by: Harry Wentland <[email protected]> Signed-off-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/powerplay: add the interface for getting ultimate frequency v3Prike Liang5-33/+137
add the get_dpm_ultimate_freq for supporting different swSMU. -v2: Handle the unsupported clock type and read smc message failed case and return error code. Move the smu12 uclk frequency retrieved logic to renoir ppt. -v3: Use goto clause to handle invalidate clk index. Add the limited tag for smu_get_dpm_uclk to avoid other likewise interface introduced. Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/powerplay: enable populate DPM clocks table for swSMU APUPrike Liang1-3/+0
Should populate DPM clocks tables during hw init,otherwise will suffer from invalidate table. Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/powerplay: regards the APU always enable the dpm feature maskPrike Liang1-1/+1
There is no driver message to enable/disable feature mask for APU. For the sake of APU reusing swSMU interface and assume APU supports all the feature. Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Evan Quan <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amdgpu: Initialize and update SDMA power gatingPrike Liang1-0/+1
Init SDMA HW base configuration and enable idle INT for rn. Signed-off-by: Prike Liang <[email protected]> Reviewed-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amdgpu/psp: keep TMR in visible vram region for SRIOVTianci.Yin1-2/+8
Fix compute ring test failure in sriov scenario. Reviewed-by: Christian König <[email protected]> Signed-off-by: Tianci.Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amdgpu: keep the stolen memory in visible vram regionTianci.Yin2-3/+6
stolen memory should be fixed in visible region. Reviewed-by: Christian König <[email protected]> Signed-off-by: Tianci.Yin <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amdgpu: fix spelling mistake "jumpimng" -> "jumping"Colin Ian King1-1/+1
There is a spelling mistake in a DRM_DEBUG_DRIVER debug message. Fix it. Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amdgpu/virtual_dce: drop error message in hw_initAlex Deucher1-10/+1
No need to add new asic cases. This is a sw display implementation, so just drop the error message so when we add new asics, all we have to do is add the virtual dce IP module. Reviewed-by: Xiaojie Yuan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amdgpu/si: fix ASIC testsJean Delvare1-3/+3
Comparing adev->family with CHIP constants is not correct. adev->family can only be compared with AMDGPU_FAMILY constants and adev->asic_type is the struct member to compare with CHIP constants. They are separate identification spaces. Signed-off-by: Jean Delvare <[email protected]> Fixes: 62a37553414a ("drm/amdgpu: add si implementation v10") Cc: Ken Wang <[email protected]> Cc: Alex Deucher <[email protected]> Cc: "Christian König" <[email protected]> Cc: "David (ChunMing) Zhou" <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/amdgpu: hide voltage and power sensors on SI and KV partsJean Delvare1-1/+9
The driver does not support these sensors yet and there is no point in creating sysfs attributes which will always return an error. Signed-off-by: Jean Delvare <[email protected]> Cc: Alex Deucher <[email protected]> Cc: "Christian König" <[email protected]> Cc: "David (ChunMing) Zhou" <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amdgpu: introduce vram lost for reset (v2)Monk Liu4-4/+10
for SOC15/vega10 the BACO reset & mode1 would introduce vram lost in high end address range, current kmd's vram lost checking cannot catch it since it only check very ahead visible frame buffer v2: cover NV as well Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amd/powerplay: enable jpeg powergating for navi1xXiaojie Yuan1-1/+2
jpeg pg depends on vcn pg Signed-off-by: Xiaojie Yuan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amdgpu: enable athub powergating for navi12Xiaojie Yuan1-1/+2
Signed-off-by: Xiaojie Yuan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amdgpu: enable vcn powergating for navi12Xiaojie Yuan1-1/+2
Signed-off-by: Xiaojie Yuan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-29drm/amdgpu: correct in_suspend setting for navi seriesHawking Zhang1-10/+2
in_suspend flag should be set in amdgpu_device_suspend/resume in pairs, instead of gfx10 ip suspend/resume function. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-08-27drm/amdgpu: fix GFXOFF on Picasso and Raven2Aaron Liu1-7/+7
For picasso(adev->pdev->device == 0x15d8)&raven2(adev->rev_id >= 0x8), firmware is sufficient to support gfxoff. In commit 98f58ada2d37e, for picasso&raven2, return directly and cause gfxoff disabled. Fixes: 98f58ada2d37 ("drm/amdgpu/gfx9: update pg_flags after determining if gfx off is possible") Reviewed-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Aaron Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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