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2017-04-28Merge branch 'pci/misc' into nextBjorn Helgaas2-2/+3
* pci/misc: PCI: Change pci_host_common_probe() visibility PCI: Fix typo pci_cfg_access_lock() comment PCI: Include pci.h for struct pci_ops definition
2017-04-28Merge branch 'pci/irq' into nextBjorn Helgaas6-23/+115
* pci/irq: PCI: Disable boot interrupt quirk for ASUS M2N-LR nvme/pci: Switch to pci_request_irq() PCI/irq: Add pci_request_irq() and pci_free_irq() helpers genirq: Return the IRQ name from free_irq() genirq: Fix indentation in remove_irq()
2017-04-28Merge branch 'pci/ioremap' into nextBjorn Helgaas24-31/+185
* pci/ioremap: PCI: versatile: Update PCI config space remap function PCI: keystone-dw: Update PCI config space remap function PCI: layerscape: Update PCI config space remap function PCI: hisi: Update PCI config space remap function PCI: tegra: Update PCI config space remap function PCI: xgene: Update PCI config space remap function PCI: armada8k: Update PCI config space remap function PCI: designware: Update PCI config space remap function PCI: iproc-platform: Update PCI config space remap function PCI: qcom: Update PCI config space remap function PCI: rockchip: Update PCI config space remap function PCI: spear13xx: Update PCI config space remap function PCI: xilinx-nwl: Update PCI config space remap function PCI: xilinx: Update PCI config space remap function PCI: ECAM: Map config region with pci_remap_cfgspace() PCI: Implement devm_pci_remap_cfgspace() devres: fix devm_ioremap_*() offset parameter kerneldoc description ARM: Implement pci_remap_cfgspace() interface ARM64: Implement pci_remap_cfgspace() interface linux/io.h: Add pci_remap_cfgspace() interface PCI: Remove __weak tag from pci_remap_iospace()
2017-04-28Merge branch 'pci/iommu' into nextBjorn Helgaas1-0/+2
* pci/iommu: PCI: Add bridge DMA alias quirk for ITE 8893 bridge
2017-04-28Merge branch 'pci/enumeration' into nextBjorn Helgaas8-29/+100
* pci/enumeration: PCI: Include PCI-to-PCIe bridges as "Downstream Ports" PCI: Improve __pci_read_base() robustness PCI: Short-circuit pci_device_is_present() for disconnected devices PCI/MSI: Skip disabling disconnected devices PCI: Don't attempt config access to disconnected devices PCI: Add device disconnected state PCI: Export PCI device config accessors
2017-04-28Merge branch 'pci/switchtec' into nextBjorn Helgaas10-0/+1936
* pci/switchtec: switchtec: Add IOCTLs to the Switchtec driver switchtec: Add sysfs attributes to the Switchtec driver switchtec: Add user interface documentation MicroSemi Switchtec management interface driver Conflicts: drivers/pci/Kconfig
2017-04-28Merge branch 'pci/host-thunder' into nextBjorn Helgaas4-3/+34
* pci/host-thunder: PCI/ACPI: Add ThunderX pass2.x 2nd node MCFG quirk PCI/ACPI: Tidy up MCFG quirk whitespace PCI: Avoid generating invalid ThunderX2 DMA aliases PCI: Add device flag PCI_DEV_FLAGS_BRIDGE_XLATE_ROOT PCI: Apply Cavium ACS quirk only to CN81xx/CN83xx/CN88xx devices
2017-04-28Merge branch 'pci/host-rockchip' into nextBjorn Helgaas3-23/+70
* pci/host-rockchip: PCI: rockchip: Modularize PCI: Export pci_remap_iospace() and pci_unmap_iospace() PCI: rockchip: Add remove() support PCI: rockchip: Set PCI_EXP_LNKSTA_SLC in the Root Port PCI: rockchip: Advertise 128-byte Read Completion Boundary support PCI: rockchip: Make 'return 0' more obvious in probe() PCI: rockchip: Unindent rockchip_pcie_set_power_limit() PCI: rockchip: Handle regulator_get_current_limit() failure correctly
2017-04-28Merge branch 'pci/host-mvebu' into nextBjorn Helgaas1-2/+3
* pci/host-mvebu: PCI: mvebu: Avoid changing the SCC bit in the Link Status register
2017-04-28Merge branch 'pci/host-iproc' into nextBjorn Helgaas1-1/+1
* pci/host-iproc: PCI: iproc: Add PCI_DOMAIN dependency to PCI Kconfig
2017-04-28Merge branch 'pci/host-imx6' into nextBjorn Helgaas3-55/+161
* pci/host-imx6: PCI: imx6: Fix spelling mistake: "contol" -> "control" PCI: imx6: Do not switch speed if Gen2 is disabled PCI: imx6: Do not wait for speed change on i.MX7 PCI: imx6: Allow probe deferral by reset GPIO PCI: imx6: Add code to support i.MX7D
2017-04-28Merge branch 'pci/host-hv' into nextBjorn Helgaas1-11/+35
* pci/host-hv: PCI: hv: Convert hv_pci_dev.refs from atomic_t to refcount_t PCI: hv: Allocate interrupt descriptors with GFP_ATOMIC PCI: hv: Specify CPU_AFFINITY_ALL for MSI affinity when >= 32 CPUs PCI: hv: Lock PCI bus on device eject PCI: hv: Properly handle PCI bus remove
2017-04-28Merge branch 'pci/host-faraday' into nextBjorn Helgaas4-0/+698
* pci/host-faraday: PCI: faraday: Add Faraday Technology FTPCI100 PCI Host Bridge driver PCI: Add DT bindings for Faraday Technology PCI Host Bridge
2017-04-28Merge branch 'pci/host-designware' into nextBjorn Helgaas50-158/+5122
* pci/host-designware: ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to SW_WKUP MAINTAINERS: Add PCI Endpoint maintainer Documentation: PCI: Add userguide for PCI endpoint test function tools: PCI: Add sample test script to invoke pcitest tools: PCI: Add a userspace tool to test PCI endpoint Documentation: misc-devices: Add Documentation for pci-endpoint-test driver misc: Add host side PCI driver for PCI test function device PCI: Add device IDs for DRA74x and DRA72x dt-bindings: PCI: dra7xx: Add DT bindings to enable unaligned access PCI: dwc: dra7xx: Workaround for errata id i870 dt-bindings: PCI: dra7xx: Add DT bindings for PCI dra7xx EP mode PCI: dwc: dra7xx: Add EP mode support PCI: dwc: dra7xx: Facilitate wrapper and MSI interrupts to be enabled independently dt-bindings: PCI: Add DT bindings for PCI designware EP mode PCI: dwc: designware: Add EP mode support Documentation: PCI: Add binding documentation for pci-test endpoint function PCI: endpoint: functions: Add an EP function to test PCI Documentation: PCI: Add specification for the *PCI test* function device PCI: endpoint: Create configfs entry for EPC device and EPF driver Documentation: PCI: Guide to use PCI endpoint configfs PCI: endpoint: Introduce configfs entry for configuring EP functions Documentation: PCI: Guide to use PCI Endpoint Core Layer PCI: endpoint: Add EP core layer to enable EP controller and EP functions PCI: dwc: dra7xx: Push request_irq() call to the bottom of probe PCI: dwc: designware: Move _unroll configurations to a separate function PCI: dwc: all: Modify dbi accessors to access data of 4/2/1 bytes PCI: dwc: all: Modify dbi accessors to take dbi_base as argument PCI: dwc: artpec6: Populate cpu_addr_fixup ops PCI: dwc: dra7xx: Populate cpu_addr_fixup ops PCI: dwc: designware: Add new *ops* for CPU addr fixup PCI: dwc: Fix uninitialized variable in dw_handle_msi_irq() PCI: dwc: Unindent dw_handle_msi_irq() loop PCI: dwc: Fix dw_pcie_ops NULL pointer dereference PCI: dwc: Select PCI_HOST_COMMON for hisi PCI: thunder-pem: Fix legacy firmware PEM-specific resources PCI: thunder-pem: Add legacy firmware support for Cavium ThunderX host controller PCI: thunder-pem: Use Cavium assigned hardware ID for ThunderX host controller PCI: iproc: Save host bridge window resource in struct iproc_pcie PCI/ASPM: Always set link->downstream to avoid NULL dereference on remove PCI: Prevent VPD access for QLogic ISP2722 PCI: exynos: Initialize elbi_base even when using PHY framework
2017-04-28ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to SW_WKUPKishon Vijay Abraham I1-1/+1
The PCIe programming sequence in TRM suggests CLKSTCTRL of PCIe should be set to SW_WKUP. There are no issues when CLKSTCTRL is set to HW_AUTO in RC mode. However in EP mode, the host system is not able to access the MEMSPACE and setting the CLKSTCTRL to SW_WKUP fixes it. Acked-by: Tony Lindgren <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2017-04-28MAINTAINERS: Add PCI Endpoint maintainerKishon Vijay Abraham I1-0/+9
Add maintainer for the newly introduced PCI Endpoint framework. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2017-04-28Documentation: PCI: Add userguide for PCI endpoint test functionKishon Vijay Abraham I2-0/+181
Add documentation to help users use pci-epf-test function driver and pci_endpoint_test host driver for testing PCI. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2017-04-28tools: PCI: Add sample test script to invoke pcitestKishon Vijay Abraham I1-0/+56
Add a simple test script that invokes the pcitest userspace tool to perform all the PCI endpoint tests (BAR tests, interrupt tests, read tests, write tests and copy tests). Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2017-04-28tools: PCI: Add a userspace tool to test PCI endpointKishon Vijay Abraham I1-0/+186
Add a userspace tool to invoke the ioctls exposed by the PCI endpoint test driver to perform various PCI tests. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2017-04-28Documentation: misc-devices: Add Documentation for pci-endpoint-test driverKishon Vijay Abraham I1-0/+35
Add Documentation for pci-endpoint-test driver. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2017-04-28misc: Add host side PCI driver for PCI test function deviceKishon Vijay Abraham I5-0/+562
Add PCI endpoint test driver that can verify base address register, legacy interrupt/MSI interrupt and read/write/copy buffers between host and device. The corresponding pci-epf-test function driver should be used on the EP side. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2017-04-28PCI: Add device IDs for DRA74x and DRA72xKishon Vijay Abraham I1-0/+2
Add device IDs for DRA74x and DRA72x devices. These devices have configurable PCI endpoint. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2017-04-28dt-bindings: PCI: dra7xx: Add DT bindings to enable unaligned accessKishon Vijay Abraham I1-0/+5
Update device tree binding documentation of TI's dra7xx PCI controller to include property for enabling unaligned mem access. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2017-04-28PCI: dwc: dra7xx: Workaround for errata id i870Kishon Vijay Abraham I1-0/+49
According to errata i870, access to the PCIe slave port that are not 32-bit aligned will result in incorrect mapping to TLP Address and Byte enable fields. Accessing non 32-bit aligned data causes incorrect data in the target buffer if memcpy is used. Implement the workaround for this errata here. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2017-04-28dt-bindings: PCI: dra7xx: Add DT bindings for PCI dra7xx EP modeKishon Vijay Abraham I1-7/+30
Add device tree binding documentation for PCI dra7xx EP mode. Acked-by: Rob Herring <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2017-04-28PCI: dwc: dra7xx: Add EP mode supportKishon Vijay Abraham I4-18/+221
The PCIe controller integrated in dra7xx SoCs is capable of operating in endpoint mode. Add endpoint mode support to dra7xx driver. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2017-04-28PCI: dwc: dra7xx: Facilitate wrapper and MSI interrupts to be enabled ↵Kishon Vijay Abraham I1-6/+18
independently No functional change. Split dra7xx_pcie_enable_interrupts() into dra7xx_pcie_enable_wrapper_interrupts() and dra7xx_pcie_enable_msi_interrupts() so that wrapper interrupts and MSI interrupts can be enabled independently. This is in preparation for adding EP mode support to dra7xx driver since EP mode doesn't have to enable msi_interrupts. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2017-04-28dt-bindings: PCI: Add DT bindings for PCI designware EP modeKishon Vijay Abraham I1-8/+18
Add device tree binding documentation for PCI designware EP mode. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Acked-by: Rob Herring <[email protected]>
2017-04-28PCI: dwc: designware: Add EP mode supportKishon Vijay Abraham I5-0/+578
Add endpoint mode support to designware driver. This uses the EP Core layer introduced recently to add endpoint mode support. *Any* function driver can now use this designware device in order to achieve the EP functionality. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2017-04-28Documentation: PCI: Add binding documentation for pci-test endpoint functionKishon Vijay Abraham I2-0/+19
Add binding documentation for pci-test endpoint function that helps in adding and configuring pci-test endpoint function. Signed-off-by: Kishon Vijay Abraham I <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2017-04-25PCI: imx6: Fix spelling mistake: "contol" -> "control"Colin Ian King1-2/+2
Trivial fix to spelling mistake in dev_err message Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Acked-by: Richard Zhu <[email protected]>
2017-04-24PCI: Disable boot interrupt quirk for ASUS M2N-LRStefan Assmann1-0/+24
The ASUS M2N-LR should not trigger boot interrupt quirks although it carries an Intel 6702PXH. On this board the boot interrupt quirks cause incorrect IRQ assignments and should be disabled. Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=43074 Tested-by: Solomon Peachy <[email protected]> Signed-off-by: Stefan Assmann <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
2017-04-24PCI: versatile: Update PCI config space remap functionLorenzo Pieralisi1-1/+2
PCI configuration space should be mapped with a memory region type that generates on the CPU host bus non-posted write transations. Update the driver to use the devm_ioremap_nopost* interface to make sure the correct memory mappings for PCI configuration space are used. Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Cc: Rob Herring <[email protected]>
2017-04-24PCI: keystone-dw: Update PCI config space remap functionLorenzo Pieralisi1-1/+1
PCI configuration space should be mapped with a memory region type that generates on the CPU host bus non-posted write transations. Update the driver to use the devm_pci_remap_cfg* interface to make sure the correct memory mappings for PCI configuration space are used. Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Cc: Murali Karicheri <[email protected]>
2017-04-24PCI: layerscape: Update PCI config space remap functionLorenzo Pieralisi1-1/+1
PCI configuration space should be mapped with a memory region type that generates on the CPU host bus non-posted write transations. Update the driver to use the devm_pci_remap_cfg* interface to make sure the correct memory mappings for PCI configuration space are used. Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Cc: Mingkai Hu <[email protected]> Cc: Minghuan Lian <[email protected]> Cc: Roy Zang <[email protected]>
2017-04-24PCI: hisi: Update PCI config space remap functionLorenzo Pieralisi1-4/+3
PCI configuration space should be mapped with a memory region type that generates on the CPU host bus non-posted write transations. Update the driver to use the devm_pci_remap_cfg* interface to make sure the correct memory mappings for PCI configuration space are used. Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Gabriele Paoloni <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Cc: Zhou Wang <[email protected]>
2017-04-24PCI: tegra: Update PCI config space remap functionLorenzo Pieralisi1-2/+2
PCI configuration space should be mapped with a memory region type that generates on the CPU host bus non-posted write transations. Update the driver to use correct memory mapping attributes to map config space regions to enforce configuration space non-posted writes behaviour. Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Cc: Thierry Reding <[email protected]>
2017-04-24PCI: xgene: Update PCI config space remap functionLorenzo Pieralisi1-2/+2
PCI configuration space should be mapped with a memory region type that generates on the CPU host bus non-posted write transations. Update the driver to use the devm_pci_remap_cfg* interface to make sure the correct memory mappings for PCI configuration space are used. Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Cc: Tanmay Inamdar <[email protected]>
2017-04-24PCI: armada8k: Update PCI config space remap functionLorenzo Pieralisi1-1/+1
PCI configuration space should be mapped with a memory region type that generates on the CPU host bus non-posted write transations. Update the driver to use the devm_pci_remap_cfg* interface to make sure the correct memory mappings for PCI configuration space are used. Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Cc: Thomas Petazzoni <[email protected]>
2017-04-24PCI: designware: Update PCI config space remap functionLorenzo Pieralisi1-5/+7
PCI configuration space should be mapped with a memory region type that generates on the CPU host bus non-posted write transations. Update the driver to use the devm_pci_remap_cfg* interface to make sure the correct memory mappings for PCI configuration space are used. Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Cc: Jingoo Han <[email protected]> Cc: Joao Pinto <[email protected]>
2017-04-24PCI: iproc-platform: Update PCI config space remap functionLorenzo Pieralisi1-1/+2
PCI configuration space should be mapped with a memory region type that generates on the CPU host bus non-posted write transations. Update the driver to use the devm_pci_remap_cfg* interface to make sure the correct memory mappings for PCI configuration space are used. Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Cc: Ray Jui <[email protected]> Cc: Jon Mason <[email protected]>
2017-04-24PCI: qcom: Update PCI config space remap functionLorenzo Pieralisi1-1/+1
PCI configuration space should be mapped with a memory region type that generates on the CPU host bus non-posted write transations. Update the driver to use the devm_pci_remap_cfg* interface to make sure the correct memory mappings for PCI configuration space are used. Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Cc: Stanimir Varbanov <[email protected]>
2017-04-24PCI: rockchip: Update PCI config space remap functionLorenzo Pieralisi1-1/+1
PCI configuration space should be mapped with a memory region type that generates on the CPU host bus non-posted write transations. Update the driver to use the devm_pci_remap_cfg* interface to make sure the correct memory mappings for PCI configuration space are used. Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Cc: Wenrui Li <[email protected]> Cc: Shawn Lin <[email protected]>
2017-04-24PCI: spear13xx: Update PCI config space remap functionLorenzo Pieralisi1-1/+1
PCI configuration space should be mapped with a memory region type that generate on the CPU host bus non-posted write transations. Update the driver to use the devm_pci_remap_cfg* interface to make sure the correct memory mappings for PCI configuration space are used. Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Cc: Pratyush Anand <[email protected]>
2017-04-24PCI: xilinx-nwl: Update PCI config space remap functionLorenzo Pieralisi1-1/+1
PCI configuration space should be mapped with a memory region type that generates on the CPU host bus non-posted write transations. Update the driver to use the devm_pci_remap_cfg* interface to make sure the correct memory mappings for PCI configuration space are used. Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Cc: Bharat Kumar Gogada <[email protected]> Cc: Michal Simek <[email protected]>
2017-04-24PCI: xilinx: Update PCI config space remap functionLorenzo Pieralisi1-1/+1
PCI configuration space should be mapped with a memory region type that generates on the CPU host bus non-posted write transations. Update the driver to use the devm_pci_remap_cfg* interface to make sure the correct memory mappings for PCI configuration space are used. Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Cc: Bharat Kumar Gogada <[email protected]> Cc: Michal Simek <[email protected]>
2017-04-24PCI: ECAM: Map config region with pci_remap_cfgspace()Lorenzo Pieralisi1-2/+4
The current ECAM kernel implementation uses ioremap() to map the ECAM configuration space memory region; this is not safe in that on some architectures the ioremap interface provides mappings that allow posted write transactions. This, as highlighted in the PCIe specifications (4.0 - Rev0.3, "Ordering Considerations for the Enhanced Configuration Address Mechanism"), can create ordering issues for software because posted writes transactions on the CPU host bus are non posted in the PCI express fabric. Update the ioremap() interface to use pci_remap_cfgspace() whose mapping attributes guarantee that non-posted writes transactions are issued for memory writes within the ECAM memory mapped address region. Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Cc: Jayachandran C <[email protected]>
2017-04-24PCI: Implement devm_pci_remap_cfgspace()Lorenzo Pieralisi3-2/+91
The introduction of the pci_remap_cfgspace() interface allows PCI host controller drivers to map PCI config space through a dedicated kernel interface. Current PCI host controller drivers use the devm_ioremap_*() devres interfaces to map PCI configuration space regions so in order to update them to the new pci_remap_cfgspace() mapping interface a new set of devres interfaces should be implemented so that PCI host controller drivers can make use of them. Introduce two new functions in the PCI kernel layer and Devres documentation: - devm_pci_remap_cfgspace() - devm_pci_remap_cfg_resource() so that PCI host controller drivers can make use of them to map PCI configuration space regions. Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Cc: Jonathan Corbet <[email protected]>
2017-04-24devres: fix devm_ioremap_*() offset parameter kerneldoc descriptionLorenzo Pieralisi1-3/+3
The offset parameter in the devres devm_ioremap_*() functions kerneldoc entries is erroneously defined as BUS offset whereas it is actually a resource address. Since it is actually misleading, fix the devres devm_ioremap_* offset parameter kerneldoc entry by replacing BUS offset with a more suitable description (ie Resource address). Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Cc: Tejun Heo <[email protected]>
2017-04-24ARM: Implement pci_remap_cfgspace() interfaceLorenzo Pieralisi3-0/+29
The PCI bus specification (rev 3.0, 3.2.5 "Transaction Ordering and Posting") defines rules for PCI configuration space transactions ordering and posting, that state that configuration writes have to be non-posted transactions. Current ioremap interface on ARM provides mapping functions that provide "bufferable" writes transactions (ie ioremap uses MT_DEVICE memory type) aka posted writes, so PCI host controller drivers have no arch interface to remap PCI configuration space with memory attributes that comply with the PCI specifications for configuration space. Implement an ARM specific pci_remap_cfgspace() interface that allows to map PCI config memory regions with MT_UNCACHED memory type (ie strongly ordered - non-posted writes), providing a remap function that complies with PCI specifications for config space transactions. Signed-off-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: Russell King <[email protected]>
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