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2023-06-08accel/habanalabs: upon DMA errors, use FW-extracted error causeKoby Elbaz1-29/+8
Initially, the driver used to read the error cause data directly from the ASIC. However, the FW now clears it before the driver could read it. Therefore we should use the error cause data that is extracted by the FW. Signed-off-by: Koby Elbaz <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-08accel/habanalabs: print max timeout value on CS stuckOded Gabbay1-11/+15
If a workload got stuck, we print an error to the kernel log about it. Add to that print the configured max timeout value, as that value is not fixed between ASICs and in addition it can be configured using a kernel module parameter. Signed-off-by: Oded Gabbay <[email protected]> Reviewed-by: Ofir Bitton <[email protected]>
2023-06-08accel/habanalabs: align to latest firmware specsOded Gabbay2-43/+16
Update the firmware common interface files with the latest version. Signed-off-by: Oded Gabbay <[email protected]> Reviewed-by: Ofir Bitton <[email protected]>
2023-06-08accel/habanalabs: fix mem leak in capture user mappingsMoti Haimovski1-0/+2
This commit fixes a memory leak caused when clearing the user_mappings info when a new context is opened immediately after user_mapping is captured and a hard reset is performed. Signed-off-by: Moti Haimovski <[email protected]> Reviewed-by: Dani Liberman <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-08accel/habanalabs: set unused bit as reservedOded Gabbay1-1/+1
Get latest f/w gaudi2 interface file which marks unused bist_need_iatu_config bit in cold_rst_data structure as reserved bit. Signed-off-by: Oded Gabbay <[email protected]> Reviewed-by: Ofir Bitton <[email protected]>
2023-06-08accel/habanalabs: rename security functions related argumentsKoby Elbaz1-28/+29
Make the argument names specify the registers array represent registers that should be unsecured so the user can access them. Signed-off-by: Koby Elbaz <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-08accel/habanalabs: fix gaudi2_get_tpc_idle_status() returnDan Carpenter1-1/+1
The gaudi2_get_tpc_idle_status() function returned the incorrect variable so it always returned true. Fixes: d85f0531b928 ("accel/habanalabs: break is_idle function into per-engine sub-routines") Signed-off-by: Dan Carpenter <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-08accel/habanalabs: Fix some kernel-doc commentsYang Li1-2/+2
Make the description of @regs_range_array and @regs_range_array_size to @user_regs_range_array and @user_regs_range_array_size to silence the warnings: drivers/accel/habanalabs/common/security.c:506: warning: Function parameter or member 'user_regs_range_array' not described in 'hl_init_pb_ranges_single_dcore' drivers/accel/habanalabs/common/security.c:506: warning: Function parameter or member 'user_regs_range_array_size' not described in 'hl_init_pb_ranges_single_dcore' drivers/accel/habanalabs/common/security.c:506: warning: Excess function parameter 'regs_range_array' description in 'hl_init_pb_ranges_single_dcore' drivers/accel/habanalabs/common/security.c:506: warning: Excess function parameter 'regs_range_array_size' description in 'hl_init_pb_ranges_single_dcore' Reported-by: Abaci Robot <[email protected]> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=4940 Signed-off-by: Yang Li <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-08accel/habanalabs: always fetch pci addr_dec error infoOfir Bitton1-8/+6
Due to missing indication of address decode source (LBW/HBW bus), we should always try and fetch extended information. Signed-off-by: Ofir Bitton <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-08accel/habanalabs: fix a static warning - 'dubious: x & !y'Koby Elbaz1-3/+3
Use a straight forward approach to get a conditional result. Signed-off-by: Koby Elbaz <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-08accel/habanalabs: poll for device status update following WFE cmdKoby Elbaz1-5/+23
Currently, we rely on COMMS protocol's ack to verify that WFE command has been acknowledged by the FW. However, this does not guarantee that the device status has been updated. Although unlikely, this could trigger a race since the driver expects the device to be halted at that stage, but it might not be. Therefore, we increase WFE's robustness by polling on the status register that will be updated once the device is actually halted. Signed-off-by: Koby Elbaz <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-08accel/habanalabs: expose debugfs files laterTomer Tayar3-44/+61
Currently the debugfs root folder and files for a device are created at an early step, before the device initialization and before the char device and sysfs files are exposed to user. As there is no real reason not to do it together with the device creation, postpone it to be done right afterwards. The initialization of the debugfs entry structure is left in its current position because it is used before creating the files. Signed-off-by: Tomer Tayar <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-08accel/habanalabs: add pci health check during heartbeatOfir Bitton3-3/+16
Currently upon a heartbeat failure, we don't know if the failure is due to firmware hang or due to a bad PCI link. Hence, we are reading a PCI config space register with a known value (vendor ID) so we will know which of the two possibilities caused the heartbeat failure. Signed-off-by: Ofir Bitton <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-08accel/habanalabs: add missing tpc interrupt infoDafna Hirschfeld1-1/+2
For some reason the last possible tpc interrupt cause in gaudi2_tpc_interrupts_cause is missing from the code. Signed-off-by: Dafna Hirschfeld <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-08accel/habanalabs: refactor abort of completions and waitsKoby Elbaz3-8/+14
Aborting CS completions should be in command_submission.c but aborting waiting for user interrupts should be in device.c. This separation is also for adding more abort operations in the future. Signed-off-by: Koby Elbaz <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-08accel/habanalabs: minimize encapsulation signal mutex lock timeKoby Elbaz1-2/+8
Sync Stream Encapsulated Signal Handlers can be managed from different contexts, and as such they are protected via a spin_lock. However, spin_lock was unnecessarily protecting a larger code section than really needed, covering a sleepable code section as well. Since spin_lock disables preemption, it could lead to sleeping in atomic context. Signed-off-by: Koby Elbaz <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-08drm/i915/gsc: Fix error code in intel_gsc_uc_heci_cmd_submit_nonpriv()Dan Carpenter1-1/+1
This should return negative -EAGAIN instead of positive EAGAIN. Fixes: e5e1e6d28ebc ("drm/i915/pxp: Add MTL helpers to submit Heci-Cmd-Packet to GSC") Signed-off-by: Dan Carpenter <[email protected]> Reviewed-by: Alan Previn <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Signed-off-by: Andi Shyti <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/ZH7sr+Vs4zOQoouU@moroto
2023-06-07i915/perf: Do not add ggtt offset to hw_tailUmesh Nerlige Ramappa1-2/+1
ggtt offset for hw_tail is not required for the calculations, so drop it. Signed-off-by: Umesh Nerlige Ramappa <[email protected]> Reviewed-by: Ashutosh Dixit <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-06-07i915/perf: Drop the aging_tail logic in perf OAUmesh Nerlige Ramappa2-69/+38
On DG2, capturing OA reports while running heavy render workloads sometimes results in invalid OA reports where 64-byte chunks inside reports have stale values. Under memory pressure, high OA sampling rates (13.3 us) and heavy render workload, occasionally, the OA HW TAIL pointer does not progress as fast as the sampling rate. When these glitches occur, the TAIL pointer takes approx. 200us to progress. While this is expected behavior from the HW perspective, invalid reports are not expected. In oa_buffer_check_unlocked(), when we execute the if condition, we are updating the oa_buffer.tail to the aging tail and then setting pollin based on this tail value, however, we do not have a chance to rewind and validate the reports prior to setting pollin. The validation happens in a subsequent call to oa_buffer_check_unlocked(). If a read occurs before this validation, then we end up reading reports up until this oa_buffer.tail value which includes invalid reports. Though found on DG2, this affects all platforms. The aging tail logic is no longer necessary since we are explicitly checking for landed reports. Start by dropping the aging tail logic. v2: - Drop extra blank line - Add reason to drop aging logic (Ashutosh) - Add bug links (Ashutosh) - rename aged_tail to read_tail - Squash patches 3 and 1 v3: (Ashutosh) - Remove extra spaces - Remove gtt_offset from the pollin calculation - s/Bug:/Link/ in commit message (checkpatch) Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/7484 Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/7757 Signed-off-by: Umesh Nerlige Ramappa <[email protected]> Reviewed-by: Ashutosh Dixit <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-06-07drm/i915: Allow user to set cache at BO creationFei Yang3-0/+87
To comply with the design that buffer objects shall have immutable cache setting through out their life cycle, {set, get}_caching ioctl's are no longer supported from MTL onward. With that change caching policy can only be set at object creation time. The current code applies a default (platform dependent) cache setting for all objects. However this is not optimal for performance tuning. The patch extends the existing gem_create uAPI to let user set PAT index for the object at creation time. The new extension is platform independent, so UMD's can switch to using this extension for older platforms as well, while {set, get}_caching are still supported on these legacy paltforms for compatibility reason. However, since PAT index was not clearly defined for platforms prior to GEN12 (TGL), so we are limiting this externsion to GEN12+ platforms only. See ext_set_pat() in for the implementation details. The documentation related to the PAT/MOCS tables is currently available for Tiger Lake here: https://www.intel.com/content/www/us/en/docs/graphics-for-linux/developer-reference/1-0/tiger-lake.html The documentation for other platforms is currently being updated. BSpec: 45101 Mesa support has been submitted in this merge request: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22878 The media driver supprt has bin submitted in this merge request: https://github.com/intel/media-driver/pull/1680 The IGT test related to this change is igt@gem_create@create-ext-set-pat Signed-off-by: Fei Yang <[email protected]> Cc: Chris Wilson <[email protected]> Cc: Matt Roper <[email protected]> Cc: Andi Shyti <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Acked-by: Jordan Justen <[email protected]> Tested-by: Jordan Justen <[email protected]> Acked-by: Carl Zhang <[email protected]> Tested-by: Lihao Gu <[email protected]> Signed-off-by: Andi Shyti <[email protected]> Acked-by: Tvrtko Ursulin <[email protected]> Acked-by: Slawomir Milczarek <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-06-07drm/panel: simple: add support for Rocktech RK043FN48H panelDario Binacchi1-0/+29
Add support for Rocktech RK043FN48H 4.3" (480x272) LCD-TFT panel. Signed-off-by: Dario Binacchi <[email protected]> Reported-by: kernel test robot <[email protected]> Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/ Reviewed-by: Jagan Teki <[email protected]> Signed-off-by: Neil Armstrong <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-06-07dt-bindings: display: simple: add Rocktech RK043FN48HDario Binacchi1-0/+2
Add compatible to panel-simple for Rocktech Displays Limited RK043FN48H 4.3" 480x272 LCD-TFT panel. Signed-off-by: Dario Binacchi <[email protected]> Acked-by: Conor Dooley <[email protected]> Reviewed-by: Jagan Teki <[email protected]> Reviewed-by: Raphael Gallais-Pou <[email protected]> Signed-off-by: Neil Armstrong <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-06-06drm/i915/guc: Remove some obsolete definitionsJohn Harrison1-33/+0
There were a bunch of defines and structures left over from an API update a very long time ago. Remove them. Signed-off-by: John Harrison <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-06-06drm/i915: rename I915_PMU_MAX_GTS to I915_PMU_MAX_GTMatt Atwood2-5/+5
_GTS as an abbreviation here leads to some confusion, match other definitions and drop the s. Cc: Matt Roper <[email protected]> Cc: Ashutosh Dixit <[email protected]> Cc: Andi Shyti <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Umesh Nerlige Ramappa <[email protected]> Signed-off-by: Matt Atwood <[email protected]> Reviewed-by: Matt Roper <[email protected]> Signed-off-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-06-06drm/i915: Reduce I915_MAX_GT to 2Matt Atwood1-1/+1
According to Ashutosh there is no current or planned product in i915 for I915_MAX_GT to be 4 anymore. Cc: Matt Roper <[email protected]> Cc: Ashutosh Dixit <[email protected]> Cc: Andi Shyti <[email protected]> Cc: Tvrtko Ursulin <[email protected]> Cc: Umesh Nerlige Ramappa <[email protected]> Signed-off-by: Matt Atwood <[email protected]> Reviewed-by: Matt Roper <[email protected]> Reviewed-by: Ashutosh Dixit <[email protected]> Signed-off-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-06-06drm/i915/selftests: Add some missing error propagationTvrtko Ursulin1-4/+10
Add some missing error propagation in live_parallel_switch. To avoid needlessly burdening the various backport processes, note I am not marking it as a fix against any patches and not copying stable since it is debug/selftests only code. Signed-off-by: Tvrtko Ursulin <[email protected]> Reported-by: Dan Carpenter <[email protected]> Cc: Andi Shyti <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Fixes: 50d16d44cce4 ("drm/i915/selftests: Exercise context switching in parallel") Fixes: 6407cf533217 ("drm/i915/selftests: Stop using kthread_stop()") Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-06-06drm/i915: Use the fdinfo helperTvrtko Ursulin5-83/+18
Use the common fdinfo helper for printing the basics. Remove now unused client id allocation code. Signed-off-by: Tvrtko Ursulin <[email protected]> Cc: Rob Clark <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-06-05drm/i915/huc: define HuC FW version for MTLDaniele Ceraolo Spurio1-0/+1
Follow the same logic as DG2, so just a meu binary with no version number. Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Cc: Alan Previn <[email protected]> Reviewed-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-06-05drm/i915/mtl/huc: Use the media gt for the HuC getparamDaniele Ceraolo Spurio1-1/+5
On MTL, for obvious reasons, HuC is only available on the media tile. We already disable SW support for HuC on the root gt due to the absence of VCS engines, but we also need to update the getparam to point to the HuC struct in the media GT. Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Cc: John Harrison <[email protected]> Reviewed-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-06-05drm/i915/mtl/huc: auth HuC via GSCDaniele Ceraolo Spurio9-22/+183
The full authentication via the GSC requires an heci packet submission to the GSC FW via the GSC CS. The GSC has new PXP command for this (literally called NEW_HUC_AUTH). The intel_huc_auth function is also updated to handle both authentication types. v2: check that the GuC auth for clear media has completed before proceding with the full auth v3: use a define for the object size (Alan) Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Cc: Alan Previn <[email protected]> Reviewed-by: Alan Previn <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-06-05drm/i915/huc: differentiate the 2 steps of the MTL HuC auth flowDaniele Ceraolo Spurio6-35/+104
Before we add the second step of the MTL HuC auth (via GSC), we need to have the ability to differentiate between them. To do so, the huc authentication check is duplicated for GuC and GSC auth, with GSC-enabled binaries being considered fully authenticated only after the GSC auth step. To report the difference between the 2 auth steps, a new case is added to the HuC getparam. This way, the clear media driver can start submitting before full auth, as partial auth is enough for those workloads. v2: fix authentication status check for DG2 v3: add a better comment at the top of the HuC file to explain the different approaches to load and auth (John) v4: update call to intel_huc_is_authenticated in the pxp code to check for GSC authentication v5: drop references to meu and esclamation mark in huc_auth print (John) Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Cc: Alan Previn <[email protected]> Cc: John Harrison <[email protected]> Reviewed-by: Alan Previn <[email protected]> #v2 Reviewed-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-06-05drm/i915/huc: Load GSC-enabled HuC via DMA xfer if the fuse says soDaniele Ceraolo Spurio5-22/+47
In the previous patch we extracted the offset of the legacy-style HuC binary located within the GSC-enabled blob, so now we can use that to load the HuC via DMA if the fuse is set that way. Note that we now need to differentiate between "GSC-enabled binary" and "loaded by GSC", so the former case has been renamed to "has GSC headers" for clarity, while the latter is now based on the fuse instead of the binary format. This way, all the legacy load paths are automatically taken (including the auth by GuC) without having to implement further code changes. v2: s/is_meu_binary/has_gsc_headers/, clearer logs (John) v3: split check for GSC access, better comments (John) Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Cc: Alan Previn <[email protected]> Cc: John Harrison <[email protected]> Reviewed-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-06-05drm/i915/huc: Parse the GSC-enabled HuC binaryDaniele Ceraolo Spurio8-53/+274
The new binaries that support the 2-step authentication contain the legacy-style binary, which we can use for loading the HuC via DMA. To find out where this is located in the image, we need to parse the manifest of the GSC-enabled HuC binary. The manifest consist of a partition header followed by entries, one of which contains the offset we're looking for. Note that the DG2 GSC binary contains entries with the same names, but it doesn't contain a full legacy binary, so we need to skip assigning the dma offset in that case (which we can do by checking the ccs). Also, since we're now parsing the entries, we can extract the HuC version that way instead of using hardcoded offsets. Note that the GSC binary uses the same structures in its binary header, so they've been added in their own header file. v2: fix structure names to match meu defines (s/CPT/CPD/), update commit message, check ccs validity, drop old version location defines. v3: drop references to the MEU tool to reduce confusion, fix log (John) v4: fix log for real (John) Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Cc: Alan Previn <[email protected]> Cc: John Harrison <[email protected]> Reviewed-by: Alan Previn <[email protected]> #v2 Reviewed-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-06-05drm/i915/uc: perma-pin firmwaresDaniele Ceraolo Spurio8-25/+71
Now that each FW has its own reserved area, we can keep them always pinned and skip the pin/unpin dance on reset. This will make things easier for the 2-step HuC authentication, which requires the FW to be pinned in GGTT after the xfer is completed. Since the vma is now valid for a long time and not just for the quick pin-load-unpin dance, the name "dummy" is no longer appropriare and has been replaced with vma_res. All the functions have also been updated to operate on vma_res for consistency. Given that we pin the vma behind the allocator's back (which is ok because we do the pinning in an area that was previously reserved for thus purpose), we do need to explicitly re-pin on resume because the automated helper won't cover us. v2: better comments and commit message, s/dummy/vma_res/ Signed-off-by: Daniele Ceraolo Spurio <[email protected]> Cc: Alan Previn <[email protected]> Cc: John Harrison <[email protected]> Reviewed-by: John Harrison <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-06-05drm/bridge: imx: turn imx8{qm,qxp}-ldb into single-object modulesMasahiro Yamada3-4/+0
With the previous fix, these modules are built from a single C file. Rename the source files so they match the module names. Signed-off-by: Masahiro Yamada <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> Reviewed-by: Liu Ying <[email protected]> Signed-off-by: Robert Foss <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-06-05drm/bridge: imx: fix mixed module-builtin objectMasahiro Yamada3-2/+25
With CONFIG_DRM_IMX8QM_LDB=m and CONFIG_DRM_IMX8QXP_LDB=y (or vice versa), imx-ldb-helper.o is linked to a module and also to vmlinux even though the expected CFLAGS are different between builtins and modules. This is the same situation as fixed by commit 637a642f5ca5 ("zstd: Fixing mixed module-builtin objects"). Split imx-ldb-helper.c into a separate module. Signed-off-by: Masahiro Yamada <[email protected]> Reviewed-by: Laurent Pinchart <[email protected]> Reviewed-by: Liu Ying <[email protected]> Signed-off-by: Robert Foss <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-06-05accel/habanalabs: call to HW/FW err returns 0 when no events existMoti Haimovski1-10/+10
This commit modifies the call to retrieve HW or FW error events to return success when no events are pending, as done in the calls to other events. Signed-off-by: Moti Haimovski <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-05accel/habanalabs: unsecure TPC bias registersOfir Bitton1-0/+1
User needs to be able to perform downcast / upcast of fp8_143 dtype. Hence bias register needs to be accessed by the user. Signed-off-by: Ofir Bitton <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-05accel/habanalabs: do soft-reset using cpucp packetDafna Hirschfeld4-10/+35
This is done depending on the FW version. The cpucp method is preferable and saves scratchpads resource. Signed-off-by: Dafna Hirschfeld <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-05accel/habanalabs: check fw version using sw versionDafna Hirschfeld2-3/+9
The fw inner version is less trustable, instead use the fw general sw release version. Signed-off-by: Dafna Hirschfeld <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-05accel/habanalabs: extract and save the FW's SW major/minor/sub-minorDafna Hirschfeld2-6/+78
It is not always possible to know the FW's SW version from the inner FW version. Therefore we should extract the general SW version in addition to the FW version and use it in functions like 'hl_is_fw_ver_below_1_9' etc. Signed-off-by: Dafna Hirschfeld <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-05accel/habanalabs: rename fw_{major/minor}_version to fw_inner_{major/minor}_verDafna Hirschfeld2-9/+9
We later want to add fields for Firmware SW version. The current extracted FW version is the inner FW versioning so the new name is better and also better differentiate from the FW's SW version. Signed-off-by: Dafna Hirschfeld <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-05accel/habanalabs: add helper to extract the FW major/minorDafna Hirschfeld1-24/+45
the helper is extract_u32_until_given_char and can later be used to also get the major/minor of the sw version. Signed-off-by: Dafna Hirschfeld <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-05accel/habanalabs: fix bug in free scratchpad memoryMoti Haimovski1-2/+2
This commit fixes a bug in Gaudi2 when freeing the scratchpad memory in case software init fails. Signed-off-by: Moti Haimovski <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-05accel/habanalabs: remove commented code that won't be usedKoby Elbaz1-9/+0
Once it was decided that these security settings are to be done by FW rather than by the driver, there's no reason to keep them in the code. Signed-off-by: Koby Elbaz <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-05accel/habanalabs: allow user to modify EDMA RL registerRakesh Ughreja1-0/+1
EDMA transpose workload requires to signal for every activation. User FW sends all the dummy signals to RD_LBW_RATE_LIM_CFG, to save lbw bandwidth. We need the user to be able to access that register to configure it. Signed-off-by: Rakesh Ughreja <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-05accel/habanalabs: ignore false positive razwiTal Cohen1-16/+27
In Gaudi2 asic, PSOC RAZWI may cause in HBW or LBW. The address that caused the error is read from HW register and printed by the Driver. There are cases where the Driver receives an indication on PSOC RAZWI error but the address value is zero. In that case, the indication is a false positive. The Driver should not "count" a PSOC RAZWI event error when the caused the address is zeroed. Signed-off-by: Tal Cohen <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-05accel/habanalabs: remove variable gaudi_irq_nameTom Rix1-7/+0
gcc with W=1 reports drivers/accel/habanalabs/gaudi/gaudi.c:117:19: error: ‘gaudi_irq_name’ defined but not used [-Werror=unused-const-variable=] 117 | static const char gaudi_irq_name[GAUDI_MSI_ENTRIES][GAUDI_MAX_STRING_LEN] = { | ^~~~~~~~~~~~~~ This variable is not used so remove it. Signed-off-by: Tom Rix <[email protected]> Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Oded Gabbay <[email protected]>
2023-06-05Merge drm/drm-next into drm-intel-gt-nextTvrtko Ursulin12517-377582/+632627
For conflict avoidance we need the following commit: c9a9f18d3ad8 drm/i915/huc: use const struct bus_type pointers Signed-off-by: Tvrtko Ursulin <[email protected]>
2023-06-05drm/i915/mtl: Reset only one lane in case of MFDMika Kahola1-16/+23
In case when only two or less transmit lanes are owned such as MFD (DP-alt with x2 lanes) we need to reset only one data lane (lane0). With only x2 lanes we don't need to poll for the phy current status on both data lanes since only the owned data lane will respond. v2: Find better naming for lanes and revise the commit message (Luca) Reviewed-by: Arun R Murthy <[email protected]> (v1) Signed-off-by: Mika Kahola <[email protected]> Reviewed-by: Luca Coelho <[email protected]> (v2) Signed-off-by: Jouni Högander <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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