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2021-03-23drm/amdkfd: Bump KFD API versionFelix Kuehling1-1/+2
Indicate the availability reliable SRAM EDC state in the new bit in the device properties. Proposed userspace changes: https://github.com/RadeonOpenCompute/ROCT-Thunk-Interface/commit/7cdd63475c36bb9f49bb960f90f9a8cdb7e80a21 Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Kent Russell <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amdgpu: Mark Aldebaran HW support as experimentalFelix Kuehling1-3/+3
The HW is not in production yet. Driver support is still in development. Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Kent Russell <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amdgpu: revert "reserve backup pages for bad page retirment"Christian König4-118/+15
As noted during the review this approach doesn't make sense at all. We should not apply any limitation on the VRAM applications can use inside the kernel. If an application or end user wants to reserve a certain amount of VRAM for bad pages handling we should do this in the upper layer. This reverts commit f89b881c81d9a6481fc17b46b351ca38f5dd6f3a. Signed-off-by: Christian König <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amdgpu: revert "use the new cursor in the VM code"Christian König1-18/+37
We are seeing VM page faults with this. Revert the change until the bugs are fixed. This reverts commit 94ae8dc55790de8979b58428672c8e0b97ee0dae. Signed-off-by: Christian König <[email protected]> Reviewed-by: Guchun Chen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amdgpu/display: properly guard dc_dsc_stream_bandwidth_in_kbpsAlex Deucher2-2/+4
Move the function protoype to the right header and guard the call with CONFIG_DRM_AMD_DC_DCN as DSC is only available with DCN. Fixes: 8c2f14c36f47ce ("drm/amd/display: Add changes for dsc bpp in 16ths and unify bw calculations") Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: Dillon Varone <[email protected]> Cc: Stephen Rothwell <[email protected]>
2021-03-23drm/amd/display: Remove unnecessary conversion to boolJiapeng Chong1-1/+1
Fix the following coccicheck warnings: ./drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb_cm.c:220:65-70: WARNING: conversion to bool not needed here. Reported-by: Abaci Robot <[email protected]> Signed-off-by: Jiapeng Chong <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: Remove unnecessary conversion to boolJiapeng Chong1-2/+2
Fix the following coccicheck warnings: ./drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c:721:65-70: WARNING: conversion to bool not needed here. ./drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c:1139:67-72: WARNING: conversion to bool not needed here. Reported-by: Abaci Robot <[email protected]> Signed-off-by: Jiapeng Chong <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amdgpu: Fix memory leakxinhui pan1-1/+3
drm_gem_object_put() should be paired with drm_gem_object_lookup(). All gem objs are saved in fb->base.obj[]. Need put the old first before assign a new obj. Trigger VRAM leak by running command below $ service gdm restart Signed-off-by: xinhui pan <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23radeon: use kvcalloc for relocs and chunksChen Li1-3/+3
kvmalloc_array + __GFP_ZERO is the same with kvcalloc. As for p->chunks, it will be used in: ``` if (ib_chunk->kdata) memcpy(parser->ib.ptr, ib_chunk->kdata, ib_chunk->length_dw * 4); ``` If chunks doesn't zero out with __GFP_ZERO, it may point to somewhere else, e.g., ``` Unable to handle kernel paging request at virtual address 0000000000010000 ... pc is at memcpy+0x84/0x250 ra is at radeon_cs_ioctl+0x368/0xb90 [radeon] ``` after allocating chunks with __GFP_KERNEL/kvcalloc, this bug is fixed. Fixes: 3fcb4f01deed ("drm/radeon: Use kvmalloc for CS chunks") Reviewed-by: Christian König <[email protected]> Signed-off-by: Chen Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amdgpu: drop extraneous hw_status updateAlex Deucher1-1/+0
We set the same variable a few lines above. Drop the duplicate setting. Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: Support vertical interrupt 0 for all dcn ASICWayne Lin4-0/+137
[Why] When CONFIG_DRM_AMD_SECURE_DISPLAY is enabled, it will try to register vertical interrupt 0 for specific task. Currently, only dcn10 have defined relevant info for vertical interrupt 0. If we enable CONFIG_DRM_AMD_SECURE_DISPLAY for other dcn ASIC, will get DC_IRQ_SOURCE_INVALID while calling dc_interrupt_to_irq_source() and cause pointer errors. [How] Add support of vertical interrupt 0 for all dcn ASIC. v2: squash in build fix (Alex) Signed-off-by: Wayne Lin <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: Fix vertical interrupt 0 registering issueWayne Lin1-6/+19
[Why] Find out that when we are registering vertical interrupt0, we get DC_IRQ_SOURCE_INVALID when call dc_interrupt_to_irq_source for DCN_1_0__SRCID__OTG6_VERTICAL_INTERRUPT0_CONTROL. After analyzing, it's due to the defined value for DCN_1_0__SRCID__OTG6_VERTICAL_INTERRUPT0_CONTROL is not (DCN_1_0__SRCID__OTG5_VERTICAL_INTERRUPT0_CONTROL + 1). It's not incremental sequence. [How] Use an array to record all vertical interrupt0 SRCID. While registering interrupt, use an incremental index to visit the array to get the right SRCID to register. Also add error handling to avoid potential pointer problem. Signed-off-by: Wayne Lin <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/pm: correct the gpu metrics versionEvan Quan1-1/+1
For V1_0 and V1_1, they come with different size. Misuse may cause out of memory access. Signed-off-by: Evan Quan <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amdgpu/display: re-enable freesync video patchesNikola Cornij4-35/+349
Since this is a "revert of a revert", the end effect is that freesync video is back to its original state, the way it was before the first revert. Signed-off-by: Nikola Cornij <[email protected]> Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/pm: Use BACO reset arg 0 on XGMI configurationshaoyunl1-1/+1
With arg 1 BACO reset, it will try to reload the SMU FW after reset. This might failed if driver already in a pending reset status during probe period. Arg 0 reset will bring asic back to a clean state and driver will re-init everythign including SMU FW Signed-off-by: shaoyunl <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amdgpu: Keep pending_reset valid during smu reset the ASICshaoyunl1-1/+1
SMU internal might need to check this pending_reset setting to decide the reset method Signed-off-by: shaoyunl <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amdgpu: Enable light SBR in XGMI+passthrough configurationshaoyunl1-4/+5
This is to fix the case where it only enable the light SMU on normal device init. This feature actually need to be enabled after ASIC been reset as well. Signed-off-by: shaoyunl <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: Fix potential memory leakQingqing Zhuo1-0/+9
[Why] vblank_workqueue is never released. [How] Free it upon dm finish. Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Qingqing Zhuo <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: add a func to disable accelerated modeYao Wang15-4/+29
[Why] When driver disabled, we driver force the YCbCr420 to RGB, which means some register will be changed, such as RDPCS_PHY_DP_MPLLB_TX_CLK_DIV changed from 1 to 0 When driver re-enabled, OS will Set Mode YCbCr420 again, which means the register RDPCS_PHY_DP_MPLLB_TX_CLK_DIV should to be 1 again, but dmub fw can’t update the register to 1 due to the mpll is not off [How] Adds an interface to disable accelerated mode bit, which allows DM to decide to call during driver disable/unload scenarios. Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Yao Wang1 <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: fix dcn3+ bw validation soc param update sequenceDmytro Laktyushkin5-5/+17
SOC needs to be updated to the WM set A values before validation happens. Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Eric Bernstein <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: fix dml prefetch validationDmytro Laktyushkin2-0/+2
Incorrect variable used, missing initialization during validation. Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Eric Bernstein <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: 3.2.127Aric Cyr1-1/+1
This DC patchset brings improvements in multiple areas. In summary, we highlight: * Add debug out when viewport too small * use max lb for latency hiding * System black screen hangs on driver load * Fix UBSAN warning for not a valid value for type '_Bool' * Fix for outbox1 ring buffer typecasting issue * Bypass sink detect when there are no eDPs connected * Increase precision for bpp in DSC calculations * Add changes for dsc bpp in 16ths and unify bw calculations * Correct algorithm for reversed gamma * Remove MPC gamut remap logic for DCN30 * Fix typo for helpers function name * Fix secure display lock problems * Fix no previous prototype warning * Separate caps for maximum RGB and YUV plane counts * Add debugfs to control DMUB trace buffer events * [FW Promotion] Release 0.0.56 * DCHUB underflow counter increasing in some scenarios * fix dml prefetch validation * fix dcn3+ bw validation soc param update sequence * add a func to disable accelerated mode * Fix potential memory leak Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: DCHUB underflow counter increasing in some scenariosAric Cyr1-1/+3
[Why] When unplugging a display, the underflow counter can be seen to increase because PSTATE switch is allowed even when some planes are not blanked. [How] Check that all planes are not active instead of all streams before allowing PSTATE change. Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: [FW Promotion] Release 0.0.56Anthony Koo1-142/+526
More updates to the comments to better describe the function of different cmds and parameters in the dmub interface. Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Anthony Koo <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: Add debugfs to control DMUB trace buffer eventsLeo (Hanghong) Ma2-0/+38
[Why] We want to have a debugfs interface to enable or disable DMCUB trace buffer events. [How] Add debugfs interface to enable or disable trace buffer events. Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Leo (Hanghong) Ma <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: Separate caps for maximum RGB and YUV plane countsAtufa Khan8-0/+16
Not all ASICs have same plane capabilities so need to split them out for proper support handling. Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Atufa Khan <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: Fix no previous prototype warningWayne Lin1-1/+1
[Why] Received compiling warning: All warnings (new ones prefixed by >>): >> drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:5574:5: warning: no previous prototype for 'amdgpu_dm_crtc_late_register' [-Wmissing-prototypes] 5574 | int amdgpu_dm_crtc_late_register(struct drm_crtc *crtc) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c: In function 'dm_update_mst_vcpi_slots_for_dsc': drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:6405:46: warning: variable 'old_con_state' set but not used [-Wunused-but-set-variable] 6405 | struct drm_connector_state *new_con_state, *old_con_state; | ^~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c: In function 'amdgpu_dm_commit_cursors': drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:8006:44: warning: variable 'new_plane_state' set but not used [-Wunused-but-set-variable] 8006 | struct drm_plane_state *old_plane_state, *new_plane_state; | ^~~~~~~~~~~~~~~ vim +/amdgpu_dm_crtc_late_register +5574 drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c 5572 5573 #ifdef CONFIG_DRM_AMD_SECURE_DISPLAY > 5574 int amdgpu_dm_crtc_late_register(struct drm_crtc *crtc) 5575 { 5576 crtc_debugfs_init(crtc); 5577 5578 return 0; 5579 } 5580 #endif 5581 [How] Fix it with declaration as "static" Tested-by: Daniel Wheeler <[email protected]> Reported-by: kernel test robot <[email protected]> Signed-off-by: Wayne Lin <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: Fix secure display lock problemsWayne Lin2-9/+7
[Why] Find out few locks problems while doing secure display. They are following few parts: 1. crc_rd_work_lock in amdgpu_dm_crtc_handle_crc_window_irq() should also use spin_lock_irqsave instead of spin_lock_irq. 2. In crc_win_update_set(), crc_rd_work_lock should be grabbed after obtaining lock event_lock. Otherwise, will cause deadlock by conflicting the lock order in amdgpu_dm_crtc_handle_crc_window_irq() 3. flush_work() in crc_win_update_set() is no need and will cause deadlock since amdgpu_dm_crtc_notify_ta_to_read() also tries to grab lock crc_rd_work_lock. [How] Fix above problems. Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Wayne Lin <[email protected]> Reviewed-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: Fix typo for helpers function nameLeo (Hanghong) Ma3-3/+3
[why] Word "helper" was misspelled as "helpes" in dm_helpes_dmub_outbox0_interrupt_control function. [how] Fix the spelling. Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Leo (Hanghong) Ma <[email protected]> Reviewed-by: Yongqiang Sun <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: Remove MPC gamut remap logic for DCN30Dillon Varone1-32/+2
[Why?] Should only reroute gamut remap to mpc unless 3D LUT is not used and all planes are using the same src->dest. [How?] Remove DCN30 specific logic for rerouting gamut remap to mpc. Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Aric Cyr <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: Correct algorithm for reversed gammaCalvin Hou1-8/+18
[Why] DCN30 needs to correctly program reversed gamma curve, which DCN20 already has. Also needs to fix a bug that 252-255 values are clipped. [How] Apply two fixes into DCN30. Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Calvin Hou <[email protected]> Reviewed-by: Jun Lei <[email protected]> Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Solomon Chiu <[email protected]> Acked-by: Vladimir Stempen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: Add changes for dsc bpp in 16ths and unify bw calculationsDillon Varone3-80/+43
[Why?] Some code still expected bpp to be used in whole bits, not 16ths. dsc.c uses redundant function now found in dc to calculate stream bandwidth from timing. [How?] Fix code to work with 16ths instead of whole bits for dsc bpp. Refactor get_dsc_bandwidth to accept inputs in 16ths of a bit. Use dc function to calculate bandwidth from timing, and make dsc bw calculation a part of dsc.c. Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: Increase precision for bpp in DSC calculationsJun Lei1-0/+1
[Why?] Many DSC variables and related functions use whole bits for bpp. [How?] Change variables and related functions to use 16ths of a bit for bpp. Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Dillon Varone <[email protected]> Signed-off-by: Jun Lei <[email protected]> Reviewed-by: Wenjing Liu <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: Bypass sink detect when there are no eDPs connectedJake Wang1-7/+6
[How & Why] Check DC config to determine if there are any eDPs connected. If there are no eDPs connected, bypass sink detect when querying eDP presence. Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Jake Wang <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: Fix for outbox1 ring buffer typecasting issueMeenakshikumar Somasundaram1-1/+1
[WHY] Compiler warning "pointer to integer of different size" reported on outbox1 ring buffer address typecasting. Reported-by: kernel test robot <[email protected]> [HOW] Fixed the issue by typecasting with character pointer. Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Meenakshikumar Somasundaram <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: Fix UBSAN warning for not a valid value for type '_Bool'Anson Jacob1-5/+1
[Why] dc_cursor_position do not initialise position.translate_by_source when crtc or plane->state->fb is NULL. UBSAN caught this error in dce110_set_cursor_position, as the value was garbage. [How] Initialise dc_cursor_position structure elements to 0 in handle_cursor_update before calling get_cursor_position. Tested-by: Daniel Wheeler <[email protected]> Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1471 Reported-by: Lyude Paul <[email protected]> Signed-off-by: Anson Jacob <[email protected]> Reviewed-by: Aurabindo Jayamohanan Pillai <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: System black screen hangs on driver loadAric Cyr2-48/+2
This reverts commit dbc43d5fdf48e4e558338fcaef8c9d19521d1c2e as it causes crash on driver load in some scenarios. Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Reviewed-by: Martin Leung <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: use max lb for latency hidingDmytro Laktyushkin6-9/+20
Enable max memory lb config to improve stutter efficiency and latency hiding. Also increase max number of lb lines to be used by dml since experiments have shown that there isnt a hard max beyond what fits in lb. Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Dmytro Laktyushkin <[email protected]> Reviewed-by: Eric Bernstein <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: Add debug out when viewport too smallNikola Cornij1-6/+10
[why] It helps debugging display setup issues Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Nikola Cornij <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: 3.2.126.1Aric Cyr1-1/+1
Bumping DC version for DMU FW fix Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Acked-by: Solomon Chiu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/pm: fix workload mismatch on vega10Kenneth Feng1-1/+1
Workload number mapped to the correct one. This issue is only on vega10. Signed-off-by: Kenneth Feng <[email protected]> Reviewed-by: Kevin Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amdgpu: Use dev_info if VFCT table not validFeifei Xu1-6/+6
Some ASICs do not have GOP driver to copy vbios image into VFCT table. And it will go to next check. Signed-off-by: Feifei Xu <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amdgpu: drop legacy IO bar supportAlex Deucher5-111/+2
It was leftover from radeon where it was required for some specific old hardware. It hasn't been required for ages and the driver already falls back to MMIO when legacy IO is not available. Legacy IO also seems to be problematic on on some thunderbolt devices. Drop it. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: Nicholas Johnson <[email protected]>
2021-03-23drm/amd/display: Remove unnecessary conversion to boolJiapeng Chong1-1/+1
Fix the following coccicheck warnings: ./drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c:358:69-74: WARNING: conversion to bool not needed here. Reported-by: Abaci Robot <[email protected]> Signed-off-by: Jiapeng Chong <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/pm: Mundane typo fixes in the file amdgpu_pm.cBhaskar Chowdhury1-2/+2
s/"an minimum"/"a minimum"/ s/"an maxmum"/"a maximum"/ Reviewed-by: Huang Rui <[email protected]> Acked-by: Randy Dunlap <[email protected]> Signed-off-by: Bhaskar Chowdhury <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: remove redundant initialization of variable resultColin Ian King1-1/+1
The variable result is being initialized with a value that is never read and it is being updated later with a new value. The initialization is redundant and can be removed. Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/pm: Fix spelling mistake "disble" -> "disable"Colin Ian King1-1/+1
There is a spelling mistake in an assert message. Fix it. Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/pm: add a new sysfs entry for default power limitEric Huang11-15/+75
Driver doesn't keep the default bootup power limit and expose it to user. As requested we add it in driver. Signed-off-by: Eric Huang <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amd/display: Free local data after useVictor Lu1-0/+1
Fixes the following memory leak in dc_link_construct(): unreferenced object 0xffffa03e81471400 (size 1024): comm "amd_module_load", pid 2486, jiffies 4294946026 (age 10.544s) hex dump (first 32 bytes): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ backtrace: [<000000000bdf5c4a>] kmem_cache_alloc_trace+0x30a/0x4a0 [<00000000e7c59f0e>] link_create+0xce/0xac0 [amdgpu] [<000000002fb6c072>] dc_create+0x370/0x720 [amdgpu] [<000000000094d1f3>] amdgpu_dm_init+0x18e/0x17a0 [amdgpu] [<00000000bec048fd>] dm_hw_init+0x12/0x20 [amdgpu] [<00000000a2bb7cf6>] amdgpu_device_init+0x1463/0x1e60 [amdgpu] [<0000000032d3bb13>] amdgpu_driver_load_kms+0x5b/0x330 [amdgpu] [<00000000a27834f9>] amdgpu_pci_probe+0x192/0x280 [amdgpu] [<00000000fec7d291>] local_pci_probe+0x47/0xa0 [<0000000055dbbfa7>] pci_device_probe+0xe3/0x180 [<00000000815da970>] really_probe+0x1c4/0x4e0 [<00000000b4b6974b>] driver_probe_device+0x62/0x150 [<000000000f9ecc61>] device_driver_attach+0x58/0x60 [<000000000f65c843>] __driver_attach+0xd6/0x150 [<000000002f5e3683>] bus_for_each_dev+0x6a/0xc0 [<00000000a1cfc897>] driver_attach+0x1e/0x20 Fixes: 3a00c04212d1cf ("drm/amd/display/dc/core/dc_link: Move some local data from the stack to the heap") Signed-off-by: Victor Lu <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-03-23drm/amdgpu: nuke the ih reentrant lockChristian König3-7/+0
Interrupts on are non-reentrant on linux. This is just an ancient leftover from radeon where irq processing was kicked of from different places. Signed-off-by: Christian König <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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