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2014-05-23Merge tag 'qcom-soc-for-3.16' of ↵Arnd Bergmann4-92/+40
git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into next/soc Merge "Qualcomm ARM Based SoC Updates for v3.16" from Kumar Gala: * Enabling building pinctrl and AMBA bus support * Clean up debug UART selection * tag 'qcom-soc-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom: ARM: qcom: Select PINCTRL by default for ARCH_QCOM ARM: debug: qcom: make UART address selection configuration option ARM: qcom: Enable ARM_AMBA option for Qualcomm SOCs. Conflicts: arch/arm/Kconfig.debug arch/arm/mach-qcom/Kconfig Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-05-23Merge tag 'mvebu-soc-3.16-2' of git://git.infradead.org/linux-mvebu into ↵Arnd Bergmann2-33/+106
next/soc Merge "mvebu SoC changes for v3.16 (incremental #2)" from Jason Cooper <jason@lakedaemon.net>: - mvebu - fix coherency on big-endian in -next - hardware IO coherency - L2/PCIe deadlock workaround - small coherency cleanups * tag 'mvebu-soc-3.16-2' of git://git.infradead.org/linux-mvebu: ARM: mvebu: returns ll_get_cpuid() to ll_get_coherency_cpumask() ARM: mvebu: improve comments in coherency_ll.S ARM: mvebu: fix indentation of assembly instructions in coherency_ll.S ARM: mvebu: fix big endian booting after coherency code rework ARM: mvebu: coherency: fix registration of PCI bus notifier when !PCI ARM: mvebu: implement L2/PCIe deadlock workaround ARM: mvebu: use hardware I/O coherency also for PCI devices Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-05-23Merge branch 'axxia/soc' into next/socArnd Bergmann17-0/+1012
Patches from Anders Berg applied individually: Here is version 4 of platform support for AXM5516 SoC. The clk driver is now applied to clk-next. The rest should be ready for arm-soc. Haven't got any response from the power/reset maintainers... I hope this driver can be taken via arm-soc as well. The AXM55xx family consists of devices that may contain up to 16 ARM Cortex-A15 cores (in a 4x4 cluster configuration). The cores within each cluster share an L2 cache, and the clusters are connected to each other via a CCN-504 cache coherent interconnect. This machine requires CONFIG_ARM_LPAE enabled as all peripherals are located above 4GB in the memory map. * axxia/soc: ARM: dts: axxia: Add reset controller power: reset: Add Axxia system reset driver ARM: axxia: Adding defconfig for AXM55xx ARM: dts: Device tree for AXM55xx. ARM: Add platform support for LSI AXM55xx SoC Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-05-23ARM: dts: axxia: Add reset controllerAnders Berg1-0/+5
Add the reset controller to the AXM5xx device tree. Signed-off-by: Anders Berg <anders.berg@lsi.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-05-23power: reset: Add Axxia system reset driverAnders Berg4-0/+117
Add Axxia (AXM55xx) SoC system reset driver. This driver handles only system reboot (and not power-off). Signed-off-by: Anders Berg <anders.berg@lsi.com> Cc: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Cc: David Woodhouse <dwmw2@infradead.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-05-23ARM: axxia: Adding defconfig for AXM55xxAnders Berg1-0/+248
Add a defconfig file for the LSI Axxia family of devices (CONFIG_ARCH_AXXIA). Signed-off-by: Anders Berg <anders.berg@lsi.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-05-23ARM: dts: Device tree for AXM55xx.Anders Berg4-0/+455
Add device tree for the Amarillo validation board with an AXM5516 SoC. Signed-off-by: Anders Berg <anders.berg@lsi.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-05-23ARM: Add platform support for LSI AXM55xx SoCAnders Berg8-0/+187
The AXM55xx family consists of devices that may contain up to 16 ARM Cortex-A15 cores (in a 4x4 cluster configuration). The cores within each cluster share an L2 cache, and the clusters are connected to each other via a CCN-504 cache coherent interconnect. This machine requires CONFIG_ARM_LPAE enabled as all peripherals are located above 4GB in the memory map. Signed-off-by: Anders Berg <anders.berg@lsi.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-05-22ARM: qcom: Select PINCTRL by default for ARCH_QCOMAndy Gross1-0/+1
Add missing PINCTRL selection. This enables selection of pinctrollers for Qualcomm processors. Signed-off-by: Andy Gross <agross@codeaurora.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-05-22ARM: debug: qcom: make UART address selection configuration optionIvan T. Ivanov3-92/+38
Separate Qualcomm low-level debugging UART to two options. DEBUG_MSM_UART is used in earlier non-multi platform arches, like MSM7X00A, QSD8X50 and MSM7X30. DEBUG_QCOM_UARTDM is used in multi-plafrom arches and have embedded data mover. Make DEBUG_UART_PHYS and DEBUG_UART_BASE user adjustable by Kconfig menu. Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Tested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-05-22ARM: qcom: Enable ARM_AMBA option for Qualcomm SOCs.Srinivas Kandagatla1-0/+1
As some of the IPs on Qualcomm SOCs are based on ARM PrimeCell IPs. For example SDCC controller is PrimeCell MCI pl180. Adding this option will give flexibility to reuse the existing drivers as it is without major modifications. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
2014-05-22ARM: mvebu: returns ll_get_cpuid() to ll_get_coherency_cpumask()Thomas Petazzoni1-18/+25
In the refactoring of the coherency fabric assembly code, a function called ll_get_cpuid() was created to factorize common logic between functions adding CPU to the SMP coherency group, enabling and disabling the coherency. However, the name of the function is highly misleading: ll_get_cpuid() makes one think tat it returns the ID of the CPU, i.e 0 for CPU0, 1 for CPU1, etc. In fact, this is not at all what this function returns: it returns a CPU mask for the current CPU, usable for the coherency fabric configuration and control registers. Therefore this commit renames this function to ll_get_coherency_cpumask(), and adds additional comments on top of the function to explain in more details what it does, and also how the endianess issue is handled. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1400762882-10116-5-git-send-email-thomas.petazzoni@free-electrons.com Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-22ARM: mvebu: improve comments in coherency_ll.SThomas Petazzoni1-18/+32
This commit makes no functional change, it only improves a bit the various code comments in mach-mvebu/coherency_ll.S, by fixing a few typos and adding a few more details. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1400762882-10116-4-git-send-email-thomas.petazzoni@free-electrons.com Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-22ARM: mvebu: fix indentation of assembly instructions in coherency_ll.SThomas Petazzoni1-4/+4
This commit does not make any functional change, it only fixes the indentation of a few assembly instructions in arch/arm/mach-mvebu/coherency_ll.S. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1400762882-10116-3-git-send-email-thomas.petazzoni@free-electrons.com Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-22ARM: mvebu: fix big endian booting after coherency code reworkThomas Petazzoni1-1/+1
As part of the introduction of the cpuidle support for Armada XP, the coherency code was significantly reworked, especially in the coherency_ll.S file. However, when the ll_get_cpuid function was created, the big-endian specific code that switches the endianess of the register was not updated properly. This patch fixes this code, and therefore makes big endian systems bootable again. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1400762882-10116-2-git-send-email-thomas.petazzoni@free-electrons.com Fixes: 2e8a5942f875 ("ARM: mvebu: Split low level functions to manipulate HW coherency") Reported-by: Kevin Hilman <khilman@linaro.org> Cc: Kevin Hilman <khilman@linaro.org> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-22ARM: mvebu: coherency: fix registration of PCI bus notifier when !PCIThomas Petazzoni1-0/+2
Commit b0063aad5dd8 ("ARM: mvebu: use hardware I/O coherency also for PCI devices") added a reference to the pci_bus_type variable, but this variable is only available when CONFIG_PCI is enabled. Therefore, there is now a build failure in !CONFIG_PCI situations. This commit fixes that by enclosing the entire initcall into a IS_ENABLED(CONFIG_PCI) condition. Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1400598783-706-1-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-22ARM: mvebu: implement L2/PCIe deadlock workaroundThomas Petazzoni1-0/+39
The Marvell Armada 375 and Armada 38x SOCs, which use the Cortex-A9 CPU core, the PL310 cache and the Marvell PCIe hardware block are affected a L2/PCIe deadlock caused by a system erratum when hardware I/O coherency is used. This deadlock can be avoided by mapping the PCIe memory areas as strongly-ordered (note: MT_UNCACHED is strongly-ordered), and by removing the outer cache sync done in software. This is implemented in this patch by: * Registering a custom arch_ioremap_caller function that allows to make sure PCI memory regions are mapped MT_UNCACHED. * Adding at runtime the 'arm,io-coherent' property to the PL310 cache controller. This cannot be done permanently in the DT, because the hardware I/O coherency can only be enabled when CONFIG_SMP is enabled, in the current kernel situation. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1400165974-9059-4-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-21Merge tag 'tegra-for-3.16-soc' of ↵Olof Johansson1-0/+24
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/soc Merge "ARM: tegra: core code changes for 3.16" from Stephen Warren: This branch contains just a single patch this time around. Thierry enhanced Tegra's restart code to allow programming PMC scratch registers to request specific behaviour after reboot. One of the most useful options for mainline software is the ability to reboot directly into USB recovery mode, which e.g. allows the bootloader to be reflashed. * tag 'tegra-for-3.16-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: Support reboot modes Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-21Merge tag 'imx-soc-3.16' of ↵Olof Johansson70-1339/+1152
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc Merge "ARM: imx: soc changes for 3.16" from Shawn Guo: i.MX SoC changes for 3.16: - A few cleanups on mx21ads board file, which should make the later conversion to DT a little bit easier. - Add some missing clocks and drop unused clk lookups for i.MX1 and i.MX27 clock drivers - Add initial i.MX SoloX (imx6sx) SoC support - Remove mx51_babbage and mach-cpuimx51sd board files, as the equivalent DT support is ready for the boards - Clean up device tree timer initialization a little bit - Add missing i2c4 clock for i.MX6 DualLite/Solo - Add missing CKO clock i.MX25 - Add shared gate clock support for i.MX specific clk_gate2 - Add low-level debug support for SoC VF610 - Some random code cleanups and defconfig updates * tag 'imx-soc-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (33 commits) ARM: mx25: Add CLKO support ARM: i.MX1 clk: Remove clk_register_clkdev() for unused clocks ARM: i.MX1 clk: Add missing clocks ARM: imx: add basic imx6sx SoC support ARM: imx: add clock driver for imx6sx ARM: imx: add low-level debug support for imx6sx ARM: mx51: Remove mach-cpuimx51sd board file ARM: i.MX: Setup IRQ handler from IRQ driver ARM: i.MX27 pca100: remove deprecated IRQF_DISABLED ARM: imx/mxs defconfigs: add MTD_SPI_NOR (new dependency for M25P80) ARM: i.MX: Fix eMMa PrP resource size ARM: imx_v4_v5_defconfig: drop CONFIG_COMMON_CLK_DEBUG option ARM: i.MX27 clk: Remove clk_register_clkdev() for unused clocks ARM: i.MX27 clk: Add missing clocks for MSHC and RTIC ARM: imx6q: add the missing esai_ahb clock ARM: imx: add shared gate clock support ARM: imx: lock is always valid for clk_gate2 ARM: imx: define struct clk_gate2 on our own ARM: i.MX: Remove #ifdef CONFIG_OF ARM: imx_v6_v7_defconfig: enable option CONFIG_LOCALVERSION_AUTO ... Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-21Merge tag 'sunxi-core-for-3.16' of https://github.com/mripard/linux into ↵Olof Johansson1-7/+31
next/soc Merge "Allwinner SoCs core additions for 3.16" from Maxime Ripard: Refactor the Kconfig options to have one Kconfig option per machine. * tag 'sunxi-core-for-3.16' of https://github.com/mripard/linux: ARM: sunxi: select MFD_SUN6I_PRCM when sun6i arch support is enabled ARM: sunxi: Split the various SoCs support in Kconfig Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-19Merge tag 'sti-soc-for-v3.16' of ↵Olof Johansson3-0/+34
git://git.stlinux.com/devel/kernel/linux-sti into next/soc Merge "ARM: STi: SoC changes for v3.16" from Maxime Coquelin: SoC changes for STi platforms - Add support for STiH407 * tag 'sti-soc-for-v3.16' of git://git.stlinux.com/devel/kernel/linux-sti: ARM: STi: Add STiH407 SoC support Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-19Merge tag 'renesas-soc-cleanup-for-v3.16' of ↵Olof Johansson9-22/+27
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Merge "Renesas ARM Based SoC soc-cleanup Updates for v3.16" from Simon Horman: r8a7791 (R-Car H2) SoC and its Koelsch board and, r8a7740 (R-Mobile A1) SoC and its Armadillo800eva board * Set CPU clock frequency from OF nodes * tag 'renesas-soc-cleanup-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Set clock frequency in HZ from OF nodes ARM: shmobile: Use shmobile_init_late() on r8a7740 ARM: shmobile: Remove unused r8a7791_init_early() ARM: shmobile: Use r8a7791 DT CPU Frequency for Koelsch ARM: shmobile: Use r8a7791 DT CPU Frequency in common case ARM: shmobile: Remove unused r8a7740_init_delay() ARM: shmobile: Use r8a7740 DT CPU Frequency for Armadillo DT Ref ARM: shmobile: Use r8a7740 DT CPU Frequency in common case ARM: shmobile: Add r8a7740 Maximum CPU Frequency to DTS Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-19Merge tag 'renesas-clock2-for-v3.16' of ↵Olof Johansson2-2/+3
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Merge "Second Round of Renesas ARM Based SoC Clock Updates for v3.16" from Simon Horman: r8a7791 (R-Car M2) SoC * Correct SYS-DMAC clock defines r8a7740 (R-Mobile A1) SoC * Correct name of DT Ethernet clock * tag 'renesas-clock2-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7791: Correct SYS-DMAC clock defines ARM: shmobile: r8a7740: Correct name of DT Ethernet clock Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-19Merge branch 'cleanup/kconfig' into next/socOlof Johansson3-16/+0
Bring in the cleanup branch due to conflicts in new additions. Should really have been the base before the other branch, but this way works too. * cleanup/kconfig: ARM: qcom: clean-up unneeded kconfig selects ARM: bcm: clean-up unneeded kconfig selects ARM: mvebu: clean-up unneeded kconfig selects Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-19Merge tag 'mvebu-soc-3.16' of git://git.infradead.org/linux-mvebu into next/socOlof Johansson33-206/+1178
Merge "ARM: mvebu: SoC changes for v3.16" from Jason Cooper: mvebu SoC changes for v3.16 - Armada 375/38x coherency support - Armada 375/38x SMP support - mvebu PMSU and CPU reset support - Armada 370/XP cpuidle support - kirkwood remove platform init of audio device - small fixes and cleanup for new SoC (375/38x) Note: - due to complex deps, cpuidle changes Acked by appropriate maintainer for going though arm-soc tree. * tag 'mvebu-soc-3.16' of git://git.infradead.org/linux-mvebu: (46 commits) ARM: mvebu: Fix pmsu compilation when ARMv6 is selected ARM: mvebu: conditionalize Armada 375 coherency workaround ARM: mvebu: conditionalize Armada 375 SMP workaround ARM: mvebu: add Armada 375 A0 revision definition ARM: mvebu: initialize mvebu-soc-id earlier ARM: mvebu: fix thermal quirk SoC revision check ARM: Kirkwood: t5325: Remove platform device to instantiate audio ARM: Kirkwood: Remove platform driver for codec ARM: mvebu: Add thermal quirk for the Armada 375 DB board ARM: mvebu: Select HAVE_ARM_TWD only if SMP is enabled ARM: mvebu: fix the name of the parameter used in mvebu_get_soc_id ARM: mvebu: remove unnecessary ifdef around l2x0_of_init ARM: mvebu: register the cpuidle driver for the Armada XP SoCs cpuidle: mvebu: Add initial CPU idle support for Armada 370/XP SoC ARM: mvebu: Register notifier callback for the cpuidle transition ARM: mvebu: refine which files are build in mach-mvebu ARM: mvebu: Add the PMSU related part of the cpu idle functions ARM: mvebu: Allow to power down L2 cache controller in idle mode ARM: mvebu: Low level function to disable HW coherency support ARM: mvebu: Split low level functions to manipulate HW coherency ... Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-19Merge tag 'mvebu-soc-orion5x-3.16' of git://git.infradead.org/linux-mvebu ↵Olof Johansson24-1104/+1393
into next/soc Merge "ARM: mvebu: SoC orion5x DT conversion for v3.16" from Jason Cooper: mvebu SoC orion5x DT conversion for v3.16 - orion5x - convert to DT * tag 'mvebu-soc-orion5x-3.16' of git://git.infradead.org/linux-mvebu: (29 commits) ARM: orion: remove no longer needed gpio DT code ARM: orion: remove no longer needed DT IRQ code ARM: orion5x: convert Maxtor Shared Storage II to the Device Tree ARM: orion5x: convert d2net to Device Tree ARM: orion5x: convert RD-88F5182 to Device Tree ARM: orion5x: remove unneeded code for edmini_v2 ARM: orion5x: keep TODO list in edmini_v2 DT ARM: orion5x: use DT to describe NOR on edmini_v2 ARM: orion5x: use DT to describe EHCI on edmini_v2 ARM: orion5x: use DT to describe I2C devices on edmini_v2 ARM: orion5x: convert edmini_v2 to DT pinctrl ARM: orion5x: add standard pinctrl configs for sata0 and sata1 ARM: orion5x: add Device Bus description at SoC level ARM: orion5x: update I2C description at SoC level ARM: orion5x: enable pinctrl driver at SoC level ARM: orion5x: switch to DT interrupts and timer ARM: orion: switch to a per-platform handle_irq() function ARM: orion5x: convert to use 'clocks' property for UART controllers ARM: orion5x: switch to use the clock driver for DT platforms ARM: orion5x: add interrupt for Ethernet in Device Tree ... Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-17ARM: STi: Add STiH407 SoC supportMaxime Coquelin3-0/+34
This patch adds support to STiH407 SoC. Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2014-05-16Merge tag 'at91-cleanup' of git://github.com/at91linux/linux-at91 into next/socOlof Johansson74-791/+1790
Merge "at91: cleanup for 3.16 #1" from Nicolas Ferre: First cleanup series for 3.15 - localize GPIO header in mach-at91 directory - big update on the CCF front with main and slow clocks - a cleanup of ADC and touchscreen driver with unification on IIO and removal of old driver [olof: Most of this branch is new code, not cleanups, so I'm merging this into the SoC branch in spite of the branch name] * tag 'at91-cleanup' of git://github.com/at91linux/linux-at91: (28 commits) ARM: at91/dt: at91-cosino_mega2560 remove useless tsadcc node ARM: at91: remove atmel_tsadcc platform_data Input: atmel_tsadcc: remove driver ARM: at91: remove atmel_tsadcc from sama5_defconfig ARM: at91: sam9rl: switch from atmel_tsadcc to at91_adc ARM: at91: sam9g45: switch from atmel_tsadcc to at91_adc ARM: at91: sam9rlek add touchscreen support through at91_adc ARM: at91: sam9rl: add at91_adc to support adc and touchscreen iio: adc: at91: add sam9rl support iio: adc: at91: remove unused include from include/mach ARM: at91: sam9m10g45ek: Add touchscreen support through at91_adc iio: adc: at91_adc: Add support for touchscreens without TSMR iio: adc: at91: cleanup platform_data ARM: at91: sam9260: remove unused platform_data ARM: at91: sam9g45: remove unused platform_data ARM: at91/dt: define sam9rlek crystal frequencies ARM: at91/dt: move at91sam9rl SoC to the new slow/main clock models ARM: at91/dt: define main xtal frequency of the at91sam9261ek board ARM: at91/dt: move at91sam9261 SoC to the new main clock model ARM: at91/dt: add xtal frequencies to sama5d3 xplained board ... Signed-off-by: Olof Johansson <olof@lixom.net>
2014-05-16ARM: mx25: Add CLKO supportFabio Estevam2-1/+17
CLKO support is a clock output on mx25 which can output many of the internal clock sources. It is useful for debugging purpose or also for driving the audio codec for example. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: i.MX1 clk: Remove clk_register_clkdev() for unused clocksAlexander Shiyan1-8/+0
This patch removes clk_register_clkdev() for the clocks that do not have any users from boards and drivers. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: i.MX1 clk: Add missing clocksAlexander Shiyan1-13/+20
This patch adds missing clocks for mpll_gate, spll_gate, uart3_gate, ssi2_gate and brom_gate. As an additional this fixes incorrect bit position for dma_gate clock. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: imx: add basic imx6sx SoC supportShawn Guo5-0/+69
Add basic suppport for i.MX6 SoloX SoC. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: imx: add clock driver for imx6sxAnson Huang3-0/+793
Add clock driver for i.MX6 SoloX SoC. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: imx: add low-level debug support for imx6sxShawn Guo2-2/+22
Enable low-level debug support for i.MX6 SoloX by adding the debug port definitions for the SoC. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-16ARM: mvebu: use hardware I/O coherency also for PCI devicesThomas Petazzoni1-5/+16
Since the beginning of the introduction of hardware I/O coherency support for Armada 370 and Armada XP, the special DMA operations should have applied to all DMA capable devices. Unfortunately, while the original code properly took into account platform devices, it didn't take into account PCI devices, which can also be DMA masters. This commit fixes that by registering a bus notifier on pci_bus_type, to register our custom DMA operations, like is already done for platform devices. While doing this, we also rename mvebu_hwcc_platform_notifier() to mvebu_hwcc_notifier() and mvebu_hwcc_platform_nb to mvebu_hwcc_nb because they are no longer specific to platform devices. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1399997070-11434-1-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-05-15ARM: sunxi: select MFD_SUN6I_PRCM when sun6i arch support is enabledBoris BREZILLON1-0/+1
Select the MFD_SUN6I_PRCM option when sun6i arch is enabled in order to get the PRCM (Power/Reset/Clock Management) related drivers compiled. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-05-14ARM: shmobile: Set clock frequency in HZ from OF nodesSimon Horman1-3/+20
shmobile_init_delay() looks for OF "clock-frequency" to determine the delay which is set by calling shmobile_setup_delay(). Unfortunately this seems to be incorrect in detail as "clock-frequency" node values are in HZ whereas the frequency argument to shmobile_setup_delay() is in MHz. Provide a variant of shmobile_setup_delay() that accepts HZ to correct this problem. Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-05-13ARM: shmobile: Use shmobile_init_late() on r8a7740Magnus Damm1-0/+1
Hook up ->init_late for r8a7740 to initialize Suspend-to-RAM and CPUIdle in case of C-code less board support for r8a7740. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-05-13ARM: mx51: Remove mach-cpuimx51sd board fileFabio Estevam5-639/+6
eukrea_mbimxsd51-baseboard.c and mach-cpuimx51sd.c can be replaced with their devicetree equivalents: imx51-eukrea-mbimxsd51-baseboard.dts and imx51-eukrea-cpuimx51.dtsi respectively, so remove the board files. This allows the conversion of mx51 to a devicetree-only platform. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-13ARM: shmobile: r8a7791: Correct SYS-DMAC clock definesGeert Uytterhoeven1-1/+2
R-Car M2 has two MSTP bits for SYS-DMAC, not one. Also bring the naming in sync with the documentation. This issue was introduced in v3.14, in commit 4d8864c9e94ec727f1c675b9f6921525c360334b ("ARM: shmobile: r8a7791: Add clock index macros for DT sources"). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-05-12ARM: i.MX: Setup IRQ handler from IRQ driverAlexander Shiyan40-53/+6
This patch moves IRQ handler setup to the its corresponded IRQ driver (AVIC, TZIC). Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-12ARM: i.MX27 pca100: remove deprecated IRQF_DISABLEDJuan Solano1-2/+1
This flag is a NOOP and can be removed now. Signed-off-by: Juan Solano <jsm@jsolano.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-12ARM: imx/mxs defconfigs: add MTD_SPI_NOR (new dependency for M25P80)Brian Norris2-0/+2
These defconfigs contain the CONFIG_M25P80 symbol, which is now dependent on the MTD_SPI_NOR symbol. Add CONFIG_MTD_SPI_NOR to satisfy the new dependency. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-12ARM: i.MX: Fix eMMa PrP resource sizeAlexander Shiyan1-1/+1
Last address for eMMa PrP is 0x80...0x83, so increase resource size for eMMa to 256. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-12ARM: imx_v4_v5_defconfig: drop CONFIG_COMMON_CLK_DEBUG optionShawn Guo1-1/+0
The option COMMON_CLK_DEBUG was removed by commit ea72dc2 (clk: remove CONFIG_COMMON_CLK_DEBUG), so let's remove CONFIG_COMMON_CLK_DEBUG from the defconfig. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-12ARM: i.MX27 clk: Remove clk_register_clkdev() for unused clocksAlexander Shiyan1-17/+0
This patch removes clk_register_clkdev() for the clocks that do not have any users for non-DT boards and drivers. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-12ARM: i.MX27 clk: Add missing clocks for MSHC and RTICAlexander Shiyan2-2/+13
This patch adds missing clocks handling for the Memory Stick Host Controller (MSHC) and Run-Time Integrity Checker (RTIC). Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-12ARM: imx6q: add the missing esai_ahb clockShawn Guo2-2/+6
The esai_ahb clock is derived from ahb and used to provide ESAI the capability of register accessing and FSYS clock source for I2S clocks dividing. The gate bits of this esai_ahb clock are shared with the esai clock -- the baud clock, so we need to call imx_clk_gate2_shared() for these two clocks. Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-12ARM: imx: add shared gate clock supportShawn Guo2-3/+23
It's quite common on i.MX that one gate bit controls the gating of multiple clocks, i.e. this is a shared gate. The patch adds the function imx_clk_gate2_shared() for such case. The clocks controlled by the same gate bits should call this function with a pointer to a single share count variable, so that the gate bits will only be operated on the first enabling and the last disabling of these shared gate clocks. Thanks to Gerhard Sittig <gsi@denx.de> for this idea. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
2014-05-12ARM: imx: lock is always valid for clk_gate2Shawn Guo1-8/+4
The imx specific clk_gate2 always has a valid lock with the clock. So the validation on gate->lock is not really needed. Remove it. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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