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Currently everyone and their dog has their own favourite spelling
for vga_switcheroo. This makes it hard to grep dmesg for log entries
relating to vga_switcheroo. It also makes it hard to find related
source files in the tree.
vga_switcheroo.c uses pr_fmt "vga_switcheroo". Use that everywhere.
Signed-off-by: Lukas Wunner <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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drm-intel-next-queued
Pull in patches Jani merged while I was at XDC.
Signed-off-by: Daniel Vetter <[email protected]>
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SKL port E handling was added in
commit 26951caf55d73ceb1967b0bf12f6d0b96853508e
Author: Xiong Zhang <[email protected]>
Date: Mon Aug 17 15:55:50 2015 +0800
drm/i915/skl: enable DDI-E hotplug
but the whole function was moved in a another branch in
commit b93433ccf64846820b9448f5ff5dd4348b58a8ed
Author: Jani Nikula <[email protected]>
Date: Thu Aug 20 10:47:36 2015 +0300
drm/i915: move ibx_digital_port_connected to intel_dp.c
and the addition was lost at some backmerge that I was unable to
identify. Put it back in.
Tested-by: Tomi Sarvela <[email protected]>
Reviewed-by: Mika Kuoppala <[email protected]>
Signed-off-by: Jani Nikula <[email protected]>
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Not the first time! not the last time?
There is a possibility to use gcc 5's -Wbool-compare to try and compare
(reg) in those macros to a constant and gcc will warn that the
comparison between a boolean expression and a constant is always either
true or false. Maybe.
Cc: Imre Deak <[email protected]>
Signed-off-by: Damien Lespiau <[email protected]>
Reviewed-by: Imre Deak <[email protected]>
Signed-off-by: Jani Nikula <[email protected]>
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We allocate memory for LVDS modes while parsing the VBT at startup, but
never free this memory when the driver is unloaded, causing a small
leak.
Signed-off-by: Matt Roper <[email protected]>
Signed-off-by: Jani Nikula <[email protected]>
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Use the new debug info in the intel_crtc struct in these functions
rather than passing them as args.
v2: move min/max assignment back above first trace call (Ville)
use scanline from crtc->debug rather than fetching a new one (Ville)
v3: fix up trace_i915_pipe_update_end, needs end scanline (Ville)
Requested-by: Ville Syrjälä <[email protected]>
Signed-off-by: Jesse Barnes <[email protected]>
Reviewed-by: Ville Syrjälä <[email protected]>
Signed-off-by: Jani Nikula <[email protected]>
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I used these additional fields to track down the issue I saw on HSW.
v2: move debug fields into a substruct (Ville)
v3: clean up debug code more (Ville)
References: https://bugs.freedesktop.org/show_bug.cgi?id=91579
Signed-off-by: Jesse Barnes <[email protected]>
Reviewed-by: Ville Syrjälä <[email protected]>
Signed-off-by: Jani Nikula <[email protected]>
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Fix the following 'make htmldocs' warnings:
.//drivers/gpu/drm/i915/i915_gem.c:1729: warning: No description found for parameter 'vma'
.//drivers/gpu/drm/i915/i915_gem.c:1729: warning: No description found for parameter 'vmf'
.//drivers/gpu/drm/i915/i915_gem.c:4962: warning: No description found for parameter 'old'
.//drivers/gpu/drm/i915/i915_gem.c:4962: warning: No description found for parameter 'new'
.//drivers/gpu/drm/i915/i915_gem.c:4962: warning: No description found for parameter 'frontbuffer_bits'
Signed-off-by: Geliang Tang <[email protected]>
Signed-off-by: Jani Nikula <[email protected]>
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Shared frontbuffer bits are causing warnings when same FB is displayed
in another plane without clearing the bits from previous plane.
v2: Removing coversion of fb bits to 64 bit as it is not needed for now. (Daniel)
Change-Id: Ic2df80747f314b82afd22f8326297c57d1e652c6
Signed-off-by: Sagar Arun Kamble <[email protected]>
Signed-off-by: Kumar, Mahesh <[email protected]>
[danvet: Drop INTEL_FRONTBUFFER_SPRITE_MASK since unused.]
Signed-off-by: Daniel Vetter <[email protected]>
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WaDisableSTUnitPowerOptimization:skl,bxt
Signed-off-by: Robert Beckett <[email protected]>
Signed-off-by: Arun Siluvery <[email protected]>
Reviewed-by: Sagar Arun Kamble <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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This stolen reserved stuff was introduced on g4x, so no need to waste
stolen on older platforms. Unfortunately configdb is no more so I can't
look up the right way to detect this stuff. I do have one hint as to
where the register might be on ctg, but I don't have a ctg to test it,
and on the elk I have here it doesn't contain sensible looking data.
For ilk grits suggegsts it might be in the same place as on snb (the
original PCI reg, not the mirror) but I can't be entirely sure about it
The register shows a round zero on my ilk.
So when there's no really good data for any of these platforms leave the
current "assume 1MiB" approach in place.
Cc: Paulo Zanoni <[email protected]>
Cc: Chris Wilson <[email protected]>
Signed-off-by: Ville Syrjälä <[email protected]>
Acked-by: Chris Wilson <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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This patch fix following warnings while "make xmldocs".
.//drivers/gpu/drm/i915/intel_lrc.c:780: warning: No description
found for parameter 'req'
.//drivers/gpu/drm/i915/intel_lrc.c:780: warning: Excess function
parameter 'request' description in 'intel_logical_ring_begin'
.//drivers/gpu/drm/i915/intel_lrc.c:780: warning: Excess function
parameter 'ctx' description in 'intel_logical_ring_begin'
Signed-off-by: Masanari Iida <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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Extend init/init_hw split to context init.
- Move context initialisation in to i915_gem_init_hw
- Move one off initialisation for render ring to
i915_gem_validate_context
- Move default context initialisation to logical_ring_init
Rename intel_lr_context_deferred_create to
intel_lr_context_deferred_alloc, to reflect reduced functionality &
alloc/init split.
This patch is intended to split out the allocation of resources &
initialisation to allow easier reuse of code for resume/gpu reset.
v2: Removed function ptr wrapping of do_switch_context (Daniel Vetter)
Left ->init_context int intel_lr_context_deferred_alloc
(Daniel Vetter)
Remove unnecessary init flag & ring type test. (Daniel Vetter)
Improve commit message (Daniel Vetter)
v3: On init/reinit, set the hw next sequence number to the sw next
sequence number. This is set to 1 at driver load time. This prevents
the seqno being reset on reinit (Chris Wilson)
v4: Set seqno back to ~0 - 0x1000 at start-of-day, and increment by 0x100
on reset.
This makes it obvious which bbs are which after a reset. (David Gordon
& John Harrison)
Rebase.
v5: Rebase. Fixed rebase breakage. Put context pinning in separate
function. Removed code churn. (Thomas Daniel)
v6: Cleanup up issues introduced in v2 & v5 (Thomas Daniel)
Issue: VIZ-4798
Signed-off-by: Nick Hoath <[email protected]>
Cc: Daniel Vetter <[email protected]>
Cc: Chris Wilson <[email protected]>
Cc: John Harrison <[email protected]>
Cc: David Gordon <[email protected]>
Cc: Thomas Daniel <[email protected]>
Reviewed-by: Thomas Daniel <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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This avoids some bad register writes and generally feels more correct
than unconditionally trying to redirect interrupts and such.
References: https://bugs.freedesktop.org/show_bug.cgi?id=91777
Signed-off-by: Jesse Barnes <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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Use WARN_ONCE in a bunch of places and demote a message that would
continually spam us.
Signed-off-by: Jesse Barnes <[email protected]>
Acked-by: Damien Lespiau <[email protected]>
Acked-by: Chris Wilson <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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Signed-off-by: Nick Hoath <[email protected]>
Signed-off-by: Arun Siluvery <[email protected]>
Reviewed-by: Sagar Arun Kamble <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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Signed-off-by: Arun Siluvery <[email protected]>
Reviewed-by: Sagar Arun Kamble <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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Signed-off-by: Arun Siluvery <[email protected]>
Reviewed-by: Sagar Arun Kamble <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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Using intel_encoder's hpd_pin to check the live status
because of BXT A0/A1 WA for HPD pins and hpd_pin contains the
updated pin for the corresponding port.
Signed-off-by: Sonika Jindal <[email protected]>
Reviewed-by: Rodrigo Vivi <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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When WaEnableForceRestoreInCtxtDescForVCS is required, it is only
safe to send new contexts if the last reported event is "active to
idle". Otherwise the same context can fully preempt itself because
lite-restore is disabled.
Testcase: igt/gem_concurrent_blit
Reported-by: Daniele Ceraolo Spurio <[email protected]>
Signed-off-by: Michel Thierry <[email protected]>
Reviewed-by: Arun Siluvery <[email protected]>
Tested-by: Daniele Ceraolo Spurio <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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Also check for correct revision id in each Gen9 platform (SKL until B0
and BXT until A0).
Cc: Nick Hoath <[email protected]>
Signed-off-by: Michel Thierry <[email protected]>
Reviewed-by: Arun Siluvery <[email protected]>
Tested-by: Daniele Ceraolo Spurio <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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This is done as a separate commit, to make it easier to revert
when things break.
Signed-off-by: Maarten Lankhorst <[email protected]>
Reviewed-by: Jesse Barnes <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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Instead of doing a hack during primary plane commit the state
is updated during atomic evasion. It handles differences in
pipe size and the panel fitter.
This is continuing on top of Daniel's work to make faster
modesets atomic, and not yet enabled by default.
Signed-off-by: Maarten Lankhorst <[email protected]>
Reviewed-by: Jesse Barnes <[email protected]>
[danvet:
- simplify/future-proof if ladder that Jesse spotted
- resolve conflict in pipe_config_check and don't spuriously move the
code.]
Signed-off-by: Daniel Vetter <[email protected]>
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The initial state is read out correctly and the state is atomic,
so it's safe to preserve the fb without any hacks if it's suitable.
Signed-off-by: Maarten Lankhorst <[email protected]>
Reviewed-by: Jesse Barnes <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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It should really use the atomic state.
Signed-off-by: Maarten Lankhorst <[email protected]>
Reviewed-by: Jesse Barnes <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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This might not have been set during boot, and when we preserve
the initial mode this can result in a black screen.
Cc: Daniel Stone <[email protected]>
Signed-off-by: Maarten Lankhorst <[email protected]>
Reviewed-by: Jesse Barnes <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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Signed-off-by: Daniel Vetter <[email protected]>
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Comment disagrees with the code which has changed a lot since
it was documented.
Note that the logic to remove -EIO handling was dropped in
commit 1488fc08c1706288616c602416654fd38c773deb
Author: Chris Wilson <[email protected]>
Date: Tue Apr 24 15:47:31 2012 +0100
drm/i915: Remove the deferred-free list
Signed-off-by: Tvrtko Ursulin <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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In async mode crtc->config can be updated after the locks are released,
resulting in the wrong state being duplicated.
Note that this also removes a spurious assignment of crtc_state->crtc
introduced in
commit f0c60574eb1216b0904c0d696c64d5096d6e4913
Author: Ander Conselvan de Oliveira <[email protected]>
Date: Tue Apr 21 17:12:58 2015 +0300
drm/i915: Call drm helpers when duplicating crtc and plane states
Signed-off-by: Maarten Lankhorst <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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With the conversion to atomic this cannot happen any more.
Signed-off-by: Maarten Lankhorst <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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Unfortunately fbc still depends on legacy primary state, so
it can't be killed off completely yet.
Signed-off-by: Maarten Lankhorst <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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Signed-off-by: Maarten Lankhorst <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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This function was still using the legacy state, convert it to atomic.
While we're at it, fix the FIXME too and disable the primary plane.
v2 (Daniel):
- Add FIXME explaining that update_primary_planes should soon get
removed anyway.
- Don't call ->disable_plane since we can't disable the primary plane
with a CS flip (noticed by Ville).
Signed-off-by: Maarten Lankhorst <[email protected]> (v1)
Signed-off-by: Daniel Vetter <[email protected]>
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Legacy state might not be updated any more.
Signed-off-by: Maarten Lankhorst <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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Signed-off-by: Maarten Lankhorst <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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This patch adds the intel_connector initialized to intel_hdmi
display, during the init phase, just like the other encoders do.
This attachment is very useful when we need to extract the connector
pointer during the hotplug handler function
Signed-off-by: Shashank Sharma <[email protected]>
Reviewed-by: Rodrigo Vivi <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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Fall back to VBT based backlight modulation frequency if it's not
set. Do not hard code.
This could be a problem if there is no VBT.
Cc: Clint Taylor <[email protected]>
Signed-off-by: Jani Nikula <[email protected]>
Tested-by: Clint Taylor <[email protected]>
Reviewed-by: Clint Taylor <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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Normally we determine the backlight PWM modulation frequency (which we
also use as backlight max value) from the backlight registers at module
load time, expecting the registers have been initialized by the BIOS. If
this is not the case, we fail.
The VBT contains the backlight modulation frequency in Hz. Add platform
specific functions to convert the frequency in Hz to backlight PWM
modulation frequency, and use them to initialize the backlight when the
registers are not initialized by the BIOS.
v2: Fix SPT and VLV. Thanks to Clint for the VLV code.
Cc: Clint Taylor <[email protected]>
Signed-off-by: Jani Nikula <[email protected]>
Reviewed-by: Clint Taylor <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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Currently the difference between backlight control on HSW vs. BDW/SKL is
that on HSW we modify the duty cycle on the CPU register, and have the
hardware pass the changes on to the PCH registers. We still drive the
PCH PWM on both. While HSW and BDW use the same LPT PCH, BDW does not
pass these messages on to the PCH. Therefore on BDW we need to enable
the PCH override bit, and program the PCH directly. (On SPT PCH, this
mode is the default.) We could as well do this on HSW too, and in fact
I've been told this is what a certain other operating system does. So
use PCH backlight override on HSW too.
This simplifies some follow-up code, but it does have the danger of
breaking backlight on HSW machines. It should work, but mysterious are
the ways of backlight.
While at it, name the related backlight hooks according to the PCH
rather than the CPU for clarity.
Cc: Clint Taylor <[email protected]>
Signed-off-by: Jani Nikula <[email protected]>
Reviewed-by: Clint Taylor <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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Add stepping check for A0 workarounds, and remove the associated
FIXME tags.
Split out unrelated WAs for later condition checking.
v2: Fixed format (PeterL)
v3: Corrected stepping check for WaDisableSDEUnitClockGating
- Ignoring comment, following hardware spec instead. (ChrisH)
Added description for TILECTL setting (JonB)
Cc: Peter Lawthers <[email protected]>
Cc: Chris Harris <[email protected]>
Cc: Jon Bloomfield <[email protected]>
Signed-off-by: Nick Hoath <[email protected]>
Reviewed-by: Mika Kuoppala <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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Fixes regression from
commit f1afe24f0e736b9d7f2275e2b1504af3fe612f2a
Author: Arun Siluvery <[email protected]>
Date: Tue Aug 4 16:22:20 2015 +0100
drm/i915: Change SRM, LRM instructions to use correct length
which forgot to account for the length bias when declaring the fixed
length.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91844
Reported-by: Andreas Reis <[email protected]>
Signed-off-by: Chris Wilson <[email protected]>
Cc: Dave Gordon <[email protected]>
Cc: Arun Siluvery <[email protected]>
Cc: Mika Kuoppala <[email protected]>
Cc: Daniel Vetter <[email protected]>
Reviewed-by: Arun Siluvery <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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The pfit state is stored as register values, so dump them as hex instead
of decimal to make some sense of the error messages.
Signed-off-by: Ville Syrjälä <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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These registers exist only before GEN5, so currently we may access
undefined registers on VLV/CHV and BXT. Apply the workaround only pre
GEN5.
Since the workaround is relevant only when LVDS is present, for clarity
apply it only if this is the case.
This triggered an unclaimed register access warning on BXT.
v2: (Ville)
- move the workaround to the LVDS init code
- print a debug note about the workaround
Signed-off-by: Imre Deak <[email protected]>
Reviewed-by: Ville Syrjälä <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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This register exists only pre GEN5, but atm we also access it on
VLV/BXT/CHV. Prevent accessing it on these latter platforms.
Signed-off-by: Imre Deak <[email protected]>
Reviewed-by: Ville Syrjälä <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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A small, very small, step to sharing the duplicate code between
execlists and legacy submission engines, starting with the ringbuffer
allocation code.
Signed-off-by: Chris Wilson <[email protected]>
Cc: Arun Siluvery <[email protected]>
Cc: Mika Kuoppala <[email protected]>
Cc: Dave Gordon <[email protected]>
Reviewed-by: Paulo Zanoni <[email protected]>
Reviewed-by: Mika Kuoppala <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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Reviewed-by: Chris Wilson <[email protected]>
Signed-off-by: Jani Nikula <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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TPS3 is mandatory for downstream devices that support HBR2, and Intel
platforms that support HBR2 also support TPS3. Whenever TPS3 is
supported by both the source and sink, it should be used. In other
words, whenever the source and sink are capable of 5.4 Gbps link, we
should anyway go for TPS3, regardless of the link rate being selected.
Log an error if the sink has advertized HBR2 capability without TPS3
capability.
Reviewed-by: Chris Wilson <[email protected]>
Signed-off-by: Jani Nikula <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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There is no need to have a separate flag for tps3 as the information is
only used at one location. Move the logic there to make it easier to
follow.
Reviewed-by: Ville Syrjälä <[email protected]>
Signed-off-by: Jani Nikula <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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This is another case where we can consider the default is the
newest available and not actually a missed case.
No functional change.
Signed-off-by: Rodrigo Vivi <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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Unless future specs tells otherwise we can assume future gens
inherit some stuff from the previous so let's handle
missed cases when we know tehy should't be there and assume
default equals newest one.
No functional changes.
v2: Remove useless case as pointed out by Ville.
Cc: Ville Syrjälä <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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