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2020-03-20phy: phy-mtk-tphy: add a new reference clockChunfeng Yun1-1/+18
Usually the digital and analog phys use the same reference clock, but some platforms have two separate reference clocks for each of them, so add another optional clock to support them. In order to keep the clock names consistent with PHY IP's, change the da_ref for analog phy and ref clock for digital phy. Signed-off-by: Chunfeng Yun <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20phy: phy-mtk-tphy: remove unused u3phya_ref clockChunfeng Yun1-18/+0
The u3phya_ref clock is already moved into sub-node, and renamed as ref clock, no used anymore now, so remove it, this can avoid confusion when support new platforms Signed-off-by: Chunfeng Yun <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20phy: phy-mtk-tphy: make the ref clock optionalChunfeng Yun1-1/+1
Sometimes the reference clock of USB3 PHY comes from oscillator directly, and no need refer to a fixed-clock in DTS anymore if make it optional. Signed-off-by: Chunfeng Yun <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20phy: phy-mtk-tphy: add a property for internal resistanceChunfeng Yun1-2/+14
This is used to tune J-K voltage by internal R (resistance), the range is [0, 31], the resistance value is about 6.9K ohm for 0, 3.8K ohm for 31, and the step is 1K ohm Signed-off-by: Chunfeng Yun <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20phy: phy-mtk-tphy: add a property for disconnect thresholdChunfeng Yun1-2/+15
This is used to tune the threshold of disconnect, the index range is [0, 15], the threshold voltage is about 400mV for 0, 700mV for 15, and the step is 20mV. Signed-off-by: Chunfeng Yun <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20dt-bindings: phy-mtk-tphy: add the properties about address mappingChunfeng Yun1-0/+10
Add three required properties about the address mapping, including '#address-cells', '#size-cells' and 'ranges' Signed-off-by: Chunfeng Yun <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20dt-bindings: phy-mtk-tphy: add a new reference clockChunfeng Yun1-2/+5
Usually the digital and analog phys use the same reference clock, but on some platforms, they are separated, so add another optional clock to support it. In order to keep the clock names consistent with PHY IP's, use the da_ref for analog phy and ref clock for digital phy. Signed-off-by: Chunfeng Yun <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20dt-bindings: phy-mtk-tphy: remove unused u3phya_ref clockChunfeng Yun1-4/+0
The u3phya_ref clock is already moved into sub-node, and renamed as ref clock, no used anymore now, so remove it to avoid confusion Signed-off-by: Chunfeng Yun <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20dt-bindings: phy-mtk-tphy: make the ref clock optionalChunfeng Yun1-6/+7
Make the ref clock optional, then we no need refer to a fixed-clock in DTS anymore when the clock of USB3 PHY comes from oscillator directly Signed-off-by: Chunfeng Yun <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20dt-bindings: phy-mtk-tphy: add two optional properties for u2phyChunfeng Yun1-0/+2
Add two optional properties, one for tuning J-K voltage by INTR, another for disconnect threshold, both of them are related with connect detection Signed-off-by: Chunfeng Yun <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20phy: amlogic: G12A: Fix misuse of GENMASK macroJoe Perches1-1/+1
Arguments are supposed to be ordered high then low. Signed-off-by: Joe Perches <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20phy: qcom: qmp: Use power_on/off ops for PCIeBjorn Andersson1-3/+3
The PCIe PHY initialization requires the attached device to be present, which is primarily achieved by the PCI controller driver. So move the logic from init/exit to power_on/power_off. Signed-off-by: Bjorn Andersson <[email protected]> Reviewed-by: John Stultz <[email protected]> Reviewed-by: Vinod Koul <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20phy: uniphier-pcie: Add SoC-dependent phy-mode function supportKunihiko Hayashi1-7/+10
Since this phy is shared by multiple devices including USB and PCIe, it is necessary to determine which device use this phy. This patch adds SoC-dependent functions to determine a device using this phy. When there is 'socionext,syscon' property in the pcie-phy node, the driver calls SoC-dependt function instead of checking .has_syscon in SoC-dependent data. The function configures the system controller to use phy for PCIe. Signed-off-by: Kunihiko Hayashi <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20phy: uniphier-pcie: Add legacy SoC support for Pro5Kunihiko Hayashi1-11/+72
Add legacy SoC support that needs to manage gio clock and reset and to skip setting unimplemented phy parameters. This supports Pro5. This specifies only 1 port use because Pro5 doesn't set it in the power-on sequence. Signed-off-by: Kunihiko Hayashi <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20phy: uniphier-usb3hs: Change Rx sync mode to avoid communication failureKunihiko Hayashi1-4/+16
In case of using default parameters, communication failure might occur in rare cases. This sets Rx sync mode parameter to avoid the issue. Signed-off-by: Kunihiko Hayashi <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20phy: uniphier-usb3hs: Add legacy SoC support for Pro5Kunihiko Hayashi1-15/+53
Add legacy SoC support that needs to manage gio clock and reset. This supports Pro5. Signed-off-by: Kunihiko Hayashi <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20phy: uniphier-usb3ss: Add Pro5 supportKunihiko Hayashi1-0/+4
Pro5 SoC has same scheme of USB3 ss-phy as Pro4, so the data for Pro5 is equivalent to Pro4. Signed-off-by: Kunihiko Hayashi <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20dt-bindings: phy: socionext: Add Pro5 support and remove Pro4 from usb3-hsphyKunihiko Hayashi3-9/+15
This adds compatible string for Pro5 SoC that needs to manage gio clock and reset. And Pro4 SoC uses USB2 PHY instead of USB3 HS-PHY, so this removes Pro4 description from usb3-hsphy. Signed-off-by: Kunihiko Hayashi <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20phy: socionext: Use devm_platform_ioremap_resource()Kunihiko Hayashi3-9/+3
Use devm_platform_ioremap_resource() to simplify the code. Signed-off-by: Kunihiko Hayashi <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20phy: qcom-qmp: Add MSM8996 UFS QMP supportBjorn Andersson2-0/+111
The support for the 14nm MSM8996 UFS PHY is currently handled by the UFS-specific 14nm QMP driver, due to the earlier need for additional operations beyond the standard PHY API. Add support for this PHY to the common QMP driver, to allow us to remove the old driver. Acked-by: Rob Herring <[email protected]> Reviewed-by: Vinod Koul <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20phy: cadence-torrent: Add support for subnode bindingsSwapnil Jakhade1-75/+217
Implement single link subnode support to the phy driver. Add reset support including PHY reset and individual lane reset. Signed-off-by: Swapnil Jakhade <[email protected]> Signed-off-by: Yuti Amonkar <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20phy: cadence-torrent: Add platform dependent initialization structureSwapnil Jakhade1-0/+9
Add platform dependent initialization data for Torrent PHY used in TI's J721E SoC. Signed-off-by: Swapnil Jakhade <[email protected]> Signed-off-by: Yuti Amonkar <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20phy: cadence-torrent: Use regmap to read and write DPTX PHY registersSwapnil Jakhade1-69/+100
Use regmap to read and write DPTX specific PHY registers. Signed-off-by: Swapnil Jakhade <[email protected]> Signed-off-by: Yuti Amonkar <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20phy: cadence-torrent: Use regmap to read and write Torrent PHY registersSwapnil Jakhade1-369/+650
Use regmap for accessing Torrent PHY registers. Modify register offsets as defined in Torrent PHY user guide. Abstract address calculation using regmap APIs. Signed-off-by: Swapnil Jakhade <[email protected]> Signed-off-by: Yuti Amonkar <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20phy: cadence-torrent: Implement PHY configure APIsSwapnil Jakhade1-5/+431
Add support for PHY configuration APIs. These will mainly reconfigure link rate, number of lanes, voltage swing and pre-emphasis values. Signed-off-by: Swapnil Jakhade <[email protected]> Signed-off-by: Yuti Amonkar <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20phy: cadence-torrent: Add 19.2 MHz reference clock supportSwapnil Jakhade1-17/+441
Add configuration functions for 19.2 MHz refclock support. Add register configurations for SSC support. Signed-off-by: Swapnil Jakhade <[email protected]> Signed-off-by: Yuti Amonkar <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20phy: cadence-torrent: Refactor code for reusabilitySwapnil Jakhade1-93/+137
Add a separate function to set different power state values. Use uniform polling timeout value. Also check return values of functions for proper error handling. Signed-off-by: Swapnil Jakhade <[email protected]> Signed-off-by: Yuti Amonkar <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20phy: cadence-torrent: Add wrapper for DPTX register accessSwapnil Jakhade1-21/+50
Add wrapper functions to read, write DisplayPort specific PHY registers to improve code readability. Signed-off-by: Swapnil Jakhade <[email protected]> Signed-off-by: Yuti Amonkar <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20phy: cadence-torrent: Add wrapper for PHY register accessSwapnil Jakhade1-65/+77
Add a wrapper function to write Torrent PHY registers to improve code readability. Signed-off-by: Swapnil Jakhade <[email protected]> Signed-off-by: Yuti Amonkar <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20phy: cadence-torrent: Adopt Torrent nomenclatureSwapnil Jakhade1-53/+58
- Change private data struct cdns_dp_phy to cdns_torrent_phy - Change module description and registration accordingly - Generic torrent functions have prefix cdns_torrent_phy_* - Functions specific to Torrent phy for DisplayPort are prefixed as cdns_torrent_dp_* Signed-off-by: Swapnil Jakhade <[email protected]> Signed-off-by: Yuti Amonkar <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20phy: cadence-dp: Rename to phy-cadence-torrentYuti Amonkar3-5/+5
Rename Cadence DP PHY driver from phy-cadence-dp to phy-cadence-torrent to make it more generic for future use. Modifiy Makefile and Kconfig accordingly. Also, change driver compatible from "cdns,dp-phy" to "cdns,torrent-phy".This will not affect ABI as the driver has never been functional, and therefore do not exist in any active use case. Signed-off-by: Yuti Amonkar <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20dt-bindings: phy: Add Cadence MHDP PHY bindings in YAML format.Yuti Amonkar1-0/+143
- Add Cadence MHDP PHY bindings in YAML format. - Add Torrent PHY reference clock bindings. - Add sub-node bindings for each group of PHY lanes based on PHY type. Each sub-node includes properties such as master lane number, link reset, phy type, number of lanes etc. - Add reset support including PHY reset and individual lane reset. - Add a new compatible string used for TI SoCs using Torrent PHY. This will not affect ABI as the driver has never been functional, and therefore do not exist in any active use case. Signed-off-by: Yuti Amonkar <[email protected]> Signed-off-by: Kishon Vijay Abraham I <[email protected]>
2020-03-20tools/power turbostat: Fix 32-bit capabilities warningLen Brown2-17/+31
warning: `turbostat' uses 32-bit capabilities (legacy support in use) Signed-off-by: Len Brown <[email protected]>
2020-03-20tools/power turbostat: Fix missing SYS_LPI counter on some ChromebooksLen Brown1-9/+14
Some Chromebook BIOS' do not export an ACPI LPIT, which is how Linux finds the residency counter for CPU and SYSTEM low power states, that is exports in /sys/devices/system/cpu/cpuidle/*residency_us When these sysfs attributes are missing, check the debugfs attrubte from the pmc_core driver, which accesses the same counter value. Signed-off-by: Len Brown <[email protected]>
2020-03-20tools/power turbostat: Support Elkhart LakeChen Yu1-1/+30
From a turbostat point of view the Tremont-based Elkhart Lake is very similar to Goldmont, reuse the code of Goldmont. Elkhart Lake does not support 'group turbo limit counter' nor C3, adjust the code accordingly. Signed-off-by: Chen Yu <[email protected]> Signed-off-by: Len Brown <[email protected]>
2020-03-20tools/power turbostat: Support Jasper LakeChen Yu1-0/+3
Jasper Lake, like Elkhart Lake, uses a Tremont CPU. So reuse the code. Signed-off-by: Chen Yu <[email protected]> Signed-off-by: Len Brown <[email protected]>
2020-03-20tools/power turbostat: Support Ice Lake serverChen Yu1-0/+3
From a turbostat point of view, Ice Lake server looks like Sky Lake server. Signed-off-by: Chen Yu <[email protected]> Signed-off-by: Len Brown <[email protected]>
2020-03-20tools/power turbostat: Support Tiger LakeChen Yu1-0/+2
From a turbostat point of view, Tiger Lake looks like Ice Lake. Signed-off-by: Chen Yu <[email protected]> Signed-off-by: Len Brown <[email protected]>
2020-03-20tools/power turbostat: Fix gcc build warningsLen Brown1-2/+2
Warning: ‘__builtin_strncpy’ specified bound 20 equals destination size [-Wstringop-truncation] reduce param to strncpy, to guarantee that a null byte is always copied into destination buffer. Signed-off-by: Len Brown <[email protected]>
2020-03-20tools/power turbostat: Support CometlakeChen Yu1-0/+2
From a turbostat point of view, Cometlake is like Kabylake. Suggested-by: Rui Zhang <[email protected]> Signed-off-by: Chen Yu <[email protected]> Signed-off-by: Len Brown <[email protected]>
2020-03-20Merge tag 'drm-intel-fixes-2020-03-19' of ↵Dave Airlie2-43/+34
git://anongit.freedesktop.org/drm/drm-intel into drm-fixes drm/i915 fixes for v5.6-rc7: - Track active elements during dequeue - Fix failure to handle all MCR ranges - Revert unnecessary workaround Signed-off-by: Dave Airlie <[email protected]> From: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-03-20Merge tag 'amd-drm-fixes-5.6-2020-03-19' of ↵Dave Airlie11-13/+38
git://people.freedesktop.org/~agd5f/linux into drm-fixes amd-drm-fixes-5.6-2020-03-19: amdgpu: - Pageflip fix - VCN clockgating fixes - GPR debugfs fix for umr - GPU reset fix - eDP fix for MBP - DCN2.x fix Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2020-03-20KVM: PPC: Fix kernel crash with PR KVMGreg Kurz2-2/+1
With PR KVM, shutting down a VM causes the host kernel to crash: [ 314.219284] BUG: Unable to handle kernel data access on read at 0xc00800000176c638 [ 314.219299] Faulting instruction address: 0xc008000000d4ddb0 cpu 0x0: Vector: 300 (Data Access) at [c00000036da077a0] pc: c008000000d4ddb0: kvmppc_mmu_pte_flush_all+0x68/0xd0 [kvm_pr] lr: c008000000d4dd94: kvmppc_mmu_pte_flush_all+0x4c/0xd0 [kvm_pr] sp: c00000036da07a30 msr: 900000010280b033 dar: c00800000176c638 dsisr: 40000000 current = 0xc00000036d4c0000 paca = 0xc000000001a00000 irqmask: 0x03 irq_happened: 0x01 pid = 1992, comm = qemu-system-ppc Linux version 5.6.0-master-gku+ (greg@palmb) (gcc version 7.5.0 (Ubuntu 7.5.0-3ubuntu1~18.04)) #17 SMP Wed Mar 18 13:49:29 CET 2020 enter ? for help [c00000036da07ab0] c008000000d4fbe0 kvmppc_mmu_destroy_pr+0x28/0x60 [kvm_pr] [c00000036da07ae0] c0080000009eab8c kvmppc_mmu_destroy+0x34/0x50 [kvm] [c00000036da07b00] c0080000009e50c0 kvm_arch_vcpu_destroy+0x108/0x140 [kvm] [c00000036da07b30] c0080000009d1b50 kvm_vcpu_destroy+0x28/0x80 [kvm] [c00000036da07b60] c0080000009e4434 kvm_arch_destroy_vm+0xbc/0x190 [kvm] [c00000036da07ba0] c0080000009d9c2c kvm_put_kvm+0x1d4/0x3f0 [kvm] [c00000036da07c00] c0080000009da760 kvm_vm_release+0x38/0x60 [kvm] [c00000036da07c30] c000000000420be0 __fput+0xe0/0x310 [c00000036da07c90] c0000000001747a0 task_work_run+0x150/0x1c0 [c00000036da07cf0] c00000000014896c do_exit+0x44c/0xd00 [c00000036da07dc0] c0000000001492f4 do_group_exit+0x64/0xd0 [c00000036da07e00] c000000000149384 sys_exit_group+0x24/0x30 [c00000036da07e20] c00000000000b9d0 system_call+0x5c/0x68 This is caused by a use-after-free in kvmppc_mmu_pte_flush_all() which dereferences vcpu->arch.book3s which was previously freed by kvmppc_core_vcpu_free_pr(). This happens because kvmppc_mmu_destroy() is called after kvmppc_core_vcpu_free() since commit ff030fdf5573 ("KVM: PPC: Move kvm_vcpu_init() invocation to common code"). The kvmppc_mmu_destroy() helper calls one of the following depending on the KVM backend: - kvmppc_mmu_destroy_hv() which does nothing (Book3s HV) - kvmppc_mmu_destroy_pr() which undoes the effects of kvmppc_mmu_init() (Book3s PR 32-bit) - kvmppc_mmu_destroy_pr() which undoes the effects of kvmppc_mmu_init() (Book3s PR 64-bit) - kvmppc_mmu_destroy_e500() which does nothing (BookE e500/e500mc) It turns out that this is only relevant to PR KVM actually. And both 32 and 64 backends need vcpu->arch.book3s to be valid when calling kvmppc_mmu_destroy_pr(). So instead of calling kvmppc_mmu_destroy() from kvm_arch_vcpu_destroy(), call kvmppc_mmu_destroy_pr() at the beginning of kvmppc_core_vcpu_free_pr(). This is consistent with kvmppc_mmu_init() being the last call in kvmppc_core_vcpu_create_pr(). For the same reason, if kvmppc_core_vcpu_create_pr() returns an error then this means that kvmppc_mmu_init() was either not called or failed, in which case kvmppc_mmu_destroy() should not be called. Drop the line in the error path of kvm_arch_vcpu_create(). Fixes: ff030fdf5573 ("KVM: PPC: Move kvm_vcpu_init() invocation to common code") Signed-off-by: Greg Kurz <[email protected]> Reviewed-by: Sean Christopherson <[email protected]> Signed-off-by: Michael Ellerman <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2020-03-19drm/amd/display: Fix pageflip event race condition for DCN.Mario Kleiner1-3/+15
Commit '16f17eda8bad ("drm/amd/display: Send vblank and user events at vsartup for DCN")' introduces a new way of pageflip completion handling for DCN, and some trouble. The current implementation introduces a race condition, which can cause pageflip completion events to be sent out one vblank too early, thereby confusing userspace and causing flicker: prepare_flip_isr(): 1. Pageflip programming takes the ddev->event_lock. 2. Sets acrtc->pflip_status == AMDGPU_FLIP_SUBMITTED 3. Releases ddev->event_lock. --> Deadline for surface address regs double-buffering passes on target pipe. 4. dc_commit_updates_for_stream() MMIO programs the new pageflip into hw, but too late for current vblank. => pflip_status == AMDGPU_FLIP_SUBMITTED, but flip won't complete in current vblank due to missing the double-buffering deadline by a tiny bit. 5. VSTARTUP trigger point in vblank is reached, VSTARTUP irq fires, dm_dcn_crtc_high_irq() gets called. 6. Detects pflip_status == AMDGPU_FLIP_SUBMITTED and assumes the pageflip has been completed/will complete in this vblank and sends out pageflip completion event to userspace and resets pflip_status = AMDGPU_FLIP_NONE. => Flip completion event sent out one vblank too early. This behaviour has been observed during my testing with measurement hardware a couple of time. The commit message says that the extra flip event code was added to dm_dcn_crtc_high_irq() to prevent missing to send out pageflip events in case the pflip irq doesn't fire, because the "DCH HUBP" component is clock gated and doesn't fire pflip irqs in that state. Also that this clock gating may happen if no planes are active. This suggests that the problem addressed by that commit can't happen if planes are active. The proposed solution is therefore to only execute the extra pflip completion code iff the count of active planes is zero and otherwise leave pflip completion handling to the pflip irq handler, for a more race-free experience. Note that i don't know if this fixes the problem the original commit tried to address, as i don't know what the test scenario was. It does fix the observed too early pageflip events though and points out the problem introduced. Fixes: 16f17eda8bad ("drm/amd/display: Send vblank and user events at vsartup for DCN") Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Mario Kleiner <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2020-03-19Merge tag 'mmc-v5.6-rc6' of ↵Linus Torvalds8-14/+117
git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc Pull MMC fixes from Ulf Hansson: - rtsx_pci: Fix support for some various speed modes - sdhci-of-at91: Fix support for GPIO card detect on SAMA5D2 - sdhci-cadence: Fix support for DDR52 speed mode for eMMC on UniPhier - sdhci-acpi: Fix broken WP support on Acer Aspire Switch 10 - sdhci-acpi: Workaround FW bug for suspend on Lenovo Miix 320 * tag 'mmc-v5.6-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: mmc: rtsx_pci: Fix support for speed-modes that relies on tuning mmc: sdhci-of-at91: fix cd-gpios for SAMA5D2 mmc: sdhci-cadence: set SDHCI_QUIRK2_PRESET_VALUE_BROKEN for UniPhier mmc: sdhci-acpi: Disable write protect detection on Acer Aspire Switch 10 (SW5-012) mmc: sdhci-acpi: Switch signal voltage back to 3.3V on suspend on external microSD on Lenovo Miix 320
2020-03-19arm64: compat: Fix syscall number of compat_clock_getresVincenzo Frascino1-1/+1
The syscall number of compat_clock_getres was erroneously set to 247 (__NR_io_cancel!) instead of 264. This causes the vDSO fallback of clock_getres() to land on the wrong syscall for compat tasks. Fix the numbering. Cc: <[email protected]> Fixes: 53c489e1dfeb6 ("arm64: compat: Add missing syscall numbers") Acked-by: Catalin Marinas <[email protected]> Reviewed-by: Nick Desaulniers <[email protected]> Signed-off-by: Vincenzo Frascino <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2020-03-19Merge tag '5.6-rc6-smb3-fixes' of git://git.samba.org/sfrench/cifs-2.6Linus Torvalds2-2/+4
Pull cifs fixes from Steve French: "Three small smb3 fixes, two for stable" * tag '5.6-rc6-smb3-fixes' of git://git.samba.org/sfrench/cifs-2.6: CIFS: fiemap: do not return EINVAL if get nothing CIFS: Increment num_remote_opens stats counter even in case of smb2_query_dir_first cifs: potential unintitliazed error code in cifs_getattr()
2020-03-19Merge tag 'kbuild-fixes-v5.6-3' of ↵Linus Torvalds12-39/+47
git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild Pull Kbuild fixes from Masahiro Yamada: - fix __uint128_t capability test in Kconfig when GCC that defaults to 32-bit is used to build the 64-bit kernel - suppress new noisy Clang warnings -Wpointer-to-enum-cast - move the namespace field in Module.symvers for the backward compatibility reason for the depmod tool - use available compression for initramdisk when INTRAMFS_SOURCE is defined, which was the original behavior - fix modpost to handle correct large section numbers when it refers to modversion CRCs and module namespaces - fix comments and documents * tag 'kbuild-fixes-v5.6-3' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild: scripts/kallsyms: fix wrong kallsyms_relative_base modpost: Get proper section index by get_secindex() instead of st_shndx initramfs: restore default compression behavior modpost: move the namespace field in Module.symvers last kbuild: Disable -Wpointer-to-enum-cast kbuild: doc: fix references to other documents int128: fix __uint128_t compiler test in Kconfig kconfig: introduce m32-flag and m64-flag kbuild: Fix inconsistent comment
2020-03-19rtc: max8907: add missing select REGMAP_IRQCorentin Labbe1-0/+1
I have hit the following build error: armv7a-hardfloat-linux-gnueabi-ld: drivers/rtc/rtc-max8907.o: in function `max8907_rtc_probe': rtc-max8907.c:(.text+0x400): undefined reference to `regmap_irq_get_virq' max8907 should select REGMAP_IRQ Fixes: 94c01ab6d7544 ("rtc: add MAX8907 RTC driver") Cc: stable <[email protected]> Signed-off-by: Corentin Labbe <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2020-03-19Merge tag 'tegra-for-5.7-usb-v2' of ↵Greg Kroah-Hartman11-180/+1024
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into usb-next Thierry writes: usb: tegra: Changes for v5.7-rc1 These changes add USB OTG support for the XUSB host and XUSB device controllers found on NVIDIA Tegra SoCs. * tag 'tegra-for-5.7-usb-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: usb: gadget: tegra-xudc: Support multiple device modes usb: gadget: tegra-xudc: Use phy_set_mode() to set/unset device mode usb: gadget: tegra-xudc: Add usb-phy support usb: gadget: tegra-xudc: Remove usb-role-switch support usb: xhci-tegra: Add OTG support phy: tegra: Select USB_PHY phy: tegra: Don't use device-managed API to allocate ports phy: tegra: Fix regulator leak phy: tegra: Print -EPROBE_DEFER error message at debug level phy: tegra: xusb: Don't warn on probe defer phy: tegra: xusb: Add Tegra194 support phy: tegra: xusb: Protect Tegra186 soc with config phy: tegra: xusb: Add set_mode support for UTMI phy on Tegra186 phy: tegra: xusb: Add set_mode support for USB 2 phy on Tegra210 phy: tegra: xusb: Add support to get companion USB 3 port phy: tegra: xusb: Add usb-phy support phy: tegra: xusb: Add usb-role-switch support
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