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2013-01-28usb: phy: remove unused APIs from Tegra PHY.Venu Byravarasu2-17/+0
As tegra_usb_phy_clk_disable/enable() are not being used, removing them. Signed-off-by: Venu Byravarasu <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28usb: host: tegra: Resetting PORT0 based on information received via DT.Venu Byravarasu1-1/+5
Tegra USB host driver is using port instance number, to handle some of the hardware issues on SOC e.g. reset PORT0 twice etc. As instance number based handling looks ugly, making use of information passed through DT for achieving this. Signed-off-by: Venu Byravarasu <[email protected]> Acked-by: Greg Kroah-Hartman <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra: Add new DT property to USB node.Venu Byravarasu2-0/+3
As Tegra USB host driver is using instance number for resetting PORT0 twice, adding a new DT property for handling this. Signed-off-by: Venu Byravarasu <[email protected]> Acked-by: Alan Stern <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28usb: phy: use kzalloc to allocate struct tegra_usb_phyVenu Byravarasu1-1/+1
Use kzalloc instead of kmalloc to allocate struct tegra_usb_phy. This ensures that all function pointers in member u_phy are initialized to NULL. Signed-off-by: Venu Byravarasu <[email protected]> Acked-by: Greg Kroah-Hartman <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra: remove USB address related macros from iomap.hVenu Byravarasu2-12/+3
USB register base address and sizes defined in iomap.h are not used in any files other than board-dt-tegra20.c. Hence removed those defines from header file and using the absolute values in board files. Signed-off-by: Venu Byravarasu <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28clk: tegra30: remove unused TEGRA_CLK_DUPLICATE()sPrashant Gaikwad1-70/+0
With device tree support added for Tegra clocks look up is done from device tree, remove unused TEGRA_CLK_DUPLICATE()s. Signed-off-by: Prashant Gaikwad <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28clk: tegra20: remove unused TEGRA_CLK_DUPLICATE()sPrashant Gaikwad1-17/+0
With device tree support added for Tegra clocks look up is done from device tree, remove unused TEGRA_CLK_DUPLICATE()s. Signed-off-by: Prashant Gaikwad <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra30: remove auxdataPrashant Gaikwad1-30/+1
Remove AUXDATA as clocks are initialized from device node. Signed-off-by: Prashant Gaikwad <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra20: remove auxdataPrashant Gaikwad1-24/+0
Remove AUXDATA as clock are initialized from device node. Signed-off-by: Prashant Gaikwad <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ASoC: tegra: remove auxdataPrashant Gaikwad1-12/+2
Configlink clock information is added to device tree. Get the clocks using device node. Remove AUXDATA. Signed-off-by: Prashant Gaikwad <[email protected]> Acked-by: Mark Brown <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28staging: nvec: remove use of clk_get_sysPrashant Gaikwad2-5/+1
As clock information is added to device tree clock can be looked up using clk_get. Remove use of clk_get_sys. Signed-off-by: Prashant Gaikwad <[email protected]> Acked-by: Greg Kroah-Hartman <[email protected]> Acked-by: Marc Dietrich <[email protected]> Acked-by: Julian Andres Klode <[email protected]> [swarren: updated TODO file to remove entry that requested this change] Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra: paz00: add clock information to DTPrashant Gaikwad1-0/+2
Add clock i2c clock information to device node. Signed-off-by: Prashant Gaikwad <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra: add clock properties to Tegra30 DTPrashant Gaikwad1-1/+55
Add clock information to device nodes. Signed-off-by: Prashant Gaikwad <[email protected]> [swarren: added second clock to 3d node] Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra: add clock properties to Tegra20 DTPrashant Gaikwad1-0/+44
Add clock information to device nodes. Signed-off-by: Prashant Gaikwad <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28spi: tegra: do not use clock name to get clockPrashant Gaikwad2-2/+2
Since Tegra spi devices do not have multiple clocks, no need to use clock name to get the clock. Signed-off-by: Prashant Gaikwad <[email protected]> Acked-by: Grant Likely <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra: remove legacy clock codePrashant Gaikwad11-7141/+0
Remove all legacy clock code from mach-tegra. Signed-off-by: Prashant Gaikwad <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra: migrate to new clock codePrashant Gaikwad21-142/+73
Migrate Tegra clock support to drivers/clk/tegra, this involves moving: 1. definition of tegra_cpu_car_ops to clk.c 2. definition of reset functions to clk-peripheral.c 3. change parent of cpu clock. 4. Remove legacy clock initialization. 5. Initialize clocks using DT. 6. Remove all instance of mach/clk.h Signed-off-by: Prashant Gaikwad <[email protected]> [swarren: use to_clk_periph_gate().] Signed-off-by: Stephen Warren <[email protected]>
2013-01-28clk: tegra: add clock support for Tegra30Prashant Gaikwad3-0/+2064
Add Tegra30 clock support based on common clock framework. Signed-off-by: Prashant Gaikwad <[email protected]> [swarren: ensure all OF lookups return valid cookies i.e. an explicit error pointer or valid pointer not NULL, adapt to renames in earlier patches, fixed some checkpatch issues.] Acked-by: Mike Turquette <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28clk: tegra: add clock support for Tegra20Prashant Gaikwad3-0/+1281
Add Tegra20 clock support based on common clock framework. Signed-off-by: Prashant Gaikwad <[email protected]> [swarren: s/1GHz/100MHz/ in call to tegra_clk_plle() to fix PCIe, implemented KBC clock, ensure all OF lookups return valid cookies i.e. an explicit error pointer or valid pointer not NULL, adapt to renames in earlier patches, fixed some checkpatch issues.] Acked-by: Mike Turquette <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28clk: tegra: add Tegra specific clocksPrashant Gaikwad11-0/+2126
Add Tegra specific clocks, pll, pll_out, peripheral, frac_divider, super. Signed-off-by: Prashant Gaikwad <[email protected]> [swarren: alloc sizeof(*foo) not sizeof(struct foo), add comments re: storing pointers to stack variables, make a timeout loop more idiomatic, use _clk_pll_disable() not clk_disable_pll() from _program_pll() to avoid redundant lock operations, unified tegra_clk_periph() and tegra_clk_periph_nodiv(), unified tegra_clk_pll{,e}, rename all clock registration functions so they don't have the same name as the clock structs, return -EINVAL from clk_plle_enable when matching table rate not found, pass ops to _tegra_clk_register_pll rather than a bool.] Acked-by: Mike Turquette <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra: define Tegra30 CAR bindingPrashant Gaikwad2-0/+268
The device tree binding models Tegra30 CAR (Clock And Reset) as a single monolithic clock provider. Signed-off-by: Prashant Gaikwad <[email protected]> [swarren: fixed typo in binding doc] Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra: define Tegra20 CAR bindingStephen Warren2-0/+211
The Tegra20 CAR (Clock And Reset) Controller controls most aspects of most clocks within Tegra20. The device tree binding models this as a single monolithic clock provider, which exports many clocks. This reduces the number of nodes needed in device tree to represent these clocks. This binding is only useful for Tegra20; the set of clocks that exists on Tegra30 is sufficiently different to merit its own binding. Signed-off-by: Stephen Warren <[email protected]> Acked-by: Simon Glass <[email protected]> [pgaikwad: Added mux clk ids and sorted CAR node] Signed-off-by: Prashant Gaikwad <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra: move tegra_cpu_car.h to linux/clk/tegra.hPrashant Gaikwad10-12/+12
tegra_cpu_car_ops struct is going to be accessed from drivers/clk/tegra. Move the tegra_cpu_car_ops to include/linux/clk/tegra.h. Signed-off-by: Prashant Gaikwad <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra: add function to read chipidPrashant Gaikwad2-1/+29
Add function to read chip id from APB MISC registers. This function will also get called from clock driver to flush write operations on apb bus. Signed-off-by: Prashant Gaikwad <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra: fix compile error when disable CPU_IDLEJoseph Lo1-1/+1
The "sleep.S" file has many functions that be shared by different module currently. Not just for CPU idle driver. Make it build as default now. Reported-by: Rhyland Klein <[email protected]> Signed-off-by: Joseph Lo <[email protected]> [swarren: add sleep.o to separate line so each line only contains 1 file] Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra30: make the wait time of CPU power up to proportional to HZJoseph Lo1-2/+2
It would rather to use the API of time_to_jiffies than a constant number of jiffies for the wait time of CPU power up. Based on the work by: Sang-Hun Lee <[email protected]> Signed-off-by: Joseph Lo <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra: make device can run on UPJoseph Lo6-223/+246
The reset handler code is used for either UP or SMP. To make Tegra device can compile for UP. It needs to be moved to another file that is not SMP only. This is because the reset handler also be needed by CPU idle "powered-down" mode. So we also need to put the reset handler init function in non-SMP only and init them always. And currently the implementation of the reset handler to know which CPU is OK to bring up was identital with "cpu_present_mask". But the "cpu_present_mask" did not initialize yet when the reset handler init function was moved to init early function. We use the "cpu_possible_mask" to replace "cpu_present_mask". Then it can work on both UP and SMP case. Signed-off-by: Joseph Lo <[email protected]> [swarren: dropped the move of v7_invalidate_l1() from one file to another, to avoid conflicts with Pavel's cleanup of this function, adjust Makefile so each line only contains 1 file.] Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: OMAP: Make use of available scu_a9_get_base() interfaceSantosh Shilimkar2-2/+1
Drop the define and make use of scu_a9_get_base() which reads the physical address of SCU from CP15 register. Signed-off-by: Santosh Shilimkar <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra: Skip scu_enable(scu_base) if not Cortex A9Hiroshi Doyu1-3/+2
Skip scu_enable(scu_base) if CPU is not Cortex A9 with SCU. Signed-off-by: Hiroshi Doyu <[email protected]> Acked-by: Russell King <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: Add API to detect SCU base address from CP15Hiroshi Doyu1-0/+17
Add API to detect SCU base address from CP15. Signed-off-by: Hiroshi Doyu <[email protected]> Acked-by: Russell King <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra: Use DT /cpu node to detect number of CPU coreHiroshi Doyu1-15/+0
SCU based detection only works with Cortex-A9 MP and it doesn't support ones with multiple clusters. The only way to detect number of CPU core correctly is with DT /cpu node. Tegra SoCs decided to use DT detection as the only way and to not use SCU based detection at all. Even if DT /cpu node based detection fails, it continues with a single core Signed-off-by: Hiroshi Doyu <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra: Add CPU nodes to Tegra30 device treeHiroshi Doyu1-0/+29
Add CPU node for Tegra30. Signed-off-by: Hiroshi Doyu <[email protected]> Reviewed-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra: Add CPU nodes to Tegra20 device treeHiroshi Doyu1-0/+17
Add CPU node for Tegra20. Signed-off-by: Hiroshi Doyu <[email protected]> Reviewed-by: Lorenzo Pieralisi <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28Merge remote-tracking branch 'korg_arm-soc/depends/rmk-perf' into ↵Stephen Warren6-49/+75
for-3.9/scu-base-rework
2013-01-28ARM: tegra: clean up the CPUINIT sectionJoseph Lo3-7/+5
There are some redundant codes in the CPUINIT section that was caused by some codes not be organized well in "headsmp.S". Currently all the codes in "headsmp.S" were put into CPUINIT section. But actually it doesn't need to be loacted in CPUINIT section. There is no fuction access them in CPUINIT section and we will relocate them to IRAM. These codes also caused some unnecessary functions that access these codes been put into CPUINIT section too. This patch clean it up and put them into normal text section. Signed-off-by: Joseph Lo <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra: moving the clock gating procedure to tegra_cpu_killJoseph Lo3-6/+13
The tegra_cpu_die was be executed by the CPU itslf. So the clock gating procedure won't be executed after the CPU hardware shutdown code. Moving the clock gating procedure to tegra_cpu_kill that will be run by another CPU after the CPU died. Signed-off-by: Joseph Lo <[email protected]> Acked-by: Peter De Schrijver <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra: update the cache maintenance order for CPU shutdownJoseph Lo5-9/+6
Updating the cache maintenance order before CPU shutdown when doing CPU hotplug. The old order: * clean L1 by flush_cache_all * exit SMP * CPU shutdown Adapt to: * disable L1 data cache by clear C bit * clean L1 by v7_flush_dcache_louis * exit SMP * CPU shutdown For CPU hotplug case, it's no need to do "flush_cache_all". And we should disable L1 data cache before clean L1 data cache. Then leaving the SMP coherency. Signed-off-by: Joseph Lo <[email protected]> Acked-by: Peter De Schrijver <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra30: fix power up sequence for boot_secondaryJoseph Lo1-1/+38
The power up sequence is different on the cold boot CPU and the CPU that resumed from the hotplug. For the cold boot CPU, it was been power gated as default. To power up the cold boot CPU, the power should be un-gated by un toggling the power gate register manually. For the CPU that resumed from the hotplug, after un-halted the CPU. The flow controller will un-gate the power of the CPU. No need to manually control, just wait the power be resumed and continue the power up sequence after the CPU power is ready. Based on the work by: Varun Wadekar <[email protected]> Signed-off-by: Joseph Lo <[email protected]> Acked-by: Peter De Schrijver <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra: cpufreq: move clk_get/put out of function tegra_cpu_init/exitRichard Zhao1-20/+20
tegra_cpu_init/exit will be called every time one cpu core is online or offline. And all cpu cores share same clocks, redundant clk_get/put wast time, so I move them out. Signed-off-by: Richard Zhao <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra: fix Kconfig warnings when !SMPStephen Warren1-2/+2
Fix: warning: (ARCH_TEGRA_2x_SOC) selects ARM_ERRATA_754327 which has unmet direct dependencies (CPU_V7 && SMP) warning: (ARCH_TEGRA_2x_SOC) selects ARM_ERRATA_742230 which has unmet direct dependencies (CPU_V7 && SMP) by selecting options only if SMP. Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra: Make variables staticHiroshi Doyu5-12/+12
No need to be public. Checked with: $ touch arch/arm/mach-tegra/*[ch] && make C=1 Signed-off-by: Hiroshi Doyu <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28clocksource: tegra: cosmetic: Fix error messageHiroshi Doyu1-1/+1
Add missing \n. Signed-off-by: Hiroshi Doyu <[email protected]> Signed-off-by: Stephen Warren <[email protected]>
2013-01-28ARM: tegra: move timer.c to drivers/clocksource/Stephen Warren7-9/+8
Move arch/arm/mach-tegra/timer.c to drivers/clocksource/tegra20_timer.c so that the code is co-located with other clocksource drivers, and to reduce the size of the mach-tegra directory. Signed-off-by: Stephen Warren <[email protected]>
2013-01-28Merge remote-tracking branch 'korg_arm-soc/timer/cleanup' into for-3.9/cleanupStephen Warren531-1510/+939
2013-01-28IOMMU, AMD Family15h Model10-1Fh erratum 746 WorkaroundSuravee Suthikulpanit1-0/+34
The IOMMU may stop processing page translations due to a perceived lack of credits for writing upstream peripheral page service request (PPR) or event logs. If the L2B miscellaneous clock gating feature is enabled the IOMMU does not properly register credits after the log request has completed, leading to a potential system hang. BIOSes are supposed to disable L2B micellaneous clock gating by setting L2_L2B_CK_GATE_CONTROL[CKGateL2BMiscDisable](D0F2xF4_x90[2]) = 1b. This patch corrects that for those which do not enable this workaround. Signed-off-by: Suravee Suthikulpanit <[email protected]> Acked-by: Borislav Petkov <[email protected]> Cc: [email protected] Signed-off-by: Joerg Roedel <[email protected]>
2013-01-28smp: Fix SMP function call empty cpu mask raceWang YanQing1-1/+12
I get the following warning every day with v3.7, once or twice a day: [ 2235.186027] WARNING: at /mnt/sda7/kernel/linux/arch/x86/kernel/apic/ipi.c:109 default_send_IPI_mask_logical+0x2f/0xb8() As explained by Linus as well: | | Once we've done the "list_add_rcu()" to add it to the | queue, we can have (another) IPI to the target CPU that can | now see it and clear the mask. | | So by the time we get to actually send the IPI, the mask might | have been cleared by another IPI. | This patch also fixes a system hang problem, if the data->cpumask gets cleared after passing this point: if (WARN_ONCE(!mask, "empty IPI mask")) return; then the problem in commit 83d349f35e1a ("x86: don't send an IPI to the empty set of CPU's") will happen again. Signed-off-by: Wang YanQing <[email protected]> Acked-by: Linus Torvalds <[email protected]> Acked-by: Jan Beulich <[email protected]> Cc: Paul E. McKenney <[email protected]> Cc: Andrew Morton <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: <[email protected]> Link: http://lkml.kernel.org/r/20130126075357.GA3205@udknight [ Tidied up the changelog and the comment in the code. ] Signed-off-by: Ingo Molnar <[email protected]>
2013-01-28GFS2: fix skip unlock conditionDavid Teigland1-1/+6
The recent commit fb6791d100d1bba20b5cdbc4912e1f7086ec60f8 included the wrong logic. The lvbptr check was incorrectly added after the patch was tested. Signed-off-by: David Teigland <[email protected]> Signed-off-by: Steven Whitehouse <[email protected]>
2013-01-28ALSA: hda - fix inverted internal mic on Acer AOA150/ZG5David Henningsson1-0/+1
This patch enables internal mic input on the machine. Cc: [email protected] BugLink: https://bugs.launchpad.net/bugs/1107477 Signed-off-by: David Henningsson <[email protected]> Signed-off-by: Takashi Iwai <[email protected]>
2013-01-27Merge tag 'imx-soc' of git://git.pengutronix.de/git/imx/linux-2.6 into next/socOlof Johansson7-23/+129
From Sascha Hauer: ARM i.MX SoC updates for next Mostly clock related updates, most notably the conversion of i.MX31 to a DT based lookup. * tag 'imx-soc' of git://git.pengutronix.de/git/imx/linux-2.6: ARM: clk-imx35: Fix build warnings with W=1 ARM: imx27: add a clock gate to activate SPLL clock ARM: mx31: Replace clk_register_clkdev with clock DT lookup ARM: clk-imx31: Add dummy clock ARM: Let CONFIG_MACH_IMX31_DT be built by default Signed-off-by: Olof Johansson <[email protected]>
2013-01-27Merge branch 'marco-timer-cleanup-rebase' of ↵Olof Johansson23-35/+1588
git://gitorious.org/sirfprima2-kernel/sirfprima2-kernel into next/soc From Barry Song, this adds support for a new SoC from CSR; marco. It's SMP, uses GIC instead of VIC and in general needs a bit of rework of the platform code for setup, which this branch contains. * 'marco-timer-cleanup-rebase' of git://gitorious.org/sirfprima2-kernel/sirfprima2-kernel: ARM: PRIMA2: provide two DEBUG_LL ports for prima2 and marco ARM: PRIMA2: add new SiRFmarco SMP SoC infrastructures ARM: PRIMA2: irq: make prima2 irq can work even we enable GIC for Marco ARM: PRIMA2: rtciobg: it is also compatible with marco ARM: PRIMA2: rstc: enable the support for Marco ARM: PRIMA2: mv timer to timer-prima2 as we will add timer-marco ARM: PRIMA2: initialize l2x0 according to mach from DT ARM: PRIMA2: enable AUTO_ZRELADDR for SIRF in Kconfig ARM: PRIMA2: add CSR SiRFmarco device tree .dts Signed-off-by: Olof Johansson <[email protected]>
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