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2023-09-28drm/amd: Move microcode init from sw_init to early_init for SDMA v6.0Mario Limonciello1-4/+5
As part of IP discovery early_init is run for all HW IP blocks. During this phase all firmware is supposed to be identified that may be missing so that the driver can avoid releasing resources used by the EFI framebuffer or simpledrm until the last possible moment. Move microcode loading from sw_init to early_init. Signed-off-by: Mario Limonciello <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-28drm/amd: Move microcode init from sw_init to early_init for SDMA v5.0Mario Limonciello1-4/+5
As part of IP discovery early_init is run for all HW IP blocks. During this phase all firmware is supposed to be identified that may be missing so that the driver can avoid releasing resources used by the EFI framebuffer or simpledrm until the last possible moment. Move microcode loading from sw_init to early_init. Signed-off-by: Mario Limonciello <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-28drm/amd/display: Fix null pointer dereference in error messageCong Liu1-2/+1
This patch fixes a null pointer dereference in the error message that is printed when the Display Core (DC) fails to initialize. The original message includes the DC version number, which is undefined if the DC is not initialized. Fixes: 9788d087caff ("drm/amd/display: improve the message printed when loading DC") Signed-off-by: Cong Liu <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-28drm/amd/display: Create one virtual connector in DCHarry Wentland2-3/+11
[WHAT] Prepare a virtual connector for writeback. Reviewed-by: Alex Hung <[email protected]> Signed-off-by: Harry Wentland <[email protected]> Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-28drm/amd: Drop error message about failing to load SDMA firmwareMario Limonciello8-24/+8
The error path for SDMA firmware loading is unnecessarily noisy. When a firmware is missing 3 errors show up: ``` amdgpu 0000:07:00.0: Direct firmware load for amdgpu/green_sardine_sdma.bin failed with error -2 [drm:sdma_v4_0_early_init [amdgpu]] *ERROR* Failed to load sdma firmware! [drm:amdgpu_device_init [amdgpu]] *ERROR* early_init of IP block <sdma_v4_0> failed -19 ``` The error code for the device init is bubbled up already, remove the second one. Signed-off-by: Mario Limonciello <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-28drm/amd/pm: fix the print_clk_levels issue for SMU v13.0.6Le Ma1-12/+12
Pass the correct size to smu_v13_0_6_print_clks, otherwise the same place in buf will be re-written. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-28drm/amd/pm: deprecate allow_xgmi_power_down interfaceLe Ma5-43/+2
Replace with set_plpd_mode uniformly for places to use. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-28drm/amd/pm: integrate plpd allow/disallow into select_xgmi_plpd_policy in ↵Le Ma3-28/+38
ppt level The allow_xgmi_power_down(true/false) will be generally replaced by: - allow: select_xgmi_plpd_policy(XGMI_PLPD_DEFAULT) - disallow: select_xgmi_plpd_policy(XGMI_PLPD_DISALLOW) Signed-off-by: Le Ma <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-28drm/amd/pm: init plpd_mode properly for different asicsLe Ma1-0/+17
Assign DEFAULT mode if it supports plpd, otherwise keeps NONE v2: reduce ip version checks Signed-off-by: Le Ma <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-28drm/amd/display: Remove unused DPCD declarationsStylon Wang1-58/+1
[Why & How] These DPCD addresses are either declared in other header files where it makes more sense or simply not used by any DC code. Remove them to reduce redundancies and potential confusion. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Stylon Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-28drm/amd/display: Skip entire amdgpu_dm build if !CONFIG_DRM_AMD_DCHarry Wentland1-5/+8
[WHY] Previously this only excluded build for a few amdgpu_dm binaries which makes no sense. [HOW] Wrap the entire Makefile in "ifneq ($(CONFIG_DRM_AMD_DC),)" Reviewed-by: Alex Hung <[email protected]> Signed-off-by: Harry Wentland <[email protected]> Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-28drm/amd: Limit seamless boot by default to APUsMario Limonciello1-0/+3
A hang is reported on DCN 3.2 with seamless boot enabled. As the benefits come from an eDP setup, limit it to only enabled by default with APUs. Suggested-by: [email protected] Reported-by: [email protected] Closes: https://lore.kernel.org/amd-gfx/[email protected]/T/#m2887e919d7c01b2a4860d2261b366d22e070f309 Signed-off-by: Mario Limonciello <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd: Drop error message about failing to load DMUB firmwareMario Limonciello1-2/+0
The error path for DMUB firmware loading is unnecessarily noisy. When a firmware is missing 3 errors show up: ``` amdgpu 0000:07:00.0: Direct firmware load for amdgpu/green_sardine_dmcub.bin failed with error -2 [drm:dm_early_init [amdgpu]] *ERROR* DMUB firmware loading failed: -19 [drm:amdgpu_device_init [amdgpu]] *ERROR* early_init of IP block <dm> failed -19 ``` The error code for the device init is bubbled up already, remove the second one. Signed-off-by: Mario Limonciello <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amdkfd: Handle errors from svm validate and mapPhilip Yang2-44/+39
If new range is splited to multiple pranges with max_svm_range_pages alignment and added to update_list, svm validate and map should keep going after error to make sure prange->mapped_to_gpu flag is up to date for the whole range. svm validate and map update set prange->mapped_to_gpu after mapping to GPUs successfully, otherwise clear prange->mapped_to_gpu flag (for update mapping case) instead of setting error flag, we can remove the redundant error flag to simpliy code. Refactor to remove goto and update prange->mapped_to_gpu flag inside svm_range_lock, to guarant we always evict queues or unmap from GPUs if there are invalid ranges. After svm validate and map return error -EAGIN, the caller retry will update the mapping for the whole range again. Fixes: c22b04407097 ("drm/amdkfd: flag added to handle errors from svm validate and map") Signed-off-by: Philip Yang <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Tested-by: James Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/pm: add xgmi_plpd_policy sysfs node for user to change plpd policyLe Ma3-0/+116
Add xgmi_plpd_policy sysfs node for users to check and select xgmi per-link power down policy: - arg 0: disallow plpd - arg 1: default policy - arg 2: optimized policy v2: split from smu v13.0.6 code and miscellaneous updates v3: add usage comments around set/get functions Signed-off-by: Le Ma <[email protected]> Reviewed-by: Asad Kamal <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/pm: add xgmi plpd mode selecting interface for smu v13.0.6Le Ma4-1/+66
Add the interface to change xgmi per-link power down policy. v2: split from sysfs interface code and miscellaneous updates v3: check against XGMI_PLPD_DEFAULT/XGMI_PLPD_OPTIMIZED and pass PPSMC param Signed-off-by: Le Ma <[email protected]> Reviewed-by: Asad Kamal <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/pm: add plpd_mode in smu_context to indicate current modeLe Ma2-0/+10
Add enum pp_xgmi_plpd_mode to describe PLPD policies. v2: move the enum from amdgpu_smu.h to kgd_pp_interface.h Signed-off-by: Le Ma <[email protected]> Reviewed-by: Asad Kamal <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/pm: update pmfw headers for version 85.73.0Le Ma1-0/+5
To add message to select PLPD mode. Signed-off-by: Le Ma <[email protected]> Reviewed-by: Asad Kamal <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amdgpu: Add description for AMD_IP_BLOCK_TYPE_VPEJuntong Deng1-0/+1
AMD_IP_BLOCK_TYPE_VPE is a new IP BLOCK type for Video Processing Engine, but currently lacks description. Fix the documentation warning: warning: Enum value 'AMD_IP_BLOCK_TYPE_VPE' not described in enum 'amd_ip_block_type' Signed-off-by: Juntong Deng <[email protected]> Reviewed-by: Lang Yu <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/display: Change dc_set_power_state() to bool instead of intMario Limonciello3-8/+13
DC code is reused by other OSes and so Linux return codes don't make sense. Change dc_set_power_state() to boolean and add a wrapper dm_set_power_state() to return a Linux error code for the memory allocation failure. Suggested-by: Harry Wentland <[email protected]> Signed-off-by: Mario Limonciello <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amdgpu/gmc11: disable AGP on GC 11.5Alex Deucher1-1/+2
AGP aperture is deprecated and no longer functional. v2: fix typo (Alex) v3: just skip the agp setup call v4: revert back to the original model v5: back to v3 Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amdgpu: not to save bo in the case of RAS err_event_athubDavid (Ming Qiang) Wu1-0/+7
err_event_athub will corrupt VCPU buffer and not good to be restored in amdgpu_vcn_resume() and in this case the VCPU buffer needs to be cleared for VCN firmware to work properly. Acked-by: Leo Liu <[email protected]> Signed-off-by: David (Ming Qiang) Wu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amdgpu: Fix a memory leakLuben Tuikov1-0/+1
Fix a memory leak in amdgpu_fru_get_product_info(). Cc: Alex Deucher <[email protected]> Reported-by: Yang Wang <[email protected]> Fixes: 0dbf2c562625 ("drm/amdgpu: Interpret IPMI data for product information (v2)") Signed-off-by: Luben Tuikov <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd: Propagate failures in dc_set_power_state()Mario Limonciello3-9/+14
During the suspend process dc_set_power_state() will use kzalloc to allocate memory, but this potentially fails with memory pressure. If it fails, the suspend should be aborted. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2362 Signed-off-by: Mario Limonciello <[email protected]> Reviewed-by: Christian König <[email protected]> Cc: [email protected] Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/display: set stream gamut remap matrix to MPC for DCN3+Melissa Wen8-6/+46
dc->caps.color.mpc.gamut_remap says there is a post-blending color block for gamut remap matrix for DCN3 HW family and newer versions. However, those drivers still follow DCN10 programming that remap stream gamut_remap_matrix to DPP (pre-blending). To enable pre-blending and post-blending gamut_remap matrix supports at the same time, set stream gamut_remap to MPC and plane gamut_remap to DPP for DCN families that support both. It was tested using IGT KMS color tests for DRM CRTC CTM property and it preserves test results. Signed-off-by: Melissa Wen <[email protected]> Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amdgpu/gmc: set a default disable value for AGPAlex Deucher10-18/+37
To disable AGP, the start needs to be set to a higher value than the end. Set a default disable value for the AGP aperture and allow the IP specific GMC code to enable it selectively be calling amdgpu_gmc_agp_location(). Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amdgpu/gmc6-8: properly disable the AGP apertureAlex Deucher3-3/+3
The BOT register needs to be larger than the TOP register for this to be properly disabled. The lower 22 bits of the BOT address are always 0 and the lower 22 bits of the TOP register are always 1 so you need to make the upper bits of BOT larger than the upper bits of BOT. Reviewed-by: Christian König <[email protected]> Reviewed-by: Yang Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amdgpu:Expose physical id of device in XGMI hiveMangesh Gadre1-0/+20
This identifies the physical ordering of devices in the hive v2: fix compilation issue Signed-off-by: Mangesh Gadre <[email protected]> Reviewed-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/display: Break after finding supported vlevel for repopulateAlvin Lee1-0/+1
[Description] After repopulating pipes for a split / merge, we want to find the lowest vlevel that supports the desired mpc combine level. Reviewed-by: Nevenko Stupar <[email protected]> Reviewed-by: Dillon Varone <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/display: Update OPP counter from new interfaceHong-lu Cheng1-1/+1
[Description] Change to new interface for notifying OS of cursor support changes Reviewed-by: Gang Chu <[email protected]> Reviewed-by: Jaina Han <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Hong-lu Cheng <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/display: augment display clock in dc_cap structureMax Tseng3-0/+5
[Why] Allow dc report maximum display clock possible at vmin Reviewed-by: Wayne Lin <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Max Tseng <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/display: 3.2.253Aric Cyr1-1/+1
This version brings along the following: - Fix incorrect odm change detection logic - Add primary pipe check when building slice table for dcn3x - Add get primary dpp pipe resource interface - Add missing function pointer for DCN321 resource - Rename DisableMinDispClkODM in dc_config - Break after finding supported vlevel for repopulate - Update OPP counter from new interface - Augment display clock in dc_cap structure - Improve code style on bios_parser2 - Skip audio config for virtual signal - Block MPO if it prevents pstate support - Fix DP2.0 timing sync - Improve x86 and dmub ips handshake - Remove guaranteed viewports limitation for odm - Add new windowed mpo odm minimal transition sequence - Reset stream slice count for new ODM policy - Determine fast update only before commit minimal transition state - Remove unused mmhub_reg_offsets Acked-by: Wayne Lin <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/display: fix incorrect odm change detection logicWenjing Liu3-6/+35
[why] The current ODM change detection only compares first two ODM slices. If there are 4 ODM slices and the change is within the last two slices, the logic fails to detect ODM change and cause us to skip ODM programming unexpectedly. [how] Add a is ODM topology changed resource interface to check any ODM topology changes with a more generic method. Reviewed-by: Dillon Varone <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/display: add primary pipe check when building slice table for dcn3xWenjing Liu1-6/+10
[why] There is a corner use case where the same plane pointer can be added into dc state twice. In addition to plane state pointer check we also need to match primary pipe before identifying the same plane. Reviewed-by: Dillon Varone <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/display: add get primary dpp pipe resource interfaceWenjing Liu2-0/+20
[why] Need to have a helper function to find the primary dp pipe of the plane associated with a dpp pipe Reviewed-by: Dillon Varone <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/display: add missing function pointer for DCN321 resourceWenjing Liu1-0/+1
[why] acquire_free_pipe_as_secondary_opp_head function pointer is not assigned. This causes ODM mode to be disabled after enabling windowed MPO ODM capability on DCN321. [how] assign the correct function to the function pointer. Reviewed-by: Dillon Varone <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/display: Rename DisableMinDispClkODM in dc_configGabe Teeger1-1/+1
[what and why] The logic for DisableMinDispClkODM is reversed now that odm is disabled by default. Renaming to EnableMinDispClkODM. Reviewed-by: Charlene Liu <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Gabe Teeger <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amdgpu/vpe: fix truncation warningsLang Yu1-4/+1
Fix truncation warnings. Fixes: 9d4346bdbc64 ("drm/amdgpu: add VPE 6.1.0 support") Signed-off-by: Lang Yu <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Reported-by: kernel test robot <[email protected]> Link: https://lore.kernel.org/oe-kbuild-all/[email protected] Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/display: Improve code style on bios_parser2Rodrigo Siqueira1-20/+17
bios_parser2 uses space instead of tabs in multiple areas; this commit converts those spaces into tabs. It also removes some other small details. Reviewed-by: Aurabindo Pillai <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/display: Remove unwanted drm edid referencesAlex Hung1-19/+23
[WHY] edid_override and drm_edid_override_connector_update, according to drm documentation, should not be referred outside drm_edid. [HOW] Remove and replace them accordingly. This can tested by IGT's kms_hdmi_inject test. Reviewed-by: Harry Wentland <[email protected]> Acked-by: Jani Nikula <[email protected]> Signed-off-by: Alex Hung <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/display: switch DC over to the new DRM logging macrosHamza Mahfooz39-225/+236
For multi-GPU systems it is difficult to tell which GPU a particular message is being printed for and that is undesirable because it complicates debugging efforts. Also, the new macros allow us to enable logging for particular parts of the codebase more selectively (since we no longer need to throw everything at DRM_DEBUG_KMS()). So, for the reasons outlined above we should switch to the new macros. We can accomplish this by using the existing DC_LOGGER code to pass around the relevant `struct drm_device` which will be fed to the new macros in logger_types.h. Also, we must get rid of all instances of the DC_LOG_.*() functions that are currently in amdgpu_dm since we don't use the DC logger there and we can simply refer to the macros directly there instead. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/display: skip audio config for virtual signalAlex Hung1-0/+4
[WHY & HOW] IGT's kms_hdmi_inject (subtest inject_audio) triggers a warning message from dce_aud_az_configure. This can be fixed by checking Virtual signal that does not need to configure AZ audio since it does not have any. Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Alex Hung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/pm: Add reset option for fan_curve on smu13_0_0Ma Jun2-4/+47
Add reset option for fan_curve. User can use command "echo r > fan_cure" to reset the fan_curve to boot value Signed-off-by: Ma Jun <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/display: block MPO if it prevents pstate supportDmytro Laktyushkin3-2/+25
This change adds a method to block mpo when it would cause us to exit pstate support. We should block mpo by default where MPO causes issues by preventing pstate change. Reviewed-by: Jun Lei <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Dmytro Laktyushkin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/display: Fix DP2.0 timing syncIlya Bakoulin5-31/+55
[Why] Triggering OTG sync before all OTG/HPO clock programming is complete causes timing sync to fail and a subsequent P-state hang. [How] Move DTB clock programming earlier in the sequence to enable_stream_timing. Reviewed-by: Ariel Bernstein <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Ilya Bakoulin <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/display: Improve x86 and dmub ips handshakeDuncan Ma11-28/+130
[Why] There is a race condition between x86 and dmcub fw when attempting to exit IPS2. Scenarios including exiting IPS2 before IPS2 has been entered. This can cause unexpected hang when DMCUB attempt to exit while PMFW still tries to enter IPS2. [How] A new design has been introduced to remove race conditions and improve the handshake between x86 and DMCUB. An AON scratch register is borrowed from PMFW to determine whether DMCUB has committed to IPS entry or not. In the case when dmcub has committed IPS entry, x86 must poll until an exit event occurred either from DMCUB(IPS1) or PMFW(IPS2). x86 will wait upperbound of evaluation and IPS entry time to ensure IPS2 exit event has been sent to PMFW. Reviewed-by: Charlene Liu <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Duncan Ma <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/display: remove guaranteed viewports limitation for odmWenjing Liu2-61/+0
[why] With the more generic hw minimal state transition sequence, this limitation has been overcome. Reviewed-by: Aric Cyr <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/display: add new windowed mpo odm minimal transition sequenceWenjing Liu2-56/+207
[why] We do not have a programming sequence to support seamless transition between MPC combine to ODM combine when plane count remains the same. This can happen with windowed MPO ODM use cases when plane scaling is changed over ODM Combine's capability. [How] We are adding a programming sequence specifically to handle the transition between MPC combine and ODM combine during plane scaling change. Reviewed-by: Aric Cyr <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/display: reset stream slice count for new ODM policyWenjing Liu1-0/+9
[why] ODM combine could prevent us from supporting more planes we will reset ODM slice count back to 1 when all planes have been removed to maximize the amount of planes supported when new planes are added. [how] reset ODM slice count when all planes are removed. Reviewed-by: Aric Cyr <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/display: determine fast update only before commit minimal transition ↵Wenjing Liu1-2/+4
state [why] commit minimal transition state would update current state to new state with surface and stream update applied. If we determine fast update only after we have committed the minimal transition state based on new state, we will skip committing the full new state. [how] determine fast update only earlier based on the actaul currents state. Only skip full commit when the transition between actual current state and new state is fast update only. Reviewed-by: Aric Cyr <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>