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2018-09-26drm/amdkfd: Add wavefront context save state retrieval ioctlJay Cornwall9-1/+159
Wavefront context save data is of interest to userspace clients for debugging static wavefront state. The MQD contains two parameters required to parse the control stack and the control stack itself is kept in the MQD from gfx9 onwards. Add an ioctl to fetch the context save area and control stack offsets and to copy the control stack to a userspace address if it is kept in the MQD. Signed-off-by: Jay Cornwall <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amdkfd: Report SDMA firmware version in the topologyFelix Kuehling3-3/+11
Also save the version in struct kfd_dev so we only need to query it once. Signed-off-by: Philip Yang <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amdgpu: Enable BAD_OPCODE intr for gfx8Harish Kasiviswanathan1-1/+2
This enables KFD_EVENT_TYPE_HW_EXCEPTION notifications to user mode in response to bad opcodes in a CP queue. Signed-off-by: Harish Kasiviswanathan <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amdkfd: KFD doesn't support TONGA SRIOVEmily Deng1-16/+0
KFD module doesn't support TONGA SRIOV, if init KFD module in TONGA SRIOV environment, it will let compute ring IB test fail. Signed-off-by: Emily Deng <[email protected]> Reviewed-by: Shaoyun.liu <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amdkfd: reflect atomic support in IO link propertiesEric Huang3-12/+39
Add the flags of properties according to Asic type and pcie capabilities. Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Felix Kuehling <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amdgpu: Add warning message for INT SW fallback.Andrey Grodzovsky1-0/+1
Signed-off-by: Andrey Grodzovsky <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26Revert "drm/amdgpu: remove fence fallback"Andrey Grodzovsky3-0/+58
This reverts commit 9b0df0937a852d299fbe42a5939c9a8a4cc83c55. This commit breaks KCQ IB test and S3 on Polaris 11. Signed-off-by: Andrey Grodzovsky <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amdgpu:No action when VCN PG state is unchangedJames Zhu2-2/+11
When VCN PG state is unchanged, it is unnecessary to reset power gate state Signed-off-by: James Zhu <[email protected]> Acked-by: Alex Deucher <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amd/display: remove redundant null pointer check before kfreezhong jiang1-6/+2
kfree has taken the null pointer into account. hence it is safe to remove the redundant null pointer check before kfree. Signed-off-by: zhong jiang <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amdgpu: print smc feature mask in debugfs amdgpu_pm_infoAlex Deucher1-0/+5
Print the enabled smc feature mask in amdgpu_pm_info for debugging. Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amdgpu: implement ENABLED_SMC_FEATURES_MASK sensor for vega20Alex Deucher1-0/+5
So we can query what features are enabled for debugging. Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amdgpu: implement ENABLED_SMC_FEATURES_MASK sensor for vega12Alex Deucher1-1/+5
So we can query what features are enabled for debugging. Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amdgpu: implement ENABLED_SMC_FEATURES_MASK sensor for vega10Alex Deucher3-4/+11
So we can query what features are enabled for debugging. Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amdgpu: add new AMDGPU_PP_SENSOR_ENABLED_SMC_FEATURES_MASK sensorAlex Deucher1-0/+1
For getting the 64 bit enabled smc feature mask from vega parts. Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amdgpu/powerplay: add smu smc_table_manager callback for vega20Alex Deucher3-24/+34
For consistency with other asics. Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amdgpu/powerplay: add smu smc_table_manager callback for vega12Alex Deucher3-12/+22
For consistency with other asics. Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amdgpu/powerplay: Move vega10_enable_smc_featuresAlex Deucher6-12/+15
to vega10_smumgr.c. For consistency with other vega parts. Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amdgpu/powerplay: add get_argument callback for vega20Alex Deucher4-32/+15
For consistency with other vega parts. Reviewed-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amd/display: Raise dispclk value for dce120 by 15%Nicholas Kazlauskas1-0/+3
[Why] The DISPCLK value was previously requested to be 15% higher for all ASICs that went through the dce110 bandwidth code path. As part of a refactoring of dce_clocks and the dce110 set bandwidth codepath this was removed for power saving considerations. That change caused display corruption under certain hardware configurations with Vega10. [How] The 15% DISPCLK increase is brought back but only on dce110 for now. This is should be a temporary workaround until the root cause is sorted out for why this occurs on Vega (or other ASICs, if reported). Tested-by: Nick Sarnie <[email protected]> Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amd/display: fix gamma not being appliedSivapiriyanKumarasamy1-5/+14
[WHY] Previously night light forced a full update by applying a transfer function update regardless of if it was changed. This logic was removed, Now gamma surface updates are only applied when there is also a plane info update, this does not work in cases such as using the night light slider. [HOW] When moving the night light slider we will perform a full update if the gamma has changed and there is a surface, even when the surface has not changed. Also get stream updates in setgamma prior to update planes and stream. Signed-off-by: SivapiriyanKumarasamy <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amd/display: Remove mst_hotplug_workLeo Li2-12/+0
[Why] The work struct's schedule call was removed a while ago, making this useless. [How] Remove it. Signed-off-by: Leo Li <[email protected]> Reviewed-by: David Francis <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amd/display: Guard against null stream dereference in do flipNicholas Kazlauskas1-1/+14
[Why] During suspend under some hardware configurations can result in a series of atomic commits with a NULL stream status - which causes a NULL pointer dereference. This should be guarded. [How] Exit early from the function - if we can't access the stream then there isn't anything that can be done here. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amd/display: Stereo 3D support in VSCEric Bernstein1-4/+54
[Why] Need to add strere 3D information in VSC [How] Update mod_build_vsc_infopacket with stereo info Signed-off-by: Eric Bernstein <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amd/display: dc 3.1.67Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Steven Chiu <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amd/display: program v_update and v_ready with proper fieldSu Sung Chung3-13/+13
[WHY] There are two different variables used to calculate v_update and v_ready, one for validation and the other for performance parameter calculation. Before the variable for validation was used which caused underflow on 1080edp with vsr enabled [HOW] program v_update and v_ready with the variables for performance parameter calculation Signed-off-by: Su Sung Chung <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amd/display: Add color bit info to freesync infoframeSivapiriyanKumarasamy4-21/+198
Parse the native color bit and send it to freesync module for future use Signed-off-by: SivapiriyanKumarasamy <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amd/display: add pp_smu NULL pointer checkCharlene Liu1-1/+1
add pp_smu NULL ptr check Signed-off-by: Charlene Liu <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amd/display: use proper pipe_ctx indexSamson Tam1-2/+18
Use link->link_index as index to pipe_ctx[] to get proper link information instead of using index 0 to avoid potential miss matches. Signed-off-by: Samson Tam <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amd/display: Refactor FPGA-specific link setupNikola Cornij3-40/+32
FPGA doesn't program backend, so we don't need certain link settings (audio stream for example). Signed-off-by: Nikola Cornij <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amd/pp: Return error immediately if load firmware failedRex Zhu1-4/+6
this can avoid hard hang and be useful for debug. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amd/pp: Honour DC's clock limits on RvRex Zhu1-8/+17
Honour display's request for min engine clock/memory clock. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-26drm/amd/dc: Trigger set power state task when display configuration changesRex Zhu1-0/+2
Revert "drm/amd/display: Remove call to amdgpu_pm_compute_clocks" This reverts commit dcd473770e86517543691bdb227103d6c781cd0a. when display configuration changes, dc need to update the changes to powerplay, also need to trigger a power state task. amdgpu_pm_compute_clocks is the interface to set power state task either dpm enabled or powerplay enabled Acked-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-09-27BackMerge v4.19-rc5 into drm-nextDave Airlie805-4518/+8350
Sean Paul requested an -rc5 backmerge from some sun4i fixes. Signed-off-by: Dave Airlie <[email protected]>
2018-09-27Merge tag 'drm-hisilicon-next-2018-09-26' of github.com:xin3liang/linux into ↵Dave Airlie5-27/+12
drm-next - A crash fix founded in recent linux-next from John Garry - One sparse warning fix from Souptick Joarder - Some xxx_unref cleanup from Thomas Zimmermann Signed-off-by: Dave Airlie <[email protected]> From: Xinliang Liu <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/CAGd==04mXPMjVZ3=cM8r+DSQNM6zy7Anc4T2OsHjZgSsazBTPQ@mail.gmail.com
2018-09-27Merge tag 'du-next-20180925' of git://linuxtv.org/pinchartl/media into drm-nextDave Airlie11-147/+595
R-Car DU support for the D3 and E3 SoCs (v4.20) Signed-off-by: Dave Airlie <[email protected]> From: Laurent Pinchart <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/3289904.RCOHkcp7u8@avalon
2018-09-26drm/fsl-dcu: Replace drm_dev_unref with drm_dev_putThomas Zimmermann1-4/+4
This patch unifies the naming of DRM functions for reference counting of struct drm_device. The resulting code is more aligned with the rest of the Linux kernel interfaces. Signed-off-by: Thomas Zimmermann <[email protected]> Signed-off-by: Stefan Agner <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-09-26MAINTAINERS: Move fsl-dcu driver to drm-misc treeStefan Agner1-0/+1
The driver is mostly in maintenance mode. Using drm-misc is a good fit and should make maintenance a bit easier. Signed-off-by: Stefan Agner <[email protected]> Acked-by: Sean Paul <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-09-26drm/mxsfb: Switch to drm_atomic_helper_commit_tail_rpmLeonard Crestez1-0/+15
The lcdif block is only powered on when display is active so plane updates when not enabled are not valid. Writing to an unpowered IP block is mostly ignored but can trigger bus errors on some chips. Prevent this situation by switching to drm_atomic_helper_commit_tail_rpm and having the drm core ensure atomic_plane_update is only called while the crtc is active. This avoids having to keep track of "enabled" bits inside the mxsfb driver. This also requires handling the vblank event for disable from mxsfb_pipe_disable. Signed-off-by: Leonard Crestez <[email protected]> Suggested-by: Stefan Agner <[email protected]> Reviewed-by: Stefan Agner <[email protected]> Reviewed-by: Sean Paul <[email protected]> Signed-off-by: Stefan Agner <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/c19c0c00ed42e8e8f7965aa4821ac295abc5cd05.1537191359.git.leonard.crestez@nxp.com
2018-09-26drm/mxsfb: Add PM_SLEEP supportLeonard Crestez1-0/+21
Since power to the lcdif block can be lost on suspend implement PM_SLEEP_OPS using drm_mode_config_helper_suspend/resume to save/restore the current mode. Signed-off-by: Leonard Crestez <[email protected]> Reviewed-by: Stefan Agner <[email protected]> Reviewed-by: Sean Paul <[email protected]> Signed-off-by: Stefan Agner <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/cfa1a4083eefd112362e640deeb2e120584ac3f5.1537191359.git.leonard.crestez@nxp.com
2018-09-26drm/mxsfb: Add pm_runtime calls to pipe_enable/disableLeonard Crestez1-0/+4
Adding lcdif nodes to a power domain currently results in black/corrupted screens or hangs because power is not correctly enabled when required. Ensure power is on when display is active by adding pm_runtime_get/put_sync to mxsfb_pipe_enable/disable. Signed-off-by: Leonard Crestez <[email protected]> Reviewed-by: Stefan Agner <[email protected]> Reviewed-by: Sean Paul <[email protected]> Signed-off-by: Stefan Agner <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/ee88148399c63494cda4129b05444b0ac331b7a7.1537191359.git.leonard.crestez@nxp.com
2018-09-26drm/mxsfb: Fix initial corrupt frame when activating displayLeonard Crestez1-13/+32
LCDIF will repeatedly display data from CUR_BUF and set CUR_BUF to NEXT_BUF when done. Since we are only ever writing to NEXT_BUF the display will show an initial corrupt frame. Fix by writing the FB paddr to both CUR_BUF and NEXT_BUF when activating the CRTC. Signed-off-by: Leonard Crestez <[email protected]> Tested-by: Philipp Zabel <[email protected]> Reviewed-by: Stefan Agner <[email protected]> Reviewed-by: Sean Paul <[email protected]> Signed-off-by: Stefan Agner <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/7cdac9c064cc2b8a3d237934f186da98cefe6cb3.1537191359.git.leonard.crestez@nxp.com
2018-09-26drm/mxsfb: Move axi clk enable/disable to crtc enable/disableLeonard Crestez1-6/+2
The main axi clk is disabled at the end of mxsfb_crtc_mode_set_nofb and immediately reenabled in mxsfb_enable_controller. Avoid this by moving the handling of axi clk one level up to mxsfb_crtc_enable. Do the same for mxsfb_crtc_disable for symmetry. This shouldn't have any functional effect. Signed-off-by: Leonard Crestez <[email protected]> Reviewed-by: Stefan Agner <[email protected]> Reviewed-by: Sean Paul <[email protected]> Signed-off-by: Stefan Agner <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/985c1f1cad250bd9ca154b3e4b3f913c310eeabd.1537191359.git.leonard.crestez@nxp.com
2018-09-26drm/tegra: Detach devices from IOMMU DMA domain on arm32Dmitry Osipenko1-0/+12
All Tegra DRM devices are getting attached to an implicit IOMMU DMA domain if CONFIG_ARM_DMA_USE_IOMMU=y. Since Tegra DRM driver manages IOMMU by itself, the devices must be detached from the implicit domain using arch-specific IOMMU-API. Note that this works only for arm32 and not for arm64, which will remain broken if CONFIG_IOMMU_DMA is enabled. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2018-09-26gpu: host1x: Detach Host1x from IOMMU DMA domain on arm32Dmitry Osipenko1-1/+12
Host1x is getting attached to an implicit IOMMU DMA domain if CONFIG_ARM_DMA_USE_IOMMU=y. Since Host1x driver manages IOMMU by itself, Host1x device must be detached from the implicit domain using arch-specific IOMMU-API. Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2018-09-26drm/tegra: Replace drm_dev_unref with drm_dev_putThomas Zimmermann1-5/+5
This patch unifies the naming of DRM functions for reference counting of struct drm_device. The resulting code is more aligned with the rest of the Linux kernel interfaces. Signed-off-by: Thomas Zimmermann <[email protected]> Signed-off-by: Thierry Reding <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2018-09-26gpu: host1x: Remove spurious tabThierry Reding1-1/+1
All other assignments have a single space around the = sign, so remove the spurious tab for consistency. Signed-off-by: Thierry Reding <[email protected]>
2018-09-26drm/tegra: sor: Add Tegra194 supportThierry Reding2-0/+111
The SOR implemented in Tegra194 is subtly different from its predecessor found in Tegra186. Most notably some registers have been moved around so it is no longer compatible. Signed-off-by: Thierry Reding <[email protected]>
2018-09-26drm/tegra: dpaux: Add Tegra194 supportThierry Reding1-0/+1
The DPAUX controller found on Tegra194 is almost identical to its predecessor from Tegra186. Signed-off-by: Thierry Reding <[email protected]>
2018-09-26drm/tegra: dc: Add Tegra194 supportThierry Reding3-1/+53
The display controllers found on Tegra194 are almost identical to those found on Tegra186. Signed-off-by: Thierry Reding <[email protected]>
2018-09-26drm/tegra: hub: Add Tegra194 supportThierry Reding3-4/+17
The display hub integrated into Tegra194 is almost identical to the one found on Tegra186. However, it doesn't support DSC (display stream compression) so it isn't fully compatible. Signed-off-by: Thierry Reding <[email protected]>
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