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2014-03-26MIPS: lib: memset: Add EVA support for the __bzero function.Markos Chandras1-4/+23
Build the __bzero function using the EVA load/store instructions when operating in the EVA mode. This function is only used when accessing user code so there is no need to build two distinct symbols for user and kernel operations respectively. Signed-off-by: Markos Chandras <[email protected]>
2014-03-26MIPS: lib: memset: Use macro to build the __bzero symbolMarkos Chandras1-35/+60
Build the __bzero symbol using a macor. In EVA mode we will need to use similar code to do the userspace load operations so it is better if we use a macro to avoid code duplications. Signed-off-by: Markos Chandras <[email protected]>
2014-03-26MIPS: lib: memset: Whitespace fixesMarkos Chandras1-15/+15
Signed-off-by: Markos Chandras <[email protected]>
2014-03-26MIPS: lib: memcpy: Add EVA supportMarkos Chandras2-0/+83
Add copy_{to,from,in}_user when the CPU operates in EVA mode. This is necessary so the EVA specific instructions can be used to perform the virtual to physical translation for user space addresses. We will use the non-EVA functions to read from kernel if needed. Signed-off-by: Markos Chandras <[email protected]>
2014-03-26MIPS: lib: memcpy: Use macro to build the copy_user codeMarkos Chandras1-110/+143
The code can be shared between EVA and non-EVA configurations, therefore use a macro to build it to avoid code duplications. Signed-off-by: Markos Chandras <[email protected]>
2014-03-26MIPS: lib: memcpy: Split source and destination prefetch macrosMarkos Chandras1-14/+22
In preparation for EVA support, the PREF macro is split into two separate macros, PREFS and PREFD, for source and destination data prefetching respectively. Signed-off-by: Markos Chandras <[email protected]>
2014-03-26MIPS: lib: memcpy: Merge EXC and load/store macrosMarkos Chandras1-69/+89
Each load/store macro always adds an entry to the __ex_table using the EXC macro. Therefore, these load/store macros are now merged with the EXC one. The argument list is also expanded in order to make the macro more flexible. The extra 'type' argument is not used by this commit, but it will be used when the EVA support is added to the memcpy. Signed-off-by: Markos Chandras <[email protected]>
2014-03-26MIPS: lib: strncpy_user: Add EVA supportMarkos Chandras2-0/+25
In non-EVA mode, strncpy_from_user* aliases are used for the strncpy_from_kernel* symbols since the code is identical. In EVA mode, new strcpy_from_user* symbols are used which use the EVA specific instructions to load values from userspace. Signed-off-by: Markos Chandras <[email protected]>
2014-03-26MIPS: lib: strncpy_user: Use macro to build the strncpy_from_user symbolMarkos Chandras1-8/+13
Build the __strncpy_from_user symbol using a macro. In EVA mode we will need to use similar code to do the userspace load operations so it is better if we use a macro to avoid code duplications. Signed-off-by: Markos Chandras <[email protected]>
2014-03-26MIPS: lib: strlen_user: Add EVA supportMarkos Chandras2-0/+24
In non-EVA mode, strlen_user* aliases are used for the strlen_kernel* symbols since the code is identical. In EVA mode, new strlen_user* symbols are used which use the EVA specific instructions to load values from userspace. Signed-off-by: Markos Chandras <[email protected]>
2014-03-26MIPS: lib: strlen_user: Use macro to build the strlen_user symbolMarkos Chandras1-6/+10
Build the __strlen_user symbol using a macro. In EVA mode we will need to use similar code to do the userspace load operations so it is better if we use a macro to avoid code duplications. Signed-off-by: Markos Chandras <[email protected]>
2014-03-26MIPS: lib: strnlen_user: Add EVA supportMarkos Chandras2-0/+24
In non-EVA mode, a strlen_user* alias is used for the strlen_kernel* symbols since the code is identical. In EVA mode, a new strlen_user* symbol is used which uses the EVA specific instructions to load values from userspace. Signed-off-by: Markos Chandras <[email protected]>
2014-03-26MIPS: lib: strnlen_user: Use macro to build the strnlen_user symbolMarkos Chandras1-6/+10
Build the __strnlen_user symbol using a macro. In EVA mode we will need to use similar code to do the userspace load operations so it is better if we use a macro to avoid code duplications. Signed-off-by: Markos Chandras <[email protected]>
2014-03-26MIPS: traps: Set correct address limit for breakpoints and trapsLeonid Yegoshin1-0/+12
When a breakpoint or trap happens when operating in kernel mode but on users behalf (eg syscall) it is necessary to change the address limit to KERNEL_DS so any address checking can be bypassed and print the correct stack trace. Signed-off-by: Leonid Yegoshin <[email protected]> Signed-off-by: Markos Chandras <[email protected]>
2014-03-26MIPS: kernel: traps: Whitespace clean upMarkos Chandras1-7/+10
Signed-off-by: Markos Chandras <[email protected]>
2014-03-26MIPS: kernel: scall32-o32: Use EVA wrappers to fetch syscall argumentsMarkos Chandras1-4/+5
Arguments 4-8 are stored on user's stack, so use the EVA instructions to fetch them if EVA is enabled. Signed-off-by: Markos Chandras <[email protected]>
2014-03-26MIPS: uapi: inst: Add instruction format for SPECIAL3 instructionsLeonid Yegoshin1-0/+11
Signed-off-by: Leonid Yegoshin <[email protected]> Signed-off-by: Markos Chandras <[email protected]>
2014-03-26MIPS: uapi: inst: Add new EVA opcodesLeonid Yegoshin1-4/+10
Signed-off-by: Leonid Yegoshin <[email protected]> Signed-off-by: Markos Chandras <[email protected]>
2014-03-26MIPS: futex: Add EVA support for futex operationsMarkos Chandras1-4/+5
Use LLE/SCE instructions for performing an address translation for userspace when EVA is enabled. Signed-off-by: Markos Chandras <[email protected]>
2014-03-26MIPS: asm: Add wrappers for EVA/non-EVA instructionsMarkos Chandras2-0/+136
EVA uses specific instructions for accessing user memory. Instead of polluting the kernel with numerous #ifdef CONFIG_EVA we add wrappers for all the instructions that need special handling when EVA is enabled. Signed-off-by: Markos Chandras <[email protected]>
2014-03-26MIPS: asm: Add prefetch instruction for EVALeonid Yegoshin1-0/+8
EVA can use the PREFE instruction to perform the virtual address translation using the user mapping of the address rather than the kernel mapping. Signed-off-by: Leonid Yegoshin <[email protected]> Signed-off-by: Markos Chandras <[email protected]>
2014-03-26MIPS: Kconfig: Add Kconfig symbols for EVA supportLeonid Yegoshin1-1/+27
Add basic Kconfig support for EVA. Not selectable by any platform at this point. Signed-off-by: Leonid Yegoshin <[email protected]> Signed-off-by: Markos Chandras <[email protected]>
2014-03-26MIPS: OProfile: Add CPU_P5600 casesJames Hogan2-0/+5
Add a CPU_P5600 cpu type case in oprofile_arch_init() to use the MIPS model, and in mipsxx_init() to set the cpu_type string to "mips/P5600". Signed-off-by: James Hogan <[email protected]> Reviewed-by: Markos Chandras <[email protected]> Cc: [email protected] Cc: Robert Richter <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6410/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: Allow FTLB to be turned on for CPU_P5600James Hogan1-5/+7
Allow FTLB to be turned on or off for CPU_P5600 as well as CPU_PROAPTIV. The existing if statement is converted into a switch to allow for future expansion. Signed-off-by: James Hogan <[email protected]> Reviewed-by: Markos Chandras <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6411/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: Add MIPS P5600 probe supportJames Hogan1-0/+4
Add a case in cpu_probe_mips for the MIPS P5600 processor ID, which sets the CPU type to the new CPU_P5600. Signed-off-by: James Hogan <[email protected]> Reviewed-by: Markos Chandras <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6409/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: Add cases for CPU_P5600James Hogan7-0/+7
Add a CPU_P5600 case to various switch statements, doing the same thing as for CPU_PROAPTIV. Signed-off-by: James Hogan <[email protected]> Reviewed-by: Markos Chandras <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6408/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: Add MIPS P5600 PRid and cputype identifiersJames Hogan1-1/+2
Add a Processor ID and CPU type for the MIPS P5600 core. Signed-off-by: James Hogan <[email protected]> Reviewed-by: Markos Chandras <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6407/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: Save/restore MSA context around signalsPaul Burton6-16/+357
This patch extends sigcontext in order to hold the most significant 64 bits of each vector register in addition to the MSA control & status register. The least significant 64 bits are already saved as the scalar FP context. This makes things a little awkward since the least & most significant 64 bits of each vector register are not contiguous in memory. Thus the copy_u & insert instructions are used to transfer the values of the most significant 64 bits via GP registers. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6533/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: Warn if vector register partitioning is implementedPaul Burton1-1/+4
No current systems implementing MSA include support for vector register partitioning which makes it somewhat difficult to implement support for it in the kernel. Thus for the moment the kernel includes no such support. However if the kernel were to be run on a system which implemented register partitioning then it would not function correctly, mishandling MSA disabled exceptions. Print a warning if run on a system with vector register partitioning implemented to indicate this problem should it occur. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6494/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: Dumb MSA FP exception handlerPaul Burton2-0/+13
This patch adds a simple handler for MSA FP exceptions which delivers a SIGFPE to the running task. In the future it should probably be extended to re-execute the instruction with the MSACSR.NX bit set in order to generate results for any elements which did not cause an exception before delivering the SIGFPE signal. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6432/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: Basic MSA context switching supportPaul Burton10-34/+275
This patch adds support for context switching the MSA vector registers. These 128 bit vector registers are aliased with the FP registers - an FP register accesses the least significant bits of the vector register with which it is aliased (ie. the register with the same index). Due to both this & the requirement that the scalar FPU must be 64-bit (FR=1) if enabled at the same time as MSA the kernel will enable MSA & scalar FP at the same time for tasks which use MSA. If we restore the MSA vector context then we might as well enable the scalar FPU since the reason it was left disabled was to allow for lazy FP context restoring - but we just restored the FP context as it's a subset of the vector context. If we restore the FP context and have previously used MSA then we have to restore the whole vector context anyway (see comment in enable_restore_fp_context for details) so similarly we might as well enable MSA. Thus if a task does not use MSA then it will continue to behave as without this patch - the scalar FP context will be saved & restored as usual. But if a task executes an MSA instruction then it will save & restore the vector context forever more. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6431/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: Detect the MSA ASEPaul Burton6-0/+50
This patch adds support for probing the MSAP bit within the Config3 register in order to detect the presence of the MSA ASE. Presence of the ASE will be indicated in /proc/cpuinfo. The value of the MSA implementation register will be displayed at boot to aid debugging and verification of a correct setup, as is done for the FPU. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6430/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: Add MSA register definitions & accessPaul Burton4-0/+302
This patch introduces definitions for the MSA control registers and functions which allow access to both the control & vector registers. If the toolchain being used to build the kernel includes support for MSA then this patch will make use of that support & use MSA instructions directly. However toolchain support for MSA is very new & far from a point where it can be reasonably expected that everyone building the kernel uses a toolchain with support. Thus fallbacks using .word assembler directives are also provided for now as a temporary measure. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6429/ Patchwork: https://patchwork.linux-mips.org/patch/6607/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: Don't assume 64-bit FP registers for context switchPaul Burton3-128/+194
When saving or restoring scalar FP context we want to access the least significant 64 bits of each FP register. When the FP registers are 64 bits wide that is trivially the start of the registers value in memory. However when the FP registers are wider this equivalence will no longer be true for big endian systems. Define a new set of offset macros for the least significant 64 bits of each saved FP register within thread context, and make use of them when saving and restoring scalar FP context. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6428/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: Don't assume 64-bit FP registers for FP regsetPaul Burton1-6/+40
When we want to access 64-bit FP register values we can only treat consecutive registers as being consecutive in memory when the width of an FP register equals 64 bits. This assumption will not remain true once MSA support is introduced, so provide a code path which copies each 64 bit FP register value in turn when the width of an FP register differs from 64 bits. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6427/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: Don't assume 64-bit FP registers for dump_{,task_}fpuPaul Burton1-2/+14
This code assumed that saved FP registers are 64 bits wide, an assumption which will no longer be true once MSA is introduced. This patch modifies the code to copy the lower 64 bits of each register in turn, which is safe for any FP register width >= 64 bits. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6425/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: Clear upper bits of FP registers on emulator writesPaul Burton1-5/+20
The upper bits of an FP register are architecturally defined as unpredictable following an instructions which only writes the lower bits. The prior behaviour of the kernel is to leave them unmodified. This patch modifies that to clear the upper bits to zero. This is what the MSA architecture reference manual specifies should happen for its wider registers and is still permissible for scalar FP instructions given the bits unpredictability there. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6435/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: Replace hardcoded 32 with NUM_FPU_REGS in ptracePaul Burton2-4/+4
NUM_FPU_REGS just makes it clearer what's going on, rather than the magic hard coded 32. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6424/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: Don't require FPU on sigcontext setup/restorePaul Burton2-16/+28
When a task which has used the FPU at some point in its past takes a signal the kernel would previously always require the task to take ownership of the FPU whilst setting up or restoring from the sigcontext. That means that if the task has not used the FPU within this timeslice then the kernel would enable the FPU, restore the task's FP context into FPU registers and then save them into the sigcontext. This seems inefficient, and if the signal handler doesn't use FP then enabling the FPU & the extra memory accesses are entirely wasted work. This patch modifies the sigcontext setup & restore code to copy directly between the tasks saved FP context & the sigcontext for any tasks which have used FP in the past but are not currently the FPU owner (ie. have not used FP in this timeslice). Signed-off-by: Paul Burton <[email protected]> Reviewed-by: Qais Yousef <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6423/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: Move & rename fpu_emulator_{save,restore}_contextPaul Burton3-87/+76
These functions aren't directly related to the FPU emulator at all, they simply copy between a thread's saved context & a sigcontext. Thus move them to the appropriate signal files & rename them accordingly. This makes it clearer that the functions don't require the FPU emulator in any way. Signed-off-by: Paul Burton <[email protected]> Reviewed-by: Qais Yousef <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6422/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: Update outdated commentPaul Burton1-4/+3
The hard-coded offsets mentioned in this comment seem to not exist anymore, so remove mention of them from the comment. Signed-off-by: Paul Burton <[email protected]> Reviewed-by: Qais Yousef <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6421/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: Simplify FP context accessPaul Burton6-65/+90
This patch replaces the fpureg_t typedef with a "union fpureg" enabling easier access to 32 & 64 bit values. This allows the access macros used in cp1emu.c to be simplified somewhat. It will also make it easier to expand the width of the FP registers as will be done in a future patch in order to support the 128 bit registers introduced with MSA. No behavioural change is intended by this patch. Signed-off-by: Paul Burton <[email protected]> Reviewed-by: Qais Yousef <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6532/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: Select HAVE_ARCH_SECCOMP_FILTERMarkos Chandras1-0/+1
Signed-off-by: Markos Chandras <[email protected]> Reviewed-by: James Hogan <[email protected]> Reviewed-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6401/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: seccomp: Handle indirect system calls (o32)Markos Chandras7-6/+45
When userland uses syscall() to perform an indirect system call the actually system call that needs to be checked by the filter is on the first argument. The kernel code needs to handle this case by looking at the original syscall number in v0 and if it's NR_syscall, then it needs to examine the first argument to identify the real system call that will be executed. Similarly, we need to 'virtually' shift the syscall() arguments so the syscall_get_arguments() function can fetch the correct arguments for the indirect system call. Signed-off-by: Markos Chandras <[email protected]> Reviewed-by: James Hogan <[email protected]> Reviewed-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6404/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: kernel: scalls: Skip the syscall if denied by the seccomp filterMarkos Chandras4-4/+12
Signed-off-by: Markos Chandras <[email protected]> Reviewed-by: Paul Burton <[email protected]> Reviewed-by: James Hogan <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6399/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: ptrace: Move away from secure_computing_strictMarkos Chandras2-5/+7
MIPS now has the infrastructure for dynamic seccomp-bpf filtering Signed-off-by: Markos Chandras <[email protected]> Reviewed-by: James Hogan <[email protected]> Reviewed-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6400/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: asm: thread_info: Add _TIF_SECCOMP flagMarkos Chandras1-1/+2
Add _TIF_SECCOMP flag to _TIF_WORK_SYSCALL_ENTRY to indicate that the system call needs to be checked against a seccomp filter. Signed-off-by: Markos Chandras <[email protected]> Reviewed-by: Paul Burton <[email protected]> Reviewed-by: James Hogan <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6405/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: asm: syscall: Define syscall_get_archMarkos Chandras2-3/+5
This effectively renames __syscall_get_arch to syscall_get_arch and implements a compatible interface for the seccomp API. The seccomp code (kernel/seccomp.c) expects a syscall_get_arch function to be defined for every architecture, so we drop the leading underscores from the existing function. This also makes use of the 'task' argument to determine the type the process instead of assuming the process has the same characteristics as the kernel it's running on. Signed-off-by: Markos Chandras <[email protected]> Reviewed-by: Paul Burton <[email protected]> Reviewed-by: James Hogan <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6398/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: asm: syscall: Add the syscall_rollback functionMarkos Chandras1-0/+6
The syscall_rollback function is used by seccomp-bpf but it was never added for MIPS. It doesn't need to do anything as none of the registers are clobbered if the system call has been denied by the seccomp filter. Signed-off-by: Markos Chandras <[email protected]> Reviewed-by: James Hogan <[email protected]> Reviewed-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6403/ Signed-off-by: Ralf Baechle <[email protected]>
2014-03-26MIPS: Deprecate CONFIG_MIPS_CMPPaul Burton1-1/+4
CONFIG_MIPS_CPS is a better option for systems where it is supported, which as far as I am aware should be all systems where CONFIG_MIPS_CMP could provide any value (ie. where there are multiple cores for YAMON to bring up). This option is therefore deprecated, and marked as such. It is left intact for the time being in order to provide a fallback should someone find a system where CONFIG_MIPS_CPS will not function (ie. where the reset vector cannot be moved), and should be removed entirely in the future assuming that does not happen. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/6369/ Signed-off-by: Ralf Baechle <[email protected]>
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