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2017-03-29drm/amdgpu/gfx8: whitespace cleanupAlex Deucher1-6/+5
Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: load mc firware in driver for Polaris.Rex Zhu1-6/+84
load mc ucode in driver if VBIOS not loaded a full version of MC ucode, Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: jimqu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: fix duplicated codeChunming Zhou1-4/+0
it could come from branch merge. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: enable gfx/system/vce clockgating on Polars12.Rex Zhu2-1/+20
Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amd/powerplay: add a new register define for APU in VI.Rex Zhu4-4/+15
the ixcurrent_pg_status addr is different between APU and DGPU. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: enable GFX/UVD/VCE PG for BristolEric Huang1-1/+4
Signed-off-by: Eric Huang <[email protected]> Signed-off-by: Samuel Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amd/amdgpu: Set VCE/UVD off during late initTom St Denis1-0/+4
Forces VCE/UVD off during late init to ensure they're powered off correctly during boot. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Samuel Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: remove redundant outer loop and remove commented out codeColin Ian King1-20/+7
The outer loop is redundant and can be removed as it is doing nothing useful. Also remove some commented out code that is not being used. Detected by CoverityScan, CID#1402073 Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amd/sched: revise priority numberChunming Zhou2-6/+7
big number is to high priority. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: bump version for PRT supportAlex Deucher1-1/+2
Reviewed-by: Junwei Zhang <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: fix before and after mapping judgement for replace mappingJunwei Zhang1-4/+6
If the before mapping is 1 page size, so its start and last will be same. Thus below condition will become false, then to free the before mapping. > if (before->it.start != before->it.last) But in this case, we need the before mapping of 1 page size. So does after mapping. Signed-off-by: Junwei Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: add a VM mapping replace operation v2Christian König4-1/+83
Add a new operation to replace mappings in a VM with a new one. v2: Fix Jerry's comment, separate out clear operation. Signed-off-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: implement AMDGPU_VA_OP_CLEAR v2Christian König5-8/+124
A new VM operation to remove all mappings in a range. v2: limit unmapped area as noted by Jerry Signed-off-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: separate page table allocation from mappingChristian König4-62/+92
This makes it easier to implement a replace operation. Signed-off-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: make set_prt callback optional and fix error handlingChristian König1-14/+15
PRT support is completely implemented now and we left it turned on accidentially in the error path. Signed-off-by: Christian König <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu/vi: add missing error handling when setting uvd dclkAlex Deucher1-0/+2
Reviewed-by: Christian König <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reported-by: David Binderman <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu/vi: remove duplicate CG flagsAlex Deucher1-2/+0
GFX_MGLS was added twice. Reviewed-by: Christian König <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reported-by: David Binderman <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amd/powerplay: remove unneeded conversions to boolAndrew F. Davis2-2/+2
Found with scripts/coccinelle/misc/boolconv.cocci. Signed-off-by: Andrew F. Davis <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: remove unneeded conversions to boolAndrew F. Davis4-14/+14
Found with scripts/coccinelle/misc/boolconv.cocci. Signed-off-by: Andrew F. Davis <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: add macro to retrieve timeline name v2Andres Rodriguez1-4/+8
This helps de-duplicate a long expression and removes overly long lines. v2: Rename macro and undef it Reviewed-by: Christian König <[email protected]> Signed-off-by: Andres Rodriguez <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: replace fence pointer with fence data in tracesAndres Rodriguez1-4/+9
Fence data is easier to read and allows us to correlate to identify corresponding dma_fence ftrace events. Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Andres Rodriguez <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: remove useless pointers from tracesAndres Rodriguez1-16/+5
Remove pointers which provide redundant information which is already easier to deduce from other fields. Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Andres Rodriguez <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: use sched_job id instead of pointer for tracingAndres Rodriguez1-8/+8
Pointers get reallocated and they are hard to read for humans. Use ids instead. Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Andres Rodriguez <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: more ftrace formatting consistency fixesAndres Rodriguez1-5/+5
Consistent formatting makes it easier to read the logs and apply simple awk oneliners. I missed some of these on my last patch. Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Andres Rodriguez <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amd/sched: add a unique job id to amd_sched_jobAndres Rodriguez2-0/+4
A unique id is useful for debugging and tracing. Intended to replace pointers in ftrace output. Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Andres Rodriguez <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: increase IH ring buffer size to avoid overflowRoger.He1-1/+1
We originally limited the IH to 4k on tonga since it uses bus addresses directly rather than GPU MC addresses, so it needs contigous physical memory. This brings it inline with other asics. Signed-off-by: Roger.He <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: don't init GDS pool if GDS size is 0 (v2)Alex Deucher1-18/+27
SI cards don't expose GDS as a separate pool. The CP manages GDS and the UMDs use special CP packets to allocate GDS memory. v2: drop extra whitespace change bug: https://bugzilla.kernel.org/show_bug.cgi?id=194867 Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu/gfx6: drop gds unrefsAlex Deucher1-4/+0
Leftover from gfx7 code. gfx6 never sets up the gds buffers in the first place. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: refine vce_3.0 code.Rex Zhu1-9/+7
fix logic error in hw_fini and set_clockgating_state functions. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: refine vce2.0 dpm sequenceRex Zhu1-3/+3
start vce first then enable vce dpm. Signed-off-by: Rex Zhu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/radeon: add new ATIF ACPI methodAlex Deucher1-0/+12
Used for fetching external GPU information. Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: add new ATIF ACPI methodAlex Deucher1-0/+12
Used for fetching external GPU information. Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: get cs support of AMDGPU_HW_IP_UVD_ENCLeo Liu1-0/+9
Reviewed-by: Christian König <[email protected]> Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: add AMDGPU_HW_IP_UVD_ENC to info queryLeo Liu1-0/+10
Reviewed-by: Christian König <[email protected]> Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29uapi/drm: add AMDGPU_HW_IP_UVD_ENCLeo Liu1-1/+2
Reviewed-by: Christian König <[email protected]> Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: add uvd enc ring type and functionsLeo Liu1-1/+2
Reviewed-by: Christian König <[email protected]> Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: add uvd enc run queueLeo Liu1-0/+1
Reviewed-by: Christian König <[email protected]> Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: add uvd enc ringsLeo Liu2-1/+4
And initialize them Reviewed-by: Christian König <[email protected]> Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: move amdgpu_vce structure to vce headerLeo Liu2-28/+26
Reviewed-by: Christian König <[email protected]> Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: move amdgpu_uvd structure to uvd headerLeo Liu2-29/+27
Reviewed-by: Christian König <[email protected]> Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: add a ring func for end commandLeo Liu2-0/+4
Reviewed-by: Christian König <[email protected]> Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: add DF MGCG flagHuang Rui1-0/+1
Acked-by: Christian König <[email protected]> Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: add DRM MGCG headerHuang Rui1-0/+1
Acked-by: Christian König <[email protected]> Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: add asic callback to get memsize registerAlex Deucher5-1/+23
Newer asics use different registers so abstract it. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: check function points valid before use. (v3)Rex Zhu1-14/+18
v2: agd: integrate Christian's comments. v3: print error message if call fails Reviewed-by: Christian König <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: add a callback to set vm mapping flagsAlex Xie5-9/+57
This lets each asic set whichever flags it supports. Signed-off-by: Alex Xie <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: set GART PTE asic specific flagsAlex Xie5-3/+8
Set asic specific gart pte flags in the gmc IP module for each asic. Signed-off-by: Alex Xie <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: add a ucode size member into firmware infoHuang Rui2-2/+7
This will be used for newer asics. Acked-by: Christian König <[email protected]> Signed-off-by: Huang Rui <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: expand pte flags to uint64_tChunming Zhou11-25/+25
Necessary for new asics. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu/ih: store the full context idAlex Deucher15-36/+38
The contextID field (formerly known as src_data) of the IH vector stores client specific information about an interrupt. It was expanded from 32 bits to 128 on newer asics. Expand the src_id field to handle this. Reviewed-by: Harry Wentland <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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