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2023-12-15binder: use enum for binder ioctlsAlice Ryhl1-14/+16
All of the other constants in this file are defined using enums, so make the constants more consistent by defining the ioctls in an enum as well. This is necessary for Rust Binder since the _IO macros are too complicated for bindgen to see that they expand to integer constants. Replacing the #defines with an enum forces bindgen to evaluate them properly, which allows us to access them from Rust. I originally intended to include this change in the first patch of the Rust Binder patchset [1], but at plumbers Carlos Llamas told me that this change has been discussed previously [2] and suggested that I send it upstream separately. Link: https://lore.kernel.org/rust-for-linux/[email protected]/ [1] Link: https://lore.kernel.org/all/[email protected]/ [2] Signed-off-by: Alice Ryhl <[email protected]> Acked-by: Carlos Llamas <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-12-15mei: rework Kconfig dependenciesArnd Bergmann4-11/+9
The dependencies in the mei framework are inconsistent, with some symbols using 'select INTEL_MEI' to force it being enabled and others using 'depends on INTEL_MEI'. In general, one should not select user-visible symbols, so change all of these to normal dependencies, but change the default on INTEL_MEI to be enabled when building a kernel for an Intel CPU with ME or a generic x86 kernel. Having consistent dependencies makes the 'menuconfig' listing more readable by using proper indentation. A large if/endif block is just a simpler syntax than repeating the dependencies for each symbol. Signed-off-by: Arnd Bergmann <[email protected]> Reviewed-by: Wentong Wu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-12-15mei: fix vsc dependencyArnd Bergmann1-0/+1
CONFIG_INTEL_MEI_VSC_HW can be set to built-in even with CONFIG_MEI=m, but then the driver is not built because Kbuild never enters the drivers/misc/mei directory for built-in files, leading to a link failure: ERROR: modpost: "vsc_tp_reset" [drivers/misc/mei/mei-vsc.ko] undefined! ERROR: modpost: "vsc_tp_init" [drivers/misc/mei/mei-vsc.ko] undefined! ERROR: modpost: "vsc_tp_xfer" [drivers/misc/mei/mei-vsc.ko] undefined! ERROR: modpost: "vsc_tp_need_read" [drivers/misc/mei/mei-vsc.ko] undefined! ERROR: modpost: "vsc_tp_intr_enable" [drivers/misc/mei/mei-vsc.ko] undefined! ERROR: modpost: "vsc_tp_intr_synchronize" [drivers/misc/mei/mei-vsc.ko] undefined! ERROR: modpost: "vsc_tp_intr_disable" [drivers/misc/mei/mei-vsc.ko] undefined! ERROR: modpost: "vsc_tp_register_event_cb" [drivers/misc/mei/mei-vsc.ko] undefined! Add an explicit dependency on CONFIG_MEI that was apparently missing, to ensure the VSC_HW driver cannot be built-in with MEI itself being a loadable module. Fixes: 566f5ca97680 ("mei: Add transport driver for IVSC device") Signed-off-by: Arnd Bergmann <[email protected]> Reviewed-by: Sakari Ailus <[email protected]> Reviewed-by: Wentong Wu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-12-15mei: vsc: Rework firmware image namesSakari Ailus1-62/+10
Rework firmware image names with the users in mind---there's no need for variation between firmware names, apart from connected sensors. All supported SoCs use the same firmware, too. Use a single set of firmware binaries and assume they'll be found under intel/vsc directory. Signed-off-by: Sakari Ailus <[email protected]> Tested-by: Wentong Wu <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-12-15mei: pxp: spdx should be at first lineAlexander Usyskin1-1/+0
Remove stray empty line at the beginning of the file to have SPDX header t the first line. Signed-off-by: Alexander Usyskin <[email protected]> Signed-off-by: Tomas Winkler <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-12-15mei: fix spellos in mei.hRandy Dunlap1-2/+2
For include/uapi/linux/mei.h, correct spellos reported by codespell. Signed-off-by: Randy Dunlap <[email protected]> Cc: Tomas Winkler <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-12-15nvmem: stm32: add support for STM32MP25 BSEC to control OTP dataPatrick Delaunay1-0/+16
On STM32MP25, OTP area may be read/written by using BSEC (boot, security and OTP control). The BSEC internal peripheral is only managed by the secure world. The 12 Kbits of OTP (effective) are organized into the following regions: - lower OTP (OTP0 to OTP127) = 4096 lower OTP bits, bitwise (1-bit) programmable - mid OTP (OTP128 to OTP255) = 4096 middle OTP bits, bulk (32-bit) programmable - upper OTP (OTP256 to OTP383) = 4096 upper OTP bits, bulk (32-bit) programmable, only accessible when BSEC is in closed state. As HWKEY and ECIES key are only accessible by ROM code; only 368 OTP words are managed in this driver (OTP0 to OTP267). This patch adds the STM32MP25 configuration for reading and writing the OTP data using the OP-TEE BSEC TA services. Signed-off-by: Patrick Delaunay <[email protected]> Signed-off-by: Srinivas Kandagatla <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-12-15dt-bindings: nvmem: add new stm32mp25 compatible for stm32-romemPatrick Delaunay1-0/+1
Add a new compatible for stm32mp25 support. Signed-off-by: Patrick Delaunay <[email protected]> Acked-by: Conor Dooley <[email protected]> Signed-off-by: Srinivas Kandagatla <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-12-15nvmem: core: Expose cells through sysfsMiquel Raynal2-1/+135
The binary content of nvmem devices is available to the user so in the easiest cases, finding the content of a cell is rather easy as it is just a matter of looking at a known and fixed offset. However, nvmem layouts have been recently introduced to cope with more advanced situations, where the offset and size of the cells is not known in advance or is dynamic. When using layouts, more advanced parsers are used by the kernel in order to give direct access to the content of each cell, regardless of its position/size in the underlying device. Unfortunately, these information are not accessible by users, unless by fully re-implementing the parser logic in userland. Let's expose the cells and their content through sysfs to avoid these situations. Of course the relevant NVMEM sysfs Kconfig option must be enabled for this support to be available. Not all nvmem devices expose cells. Indeed, the .bin_attrs attribute group member will be filled at runtime only when relevant and will remain empty otherwise. In this case, as the cells attribute group will be empty, it will not lead to any additional folder/file creation. Exposed cells are read-only. There is, in practice, everything in the core to support a write path, but as I don't see any need for that, I prefer to keep the interface simple (and probably safer). The interface is documented as being in the "testing" state which means we can later add a write attribute if though relevant. Signed-off-by: Miquel Raynal <[email protected]> Tested-by: Rafał Miłecki <[email protected]> Tested-by: Chen-Yu Tsai <[email protected]> Signed-off-by: Srinivas Kandagatla <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-12-15ABI: sysfs-nvmem-cells: Expose cells through sysfsMiquel Raynal1-0/+21
The binary content of nvmem devices is available to the user so in the easiest cases, finding the content of a cell is rather easy as it is just a matter of looking at a known and fixed offset. However, nvmem layouts have been recently introduced to cope with more advanced situations, where the offset and size of the cells is not known in advance or is dynamic. When using layouts, more advanced parsers are used by the kernel in order to give direct access to the content of each cell regardless of their position/size in the underlying device, but these information were not accessible to the user. By exposing the nvmem cells to the user through a dedicated cell/ folder containing one file per cell, we provide a straightforward access to useful user information without the need for re-writing a userland parser. Content of nvmem cells is usually: product names, manufacturing date, MAC addresses, etc, Signed-off-by: Miquel Raynal <[email protected]> Reviewed-by: Greg Kroah-Hartman <[email protected]> Signed-off-by: Srinivas Kandagatla <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-12-15nvmem: core: Rework layouts to become regular devicesMiquel Raynal9-135/+354
Current layout support was initially written without modules support in mind. When the requirement for module support rose, the existing base was improved to adopt modularization support, but kind of a design flaw was introduced. With the existing implementation, when a storage device registers into NVMEM, the core tries to hook a layout (if any) and populates its cells immediately. This means, if the hardware description expects a layout to be hooked up, but no driver was provided for that, the storage medium will fail to probe and try later from scratch. Even if we consider that the hardware description shall be correct, we could still probe the storage device (especially if it contains the rootfs). One way to overcome this situation is to consider the layouts as devices, and leverage the native notifier mechanism. When a new NVMEM device is registered, we can populate its nvmem-layout child, if any, and wait for the matching to be done in order to get the cells (the waiting can be easily done with the NVMEM notifiers). If the layout driver is compiled as a module, it should automatically be loaded. This way, there is no strong order to enforce, any NVMEM device creation or NVMEM layout driver insertion will be observed as a new event which may lead to the creation of additional cells, without disturbing the probes with costly (and sometimes endless) deferrals. In order to achieve that goal we create a new bus for the nvmem-layouts with minimal logic to match nvmem-layout devices with nvmem-layout drivers. All this infrastructure code is created in the layouts.c file. Signed-off-by: Miquel Raynal <[email protected]> Tested-by: Rafał Miłecki <[email protected]> Signed-off-by: Srinivas Kandagatla <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-12-15nvmem: Move and rename ->fixup_cell_info()Miquel Raynal5-24/+15
This hook is meant to be used by any provider and instantiating a layout just for this is useless. Let's instead move this hook to the nvmem device and add it to the config structure to be easily shared by the providers. While at moving this hook, rename it ->fixup_dt_cell_info() to clarify its main intended purpose. Signed-off-by: Miquel Raynal <[email protected]> Signed-off-by: Srinivas Kandagatla <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-12-15nvmem: Simplify the ->add_cells() hookMiquel Raynal4-10/+6
The layout entry is not used and will anyway be made useless by the new layout bus infrastructure coming next, so drop it. While at it, clarify the kdoc entry. Signed-off-by: Miquel Raynal <[email protected]> Signed-off-by: Srinivas Kandagatla <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-12-15nvmem: Create a header for internal sharingMiquel Raynal2-23/+36
Before adding all the NVMEM layout bus infrastructure to the core, let's move the main nvmem_device structure in an internal header, only available to the core. This way all the additional code can be added in a dedicated file in order to keep the current core file tidy. Signed-off-by: Miquel Raynal <[email protected]> Signed-off-by: Srinivas Kandagatla <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-12-15nvmem: Move of_nvmem_layout_get_container() in another headerMiquel Raynal3-15/+21
nvmem-consumer.h is included by consumer devices, extracting data from NVMEM devices whereas nvmem-provider.h is included by devices providing NVMEM content. The only users of of_nvmem_layout_get_container() outside of the core are layout drivers, so better move its prototype to nvmem-provider.h. While we do so, we also move the kdoc associated with the function to the header rather than the .c file. Signed-off-by: Miquel Raynal <[email protected]> Signed-off-by: Srinivas Kandagatla <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-12-15of: device: Export of_device_make_bus_id()Miquel Raynal3-40/+47
This helper is really handy to create unique device names based on their device tree path, we may need it outside of the OF core (in the NVMEM subsystem) so let's export it. As this helper has nothing patform specific, let's move it to of/device.c instead of of/platform.c so we can add its prototype to of_device.h. Signed-off-by: Miquel Raynal <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Srinivas Kandagatla <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2023-12-15PCI: epf-mhi: Fix the DMA data direction of dma_unmap_single()Manivannan Sadhasivam1-1/+1
In the error path of pci_epf_mhi_edma_write() function, the DMA data direction passed (DMA_FROM_DEVICE) doesn't match the actual direction used for the data transfer. Fix it by passing the correct one (DMA_TO_DEVICE). Fixes: 7b99aaaddabb ("PCI: epf-mhi: Add eDMA support") Reviewed-by: Krzysztof Wilczyński <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Manivannan Sadhasivam <[email protected]>
2023-12-15bus: mhi: ep: Add checks for read/write callbacks while registering controllersManivannan Sadhasivam1-0/+4
The MHI EP controller drivers has to support both sync and async read/write callbacks. Hence, add a check for it. Signed-off-by: Manivannan Sadhasivam <[email protected]>
2023-12-15bus: mhi: ep: Add support for async DMA read operationManivannan Sadhasivam1-73/+89
As like the async DMA write operation, let's add support for async DMA read operation. In the async path, the data will be read from the transfer ring continuously and when the controller driver notifies the stack using the completion callback (mhi_ep_read_completion), then the client driver will be notified with the read data and the completion event will be sent to the host for the respective ring element (if requested by the host). Signed-off-by: Manivannan Sadhasivam <[email protected]>
2023-12-15bus: mhi: ep: Add support for async DMA write operationManivannan Sadhasivam3-20/+59
In order to optimize the data transfer, let's use the async DMA operation for writing (queuing) data to the host. In the async path, the completion event for the transfer ring will only be sent to the host when the controller driver notifies the MHI stack of the actual transfer completion using the callback (mhi_ep_skb_completion) supplied in "struct mhi_ep_buf_info". Also to accommodate the async operation, the transfer ring read offset (ring->rd_offset) is cached in the "struct mhi_ep_chan" and updated locally to let the stack queue further ring items to the controller driver. But the actual read offset of the transfer ring will only be updated in the completion callback. Signed-off-by: Manivannan Sadhasivam <[email protected]>
2023-12-15Merge branch 'icc-qcm2290' into icc-nextGeorgi Djakov1-0/+1
More QCM2290-related patches to document the bandwidth monitor instance. * icc-qcm2290 dt-bindings: interconnect: qcom,msm8998-bwmon: Add QCM2290 bwmon instance Signed-off-by: Georgi Djakov <[email protected]>
2023-12-15Merge branch 'icc-sm6115' into icc-nextGeorgi Djakov6-0/+1698
Add DT bindings and a driver for managing NoC providers on SM6115. * icc-sm6115 dt-bindings: interconnect: Add Qualcomm SM6115 NoC interconnect: qcom: Add SM6115 interconnect provider driver dt-bindings: interconnect: qcom,msm8998-bwmon: Add SM6115 bwmon instance interconnect: qcom: sm6115: Fix up includes Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Georgi Djakov <[email protected]>
2023-12-15interconnect: qcom: sm6115: Fix up includesKonrad Dybcio1-5/+1
Remove some unnecessary includes and get rid of the abusive of_platform in favor of the correct headers. Reported-by: Rob Herring <[email protected]> Reported-by: Georgi Djakov <[email protected]> Fixes: 2eab57b131bd ("interconnect: qcom: Add SM6115 interconnect provider driver") Signed-off-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Georgi Djakov <[email protected]>
2023-12-14PCI: epf-mhi: Enable MHI async read/write supportManivannan Sadhasivam1-3/+4
Now that both eDMA and iATU are prepared to support async transfer, let's enable MHI async read/write by supplying the relevant callbacks. In the absence of eDMA, iATU will be used for both sync and async operations. Acked-by: Bjorn Helgaas <[email protected]> Reviewed-by: Krzysztof Wilczyński <[email protected]> Signed-off-by: Manivannan Sadhasivam <[email protected]>
2023-12-14PCI: epf-mhi: Add support for DMA async read/write operationManivannan Sadhasivam1-3/+228
The driver currently supports only the sync read/write operation i.e., it waits for the DMA transfer to complete before returning to the caller (MHI stack). But it is sub-optimal and defeats the actual purpose of using DMA. So let's add support for DMA async read/write operation by skipping the DMA transfer completion and returning to the caller immediately. When the completion actually happens later, the driver will be notified using the DMA completion handler and in turn it will notify the caller using the newly introduced callback in "struct mhi_ep_buf_info". Since the DMA completion handler is invoked from the interrupt context, a separate workqueue (epf_mhi->dma_wq) is used to notify the caller about the completion of the transfer. Acked-by: Bjorn Helgaas <[email protected]> Reviewed-by: Krzysztof Wilczyński <[email protected]> Signed-off-by: Manivannan Sadhasivam <[email protected]>
2023-12-14PCI: epf-mhi: Simulate async read/write using iATUManivannan Sadhasivam1-0/+6
Even though iATU only supports synchronous read/write, the MHI stack may call async read/write callbacks without knowing the limitations of the controller driver. So in order to maintain compatibility, let's simulate async read/write operation with iATU by invoking the completion callback after memcpy. Acked-by: Bjorn Helgaas <[email protected]> Reviewed-by: Krzysztof Wilczyński <[email protected]> Signed-off-by: Manivannan Sadhasivam <[email protected]>
2023-12-14bus: mhi: ep: Introduce async read/write callbacksManivannan Sadhasivam1-0/+9
These callbacks can be implemented by the controller drivers to perform async read/write operation that increases the throughput. For aiding the async operation, a completion callback is also introduced. Signed-off-by: Manivannan Sadhasivam <[email protected]>
2023-12-14bus: mhi: ep: Rename read_from_host() and write_to_host() APIsManivannan Sadhasivam4-14/+14
In the preparation for adding async API support, let's rename the existing APIs to read_sync() and write_sync() to make it explicit that these APIs are used for synchronous read/write. Signed-off-by: Manivannan Sadhasivam <[email protected]>
2023-12-14bus: mhi: ep: Pass mhi_ep_buf_info struct to read/write APIsManivannan Sadhasivam4-62/+84
In the preparation of DMA async support, let's pass the parameters to read_from_host() and write_to_host() APIs using mhi_ep_buf_info structure. No functional change. Signed-off-by: Manivannan Sadhasivam <[email protected]>
2023-12-14bus: mhi: ep: Add support for interrupt moderation timerManivannan Sadhasivam3-4/+40
MHI spec defines the interrupt moderation timer feature using which the host can limit the number of interrupts being raised for an event ring by the device. This feature allows the host to process multiple event ring elements by a single IRQ from the device, thereby eliminating the need to process IRQ for each element. The INTMODT field in the event context array provides the value to be used for delaying the IRQ generation from device. This value, along with the Block Event Interrupt (BEI) flag of the TRE defines how IRQ is generated to the host. Support for interrupt moderation timer is implemented using delayed workqueue in kernel. And a separate delayed work item is used for each event ring. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Manivannan Sadhasivam <[email protected]>
2023-12-14bus: mhi: ep: Use slab allocator where applicableManivannan Sadhasivam2-17/+52
Use slab allocator for allocating the memory for objects used frequently and are of fixed size. This reduces the overheard associated with kmalloc(). Suggested-by: Alex Elder <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Manivannan Sadhasivam <[email protected]>
2023-12-14bus: mhi: host: Add alignment check for event ring read pointerKrishna chaitanya chundru1-1/+2
Though we do check the event ring read pointer by "is_valid_ring_ptr" to make sure it is in the buffer range, but there is another risk the pointer may be not aligned. Since we are expecting event ring elements are 128 bits(struct mhi_ring_element) aligned, an unaligned read pointer could lead to multiple issues like DoS or ring buffer memory corruption. So add a alignment check for event ring read pointer. Fixes: ec32332df764 ("bus: mhi: core: Sanity check values from remote device before use") cc: [email protected] Signed-off-by: Krishna chaitanya chundru <[email protected]> Reviewed-by: Jeffrey Hugo <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Manivannan Sadhasivam <[email protected]>
2023-12-14bus: mhi: host: pci_generic: Add SDX75 based modem supportQiang Yu1-0/+22
Add generic info for SDX75 based modems. SDX75 takes longer to set ready during power up. Hence use separate configuration. Signed-off-by: Qiang Yu <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Manivannan Sadhasivam <[email protected]>
2023-12-14bus: mhi: host: Add a separate timeout parameter for waiting readyQiang Yu5-10/+26
Some devices(eg. SDX75) take longer than expected (default, 8 seconds) to set ready after reboot. Hence add optional ready timeout parameter and pass the appropriate timeout value to mhi_poll_reg_field() to wait enough for device ready as part of power up sequence. Signed-off-by: Qiang Yu <[email protected]> Reviewed-by: Manivannan Sadhasivam <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Manivannan Sadhasivam <[email protected]>
2023-12-14bus: mhi: ep: Do not allocate event ring element on stackManivannan Sadhasivam1-18/+50
It is possible that the host controller driver would use DMA framework to write the event ring element. So avoid allocating event ring element on the stack as DMA cannot work on vmalloc memory. Cc: [email protected] Fixes: 961aeb689224 ("bus: mhi: ep: Add support for sending events to the host") Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Manivannan Sadhasivam <[email protected]>
2023-12-13dt-bindings: interconnect: qcom,msm8998-bwmon: Add QCM2290 bwmon instanceKonrad Dybcio1-0/+1
QCM2290 has a single BWMONv4 intance for CPU. Document it. Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Georgi Djakov <[email protected]>
2023-12-13dt-bindings: interconnect: qcom,msm8998-bwmon: Add SM6115 bwmon instanceKonrad Dybcio1-0/+1
SM6115 has a single BWMONv4 intance for CPU. Document it. Signed-off-by: Konrad Dybcio <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Georgi Djakov <[email protected]>
2023-12-12Merge tag 'coresight-next-v6.8' of ↵Greg Kroah-Hartman26-118/+1429
git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux into char-misc-next Suzuki writes: coresight: Updates for Linux v6.8 Updates for the hwtracing subsystem includes : - Support for CoreSight TPDM DSB set - Support for tuning Cycle count Threshold for CoreSight ETM via perf - Support for TRBE on ACPI based systems - Support for choosing buffer mode in ETR for sysfs mode - Improvements to HiSilicon PTT driver - Cleanups to Ultrasoc SMB driver - Cleanup .remove callback for various Coresight platform drivers - Remove Leo Yan from Reviewers Signed-off-by: Suzuki K Poulose <[email protected]> * tag 'coresight-next-v6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux: (32 commits) coresight: ultrasoc-smb: Use guards to cleanup coresight: ultrasoc-smb: Convert to platform remove callback returning void coresight: trbe: Convert to platform remove callback returning void coresight: replicator: Convert to platform remove callback returning void coresight: funnel: Convert to platform remove callback returning void coresight: etm4x: Convert to platform remove callback returning void coresight: dummy: Convert to platform remove callback returning void coresight: etm4x: Fix width of CCITMIN field coresight-tpdm: Correct the property name of MSR number hwtracing: hisi_ptt: Optimize the trace data committing hwtracing: hisi_ptt: Disable interrupt after trace end Documentation: ABI: coresight-tpdm: Fix Bit[3] description indentation coresight-tpdm: Add nodes for dsb msr support dt-bindings: arm: Add support for DSB MSR register coresight-tpdm: Add nodes for timestamp request coresight-tpdm: Add nodes to configure pattern match output coresight-tpdm: Add nodes for dsb edge control coresight-tpdm: Add node to set dsb programming mode coresight-tpdm: Add nodes to set trigger timestamp and type coresight-tpdm: Add reset node to TPDM node ...
2023-12-12extcon: qcom-spmi-misc: don't use kernel-doc marker for commentRandy Dunlap1-1/+1
Do not use "/**" for non-kernel-doc comments. This prevents a warning from scripts/kernel-doc: warning: expecting prototype for extcon(). Prototype was for USB_ID_DEBOUNCE_MS() instead Link: https://lore.kernel.org/lkml/[email protected]/ Signed-off-by: Randy Dunlap <[email protected]> Signed-off-by: Chanwoo Choi <[email protected]>
2023-12-11dt-bindings: iio: humidity: Add TI HDC302x supportLi peiyu1-0/+55
Add device tree bindings for HDC3020/HDC3021/HDC3022 humidity and temperature sensors. Signed-off-by: Li peiyu <[email protected]> Reviewed-by: Conor Dooley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2023-12-11iio: humidity: Add driver for ti HDC302x humidity sensorsLi peiyu1-0/+473
Add support for HDC302x integrated capacitive based relative humidity (RH) and temperature sensor. This driver supports reading values, reading the maximum and minimum of values and controlling the integrated heater of the sensor. Co-developed-by: Javier Carrasco <[email protected]> Signed-off-by: Javier Carrasco <[email protected]> Signed-off-by: Li peiyu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2023-12-11iio: ABI: document temperature and humidity peak/trough raw attributesJavier Carrasco1-1/+12
The in_temp_peak_raw attribute is already in use, but its documentation is still missing. The in_humidityrelative_raw must be documented for a new iio user that supports this attribute. Add temp and humidityrelative use cases. When at it, remove an extra blank space in the description. For users that support minimum values, a new in_<type>_trough_raw attribute is required. Add this attribute and document the first uses of it for temp and humidityrelative types. Signed-off-by: Javier Carrasco <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2023-12-11iio: core: introduce trough info element for minimum valuesJavier Carrasco2-0/+2
The IIO_CHAN_INFO_PEAK info element is used for maximum values and currently there is no equivalent for minimum values. Instead of overloading the existing peak info element, a new info element can be added. In principle there is no need to add a _TROUGH_SCALE element as the scale will be the same as the one required for INFO_PEAK, which in turn is sometimes omitted if a single scale for peaks and raw values is required. Add an IIO_CHAN_INFO_TROUGH info element for minimum values. Signed-off-by: Javier Carrasco <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2023-12-11iio: light: driver for Lite-On ltr390Anshul Dalal4-0/+215
Implements driver for the Ambient/UV Light sensor LTR390. The driver exposes two ways of getting sensor readings: 1. Raw UV Counts directly from the sensor 2. The computed UV Index value with a percision of 2 decimal places [NOTE] Ambient light sensing has not been implemented yet. Driver tested on RPi Zero 2W Datasheet: https://optoelectronics.liteon.com/upload/download/DS86-2015-0004/LTR-390UV_Final_%20DS_V1%201.pdf Signed-off-by: Anshul Dalal <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2023-12-11dt-bindings: iio: light: add ltr390Anshul Dalal1-0/+56
Add binding for Lite-On LTR390 which is an Ambient/UV light sensor that communicates over i2c with an address of 0x53. Datasheet: https://optoelectronics.liteon.com/upload/download/DS86-2015-0004/LTR-390UV_Final_%20DS_V1%201.pdf Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Anshul Dalal <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2023-12-11iio: light: isl76682: remove unreachable codeJiapeng Chong1-1/+0
The function isl76682_read_raw cannot execute return -EINVAL up to 145 lines, delete the invalid code. drivers/iio/light/isl76682.c:145 isl76682_read_raw() warn: ignoring unreachable code. Reported-by: Abaci Robot <[email protected]> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=7698 Signed-off-by: Jiapeng Chong <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2023-12-11iio: pressure: driver for Honeywell HSC/SSC seriesPetre Rodan7-0/+730
Adds driver for digital Honeywell TruStability HSC and SSC series pressure and temperature sensors. Communication is one way. The sensor only requires 4 bytes worth of clock pulses on both i2c and spi in order to push the data out. The i2c address is hardcoded and depends on the part number. There is no additional GPIO control. code is now based on iio/togreg Datasheet: https://prod-edam.honeywell.com/content/dam/honeywell-edam/sps/siot/en-us/products/sensors/pressure-sensors/board-mount-pressure-sensors/trustability-hsc-series/documents/sps-siot-trustability-hsc-series-high-accuracy-board-mount-pressure-sensors-50099148-a-en-ciid-151133.pdf [HSC] Datasheet: https://prod-edam.honeywell.com/content/dam/honeywell-edam/sps/siot/en-us/products/sensors/pressure-sensors/board-mount-pressure-sensors/trustability-ssc-series/documents/sps-siot-trustability-ssc-series-standard-accuracy-board-mount-pressure-sensors-50099533-a-en-ciid-151134.pdf [SSC] Signed-off-by: Petre Rodan <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2023-12-11dt-bindings: iio: pressure: add honeywell,hsc030Petre Rodan1-0/+142
Adds binding for digital Honeywell TruStability HSC and SSC series pressure and temperature sensors. Communication is one way. The sensor only requires 4 bytes worth of clock pulses on both i2c and spi in order to push the data out. The i2c address is hardcoded and depends on the part number. There is no additional GPIO control. driver is based on iio/togreg Datasheet: https://prod-edam.honeywell.com/content/dam/honeywell-edam/sps/siot/en-us/products/sensors/pressure-sensors/board-mount-pressure-sensors/trustability-hsc-series/documents/sps-siot-trustability-hsc-series-high-accuracy-board-mount-pressure-sensors-50099148-a-en-ciid-151133.pdf [HSC] Datasheet: https://prod-edam.honeywell.com/content/dam/honeywell-edam/sps/siot/en-us/products/sensors/pressure-sensors/board-mount-pressure-sensors/trustability-ssc-series/documents/sps-siot-trustability-ssc-series-standard-accuracy-board-mount-pressure-sensors-50099533-a-en-ciid-151134.pdf [SSC] Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Petre Rodan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2023-12-11doc: iio: Document intensity scale as poorly definedMarek Vasut1-1/+3
Add comment about intensity scale being poorly defined and having no proper units. Signed-off-by: Marek Vasut <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Cameron <[email protected]>
2023-12-11dt-bindings: iio: temperature: add MLX90635 deviceCrt Mori1-2/+17
Add device tree bindings for MLX90635 Infra Red contactless temperature sensor. Signed-off-by: Crt Mori <[email protected]> Reviewed-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/0313c3b9f7490c32891627feb5ef35d5e5d9aae9.1701872051.git.cmo@melexis.com Signed-off-by: Jonathan Cameron <[email protected]>