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2021-06-05arm64: dts: qcom: msm8916-samsung-a3u: Add touch key regulatorsMichael Srba1-0/+47
The touch key MCU and LED is supplied by two separate fixed regulators that can be enabled through GPIO 86 and 60. Add them to the device tree. Signed-off-by: Michael Srba <[email protected]> [stephan: extend commit message] Signed-off-by: Stephan Gerhold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2021-06-05arm64: dts: qcom: msm8916-samsung-a2015: Add touch keyStephan Gerhold1-0/+45
The Samsung Galaxy A3/A5 both have two capacitive touch keys, connected to an ABOV MCU. It implements the same interface as implemented by the tm2-touchkey driver and works just fine with the coreriver,tc360-touchkey compatible. It's probably actually some Samsung-specific interface that they implement with different MCUs. Note that for some reason Samsung decided to connect this to GPIOs where no hardware I2C bus is available, so we need to fall back to software bit-banging using i2c-gpio. The vdd/vcc-supply is board-specific and will be added separately for a3u/a5u. Co-developed-by: Michael Srba <[email protected]> Signed-off-by: Michael Srba <[email protected]> Signed-off-by: Stephan Gerhold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2021-06-05arm64: dts: qcom: pm6150: Add thermal zone for PMIC on-die temperatureMatthias Kaehlcke1-0/+24
Add a thermal zone for the pm6150 on-die temperature. The system should try to shut down orderly when the temperature reaches the critical trip point at 115°C, otherwise the PMIC will perform a HW power off at 145°C. Reviewed-by: Stephen Boyd <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Matthias Kaehlcke <[email protected]> Link: https://lore.kernel.org/r/20210603081215.v2.1.Id4510e9e4baaa3f6c9fdd5cdf4d8606e63c262e3@changeid Signed-off-by: Bjorn Andersson <[email protected]>
2021-06-04ARM: dts: keystone: k2g-evm: Move audio oscillator assigned clock to mcaspNishanth Menon1-8/+3
Setting assigned clock with a dependency on itself for k2g_clks creates a circular dependency. Instead, Lets model the audio clock as a assigned-clock configuration for mcasp and set it up as the first clock assigned-clock to be satisfied. Following the standard convention, we use null entries to indicate entries that doesn't need to be programmed. Reviewed-by: Tero Kristo <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]>
2021-06-04ARM: dts: keystone: k2g: Rename the TI-SCI clocks node nameNishanth Menon1-1/+1
We currently use clocks as the node name for the node representing TI-SCI clock nodes. This is better renamed to being clock-controller as that is a better representative of the system controller function as a clock controller for the SoC. Reviewed-by: Tero Kristo <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]>
2021-06-04ARM: dts: keystone: k2g: Rename the TI-SCI nodeNishanth Menon1-1/+1
Lets rename the node name of TI-SCI node to be system-controller as it is a better standardized name for the function that TI-SCI plays in the SoC. Reviewed-by: Tero Kristo <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]>
2021-06-04ARM: dts: keystone: k2g: Rename message-manager nodeNishanth Menon1-1/+1
Rename message-manager instance node name to be better aligned with current style of device tree nodes for mailboxes. Reviewed-by: Tero Kristo <[email protected]> Acked-by: Suman Anna <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Signed-off-by: Santosh Shilimkar <[email protected]>
2021-06-04ARM: dts: BCM5301X: Fixup SPI bindingRafał Miłecki1-9/+9
1. Reorder interrupts 2. Fix typo: s/spi_lr_overhead/spi_lr_overread/ 3. Rename node: s/spi-nor@0/flash@0/ This fixes: arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dt.yaml: spi@18029200: interrupt-names: 'oneOf' conditional failed, one must be fixed: ['spi_lr_fullness_reached', 'spi_lr_session_aborted', 'spi_lr_impatient', 'spi_lr_session_done', 'spi_lr_overhead', 'mspi_done', 'mspi_halted'] is too long Additional items are not allowed ('spi_lr_session_aborted', 'spi_lr_impatient', 'spi_lr_session_done', 'spi_lr_overhead', 'mspi_done', 'mspi_halted' were unexpected) 'mspi_done' was expected 'spi_l1_intr' was expected 'mspi_halted' was expected 'spi_lr_fullness_reached' was expected 'spi_lr_session_aborted' was expected 'spi_lr_impatient' was expected 'spi_lr_session_done' was expected 'spi_lr_overread' was expected From schema: Documentation/devicetree/bindings/spi/brcm,spi-bcm-qspi.yaml arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dt.yaml: spi-nor@0: $nodename:0: 'spi-nor@0' does not match '^flash(@.*)?$' From schema: Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml Signed-off-by: Rafał Miłecki <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
2021-06-04dt-bindings: i2c: at91: fix example for scl-gpiosNicolas Ferre1-1/+1
The SCL gpio pin used by I2C bus for recovery needs to be configured as open drain, so fix the binding example accordingly. In relation with fix c5a283802573 ("ARM: dts: at91: Configure I2C SCL gpio as open drain"). Signed-off-by: Nicolas Ferre <[email protected]> Fixes: 19e5cef058a0 ("dt-bindings: i2c: at91: document optional bus recovery properties")
2021-06-04ARM: dts: aspeed-g5: Add SCU phandle to GFX nodeJoel Stanley1-0/+1
In v5.13 the DRM driver gained support for using a phandle to the SCU, instead of matching on the scu compatible. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]>
2021-06-04ARM: dts: aspeed: Everest: Add directly controlled LEDsVishwanatha Subbanna1-2/+31
These LEDs are directly connected to the BMC's GPIO bank Signed-off-by: Eddie James <[email protected]> Signed-off-by: Vishwanatha Subbanna <[email protected]> Signed-off-by: Joel Stanley <[email protected]>
2021-06-04ARM: dts: aspeed: Rainier 4U: Remove fan updatesEddie James1-30/+0
The 4U fans do not need a different "tach-pulses" property than the 2U machine. In addition, the "maxim,fan-dual-tach" property does not exist upstream yet, so it should also be removed. Signed-off-by: Eddie James <[email protected]> Signed-off-by: Joel Stanley <[email protected]>
2021-06-04ARM: dts: aspeed: Everest: Fix cable card PCA chipsSantosh Puranik1-85/+83
Correct two PCA chips which were placed on the wrong I2C bus and address. Signed-off-by: Eddie James <[email protected]> Signed-off-by: Santosh Puranik <[email protected]> Signed-off-by: Joel Stanley <[email protected]>
2021-06-03ARM: dts: aspeed: Grow u-boot partition 64MiB OpenBMC flash layoutTroy Lee2-40/+10
Aspeed AST2600 u-boot requires 600KiB+ flash space. Sharing the same openbmc-flash-layout-64.dtsi requires to resize the flash partition. The updated flash layout as follows: - u-boot: 896 KiB - u-boot-env: 128 KiB - kernel: 9MiB - rofs: 32 MiB - rwfs: 22 MiB Signed-off-by: Troy Lee <[email protected]> Reviewed-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]>
2021-06-03ARM: dts: aspeed: mtjade: switch to 64MB flash layoutQuan Nguyen1-1/+1
As the 32MB flash layout will soon be exhausted, switch to 64MB layout. Signed-off-by: Quan Nguyen <[email protected]> Signed-off-by: Phong Vo <[email protected]> Signed-off-by: Thang Q. Nguyen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]>
2021-06-03ARM: dts: aspeed: mtjade: Add PSU supportQuan Nguyen1-2/+40
Enable PSU support on Ampere's Mt. Jade BMC. Signed-off-by: Quan Nguyen <[email protected]> Signed-off-by: Phong Vo <[email protected]> Signed-off-by: Thang Q. Nguyen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]>
2021-06-03ARM: dts: aspeed: mtjade: Enable OCP card support via NC-SIQuan Nguyen1-1/+12
Enable OCP card support on Ampere's Mt. Jade BMC. Signed-off-by: Quan Nguyen <[email protected]> Signed-off-by: Phong Vo <[email protected]> Signed-off-by: Thang Q. Nguyen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]>
2021-06-03ARM: dts: aspeed: Set earlycon boot argumentJoel Stanley29-29/+29
Most of the aspeed boards have copied the 'earlyprink' string in the bootargs. However, there's no earlyprink driver configured in the defconfigs, so this does nothing. A combination of setting stdout in the chosen node and adding earlycon to bootargs causes early serial output to appear early. This changes all boards to use this option. The console=ttyS4,115200 option is still required, as this is used by the run time uart driver. Signed-off-by: Joel Stanley <[email protected]> Acked-by: Andrew Jeffery <[email protected]> Acked-by: Alexander Filippov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]>
2021-06-03ARM: dts: aspeed-g6: Add pinctrl settingsSteven Lee1-0/+10
AST2600 supports 2 SGPIO master interfaces and 2 SGPIO slave interfaces. Currently, only SGPIO master 1 and SGPIO slve 1 in the pinctrl dtsi. SGPIO master 2 and slave 2 should be added in pinctrl dtsi as well. Signed-off-by: Steven Lee <[email protected]> Reviewed-by: Andrew Jeffery <[email protected]> Reviewed-by: Linus Walleij <[email protected]> Acked-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joel Stanley <[email protected]>
2021-06-02arm64: dts: mt8183: add supply name for eepromHsin-Yi Wang3-0/+12
Add supplies for eeprom for mt8183 boards. Signed-off-by: Hsin-Yi Wang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2021-06-02arm64: dts: mt8183: remove syscon from smi_common nodeHsin-Yi Wang1-1/+2
We don't need to register smi_common as syscon. Also add required property power-domains for this node. Signed-off-by: Hsin-Yi Wang <[email protected]> Reviewed-by: Enric Balletbo i Serra <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2021-06-02ARM: dts: at91: sama5d4: fix pinctrl muxingLudovic Desroches1-1/+1
Fix pinctrl muxing, PD28, PD29 and PD31 can be muxed to peripheral A. It allows to use SCK0, SCK1 and SPI0_NPCS2 signals. Signed-off-by: Ludovic Desroches <[email protected]> Fixes: 679f8d92bb01 ("ARM: at91/dt: sama5d4: add pioD pin mux mask and enable pioD") Cc: [email protected] # v4.4+ Reviewed-by: Claudiu Beznea <[email protected]> Signed-off-by: Nicolas Ferre <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2021-06-01arm64: dts: qcom: sc7180: add label for secondary mi2sJudy Hsiao1-1/+1
Adds label for MI2S secondary block to allow follower projects to override for the four speaker support which uses I2S SD1 line on gpio52 pin. Reviewed-by: Stephen Boyd <[email protected]> Signed-off-by: Judy Hsiao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2021-06-01dt-bindings: soc: tegra-pmc: Document core power domainDmitry Osipenko1-0/+35
All NVIDIA Tegra SoCs have a core power domain where majority of hardware blocks reside. Document the new core power domain properties. Reviewed-by: Rob Herring <[email protected]> Reviewed-by: Ulf Hansson <[email protected]> Signed-off-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-06-01ARM: dts: stm32: fix timer nodes on STM32 MCU to prevent warningsAlexandre Torgue3-20/+0
Prevent warning seen with "make dtbs_check W=1" command: Warning (avoid_unnecessary_addr_size): /soc/timers@40001c00: unnecessary address-cells/size-cells without "ranges" or child "reg" property Reviewed-by: Fabrice Gasnier <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2021-06-01ARM: dts: stm32: fix RCC node name on stm32f429 MCUAlexandre Torgue1-1/+1
This prevent warning observed with "make dtbs_check W=1" Warning (simple_bus_reg): /soc/rcc@40023810: simple-bus unit address format error, expected "40023800" Signed-off-by: Alexandre Torgue <[email protected]>
2021-06-01ARM: dts: stm32: fix gpio-keys node on STM32 MCU boardsAlexandre Torgue5-21/+11
Fix following warning observed with "make dtbs_check W=1" command. It concerns f429 eval and disco boards, f769 disco board. Warning (unit_address_vs_reg): /gpio_keys/button@0: node has a unit name, but no reg or ranges property Signed-off-by: Alexandre Torgue <[email protected]>
2021-06-01ARM: dts: stm32: fix stm32mp157c-odyssey card detect pinGrzegorz Szymaszek1-1/+1
The microSD card detect pin is physically connected to the MPU pin PI3. The Device Tree configuration of the card detect pin was wrong—it was set to pin PB7 instead. If such configuration was used, the kernel would hang on “Waiting for root device” when booting from a microSD card. Signed-off-by: Grzegorz Szymaszek <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2021-06-01arm64: dts: meson: set 128bytes FIFO size on uart ANeil Armstrong3-0/+3
The first UART controller in "Everything-Else" power domain, usually used for Bluetooth HCI has 128bytes FIFO depth. Signed-off-by: Neil Armstrong <[email protected]> Reviewed-by: Martin Blumenstingl <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2021-06-01ARM: dts: stm32: Configure qspi's mdma transfer to block for stm32mp151Patrice Chotard1-2/+2
Configure qspi's mdma from buffer transfer (max 128 bytes) to block transfer (max 64K bytes). mtd_speedtest shows that write throughtput increases : - from 734 to 782 KiB/s (~6.5%) with s25fl512s SPI-NOR. - from 4848 to 5319 KiB/s (~9.72%) with Micron SPI-NAND. Signed-off-by: Christophe Kerello <[email protected]> Signed-off-by: Patrice Chotard <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2021-06-01ARM: dts: stm32: Fix touchscreen node on dhcom-pdk2Marek Vasut1-2/+2
Fix make dtbs_check warning: arch/arm/boot/dts/stm32mp157c-dhcom-pdk2.dt.yaml:0:0: /soc/i2c@40015000/polytouch@38: failed to match any schema with compatible: ['edt,edt-ft5x06'] Signed-off-by: Marek Vasut <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Patrice Chotard <[email protected]> Cc: Patrick Delaunay <[email protected]> Cc: [email protected] To: [email protected] Signed-off-by: Alexandre Torgue <[email protected]>
2021-06-01ARM: dts: stm32: Remove extra size-cells on dhcom-pdk2Marek Vasut1-2/+0
Fix make dtbs_check warning: arch/arm/boot/dts/stm32mp157c-dhcom-pdk2.dt.yaml: gpio-keys-polled: '#address-cells' is a dependency of '#size-cells' arch/arm/boot/dts/stm32mp157c-dhcom-pdk2.dt.yaml: gpio-keys: '#address-cells' is a dependency of '#size-cells' Signed-off-by: Marek Vasut <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Patrice Chotard <[email protected]> Cc: Patrick Delaunay <[email protected]> Cc: [email protected] To: [email protected] Signed-off-by: Marek Vasut <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2021-05-31arm64: dts: qcom: sc7280: Add "google,senor" to the compatibleRajendra Nayak1-1/+1
The sc7280 IDP board is also called senor in the Chrome OS builds. Add the "google,senor" compatible so coreboot/depthcharge knows what device tree blob to pick Reviewed-by: Matthias Kaehlcke <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Rajendra Nayak <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2021-05-31dt-bindings: arm: qcom: Document google,senor boardRajendra Nayak1-0/+1
Document the google,senor board based on sc7280 SoC Acked-by: Rob Herring <[email protected]> Reviewed-by: Matthias Kaehlcke <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Rajendra Nayak <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2021-05-31arm64: dts: qcom: sc7280: Add nodes to boot WPSSSibi Sankar1-0/+138
Add miscellaneous nodes to boot the Wireless Processor Subsystem (WPSS) on SC7280 SoCs. Signed-off-by: Sibi Sankar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2021-05-31dt-bindings: mailbox: Add WPSS client index to IPCCSibi Sankar1-0/+1
Add WPSS remote processor client index to Inter-Processor Communication Controller (IPCC) block. Acked-by: Rob Herring <[email protected]> Reviewed-by: Stephen Boyd <[email protected]> Signed-off-by: Sibi Sankar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2021-05-31arm64: dts: qcom: sc7180: Move rmtfs memory regionSujit Kautkar1-1/+1
Move rmtfs memory region so that it does not overlap with system RAM (kernel data) when KAsan is enabled. This puts rmtfs right after mba_mem which is not supposed to increase beyond 0x94600000 Reviewed-by: Sibi Sankar <[email protected]> Signed-off-by: Sujit Kautkar <[email protected]> Link: https://lore.kernel.org/r/20210514113430.1.Ic2d032cd80424af229bb95e2c67dd4de1a70cb0c@changeid Signed-off-by: Bjorn Andersson <[email protected]>
2021-05-31arm64: dts: qcom: sc7280: Add clock controller nodesTaniya Das1-0/+54
Add support for the video, gpu, display, lpass clock controller device nodes for SC7280 SoC. Signed-off-by: Taniya Das <[email protected]> Link: https://lore.kernel.org/r/[email protected] [bjorn: Dropped includes, as they are not present in v5.13-rc1] Signed-off-by: Bjorn Andersson <[email protected]>
2021-05-31arm64: dts: qcom: sc7280: Add cpufreq hw nodeTaniya Das1-0/+18
Add cpufreq HW device node to scale 4-Silver/3-Gold/1-Gold+ cores on SC7280 SoCs. Reviewed-by: Matthias Kaehlcke <[email protected]> Signed-off-by: Taniya Das <[email protected]> Link: https://lore.kernel.org/r/[email protected] [bjorn: Dropped reg-names] Signed-off-by: Bjorn Andersson <[email protected]>
2021-05-31arm64: dts: qcom: sc7180: coachz: Add thermal config for skin temperatureMatthias Kaehlcke2-0/+72
Add ADC and thermal monitor configuration for skin temperature, plus a thermal zone that monitors the skin temperature and uses the big cores as cooling devices. CoachZ rev1 is stuffed with an incompatible thermistor for the skin temperature, disable the thermal zone for rev1 to avoid the use of bogus temperature values. Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Matthias Kaehlcke <[email protected]> Link: https://lore.kernel.org/r/20210414111007.v1.1.I1a438604a79025307f177347d45815987b105cb5@changeid Signed-off-by: Bjorn Andersson <[email protected]>
2021-05-31arm64: dts: qcom: sc7180: Fix sc7180-qmp-usb3-dp-phy reg sizesDouglas Anderson1-2/+2
As per Dmitry Baryshkov [1]: a) The 2nd "reg" should be 0x3c because "Offset 0x38 is USB3_DP_COM_REVISION_ID3 (not used by the current driver though)." b) The 3rd "reg" "is a serdes region and qmp_v3_dp_serdes_tbl contains registers 0x148 and 0x154." I think because the 3rd "reg" is a serdes region we should just use the same size as the 1st "reg"? [1] https://lore.kernel.org/r/[email protected] Reviewed-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Stephen Boyd <[email protected]> Cc: Stephen Boyd <[email protected]> Cc: Jeykumar Sankaran <[email protected]> Cc: Chandan Uddaraju <[email protected]> Cc: Vara Reddy <[email protected]> Cc: Tanmay Shah <[email protected]> Cc: Rob Clark <[email protected]> Fixes: 58fd7ae621e7 ("arm64: dts: qcom: sc7180: Update dts for DP phy inside QMP phy") Reported-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Douglas Anderson <[email protected]> Link: https://lore.kernel.org/r/20210315103836.1.I9a97120319d43b42353aeac4d348624d60687df7@changeid Signed-off-by: Bjorn Andersson <[email protected]>
2021-05-31arm64: dts: qcom: sm8250: fix display nodesJonathan Marek1-2/+2
Use sm8250 compatibles instead of sdm845 compatibles Reviewed-by: Stephen Boyd <[email protected]> Signed-off-by: Jonathan Marek <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2021-05-31arm64: dts: qcom: c630: Add no-hpd to DSI bridge nodeStephen Boyd1-0/+2
We should indicate that we're not using the HPD pin on this device, per the binding document. Otherwise if code in the future wants to enable HPD in the bridge when this property is absent we'll be enabling HPD when it isn't supposed to be used. Presumably this board isn't using hpd on the bridge. Reviewed-by: Douglas Anderson <[email protected]> Cc: Laurent Pinchart <[email protected]> Cc: Douglas Anderson <[email protected]> Cc: Steev Klimaszewski <[email protected]> Fixes: 956e9c85f47b ("arm64: dts: qcom: c630: Define eDP bridge and panel") Signed-off-by: Stephen Boyd <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2021-05-31arm64: dts: qcom: Harmonize DWC USB3 DT nodes nameSerge Semin9-14/+14
In accordance with the DWC USB3 bindings the corresponding node name is suppose to comply with the Generic USB HCD DT schema, which requires the USB nodes to have the name acceptable by the regexp: "^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly named. Signed-off-by: Serge Semin <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Reviewed-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2021-05-31arm64: dts: qcom: trogdor: Add no-hpd to DSI bridge nodeStephen Boyd1-0/+2
We should indicate that we're not using the HPD pin on this device, per the binding document. Otherwise if code in the future wants to enable HPD in the bridge when this property is absent we'll be wasting power powering hpd when we don't use it on trogdor boards. We didn't notice this before because the kernel driver blindly disables hpd, but that won't be true for much longer. Reviewed-by: Laurent Pinchart <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Cc: Laurent Pinchart <[email protected]> Cc: Douglas Anderson <[email protected]> Fixes: 7ec3e67307f8 ("arm64: dts: qcom: sc7180-trogdor: add initial trogdor and lazor dt") Signed-off-by: Stephen Boyd <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2021-05-31arm64: dts: qcom: msm8994-angler: Fix gpio-reserved-ranges 85-88Petr Vorel1-0/+4
Reserve GPIO pins 85-88 as these aren't meant to be accessible from the application CPUs (causes reboot). Yet another fix similar to 9134586715e3, 5f8d3ab136d0, which is needed to allow angler to boot after 3edfb7bd76bd ("gpiolib: Show correct direction from the beginning"). Fixes: feeaf56ac78d ("arm64: dts: msm8994 SoC and Huawei Angler (Nexus 6P) support") Signed-off-by: Petr Vorel <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2021-05-31arm64: dts: qcom: msm8996: Make CPUCC actually probe (and work)Konrad Dybcio1-1/+6
Fix the compatible to make the driver probe and tell the driver where to look for the "xo" clock to make sure everything works. Then we get a happy (eh, happier) 8996: somainline-sdcard:/home/konrad# cat /sys/kernel/debug/clk/pwrcl_pll/clk_rate 1152000000 Don't backport without "arm64: dts: qcom: msm8996: Add CPU opps", as the system fails to boot without consumers for these clocks. Signed-off-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2021-05-31arm64: dts: qcom: msm8996: Add CPU oppsLoic Poulain1-0/+234
Add the operating points capabilities of the kryo CPUs, that can be used for frequency scaling. There are two differents operating point tables, one for the big cluster and one for the LITTLE cluster. This frequency scaling support can then be used as a passive cooling device (cpufreq cooling device). Only add nominal fmax for now, since there is no dynamic control of VDD APC (s11..) which is statically set at its nominal value. Original patch link: https://patchwork.kernel.org/project/linux-arm-msm/patch/[email protected]/ Signed-off-by: Loic Poulain <[email protected]> [konrad: drop the thermals part, rebase and remove spaces within <>] Signed-off-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2021-05-31arm64: dts: qcom: sc7180: Add CoachZ rev3Matthias Kaehlcke5-11/+20
CoachZ rev3 uses a 100k NTC thermistor for the charger temperatures, instead of the 47k NTC that is stuffed in earlier revisions. Add .dts files for rev3. The 47k NTC currently isn't supported by the PM6150 ADC driver. Disable the charger thermal zone for rev1 and rev2 to avoid the use of bogus temperature values. This also gets rid of the explicit DT files for rev2 and handles rev2 in the rev1 .dts instead. There was some back and forth downstream involving the 'dmic_clk_en' pin, after that was sorted out the DT for rev1 and rev2 is the same. Signed-off-by: Matthias Kaehlcke <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Link: https://lore.kernel.org/r/20210322094628.v4.3.I95b8a63103b77cab6a7cf9c150f0541db57fda98@changeid Signed-off-by: Bjorn Andersson <[email protected]>
2021-05-31arm64: dts: qcom: sc7180: Add pompom rev3Matthias Kaehlcke7-31/+83
The only kernel visible change with respect to rev2 is that pompom rev3 changed the charger thermistor from a 47k to a 100k NTC to use a thermistor which is supported by the PM6150 ADC driver. Disable the charger thermal zone for pompom rev1 and rev2 to avoid the use of bogus temperature values from the unsupported thermistor. Signed-off-by: Matthias Kaehlcke <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Link: https://lore.kernel.org/r/20210322094628.v4.2.I4138c3edee23d1efa637eef51e841d9d2e266659@changeid Signed-off-by: Bjorn Andersson <[email protected]>
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