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2021-06-10Merge tag 'renesas-r9a07g044-dt-binding-defs-tag' into renesas-arm-dt-for-v5.14Geert Uytterhoeven1-0/+89
Renesas RZ/G2L DT Binding Definitions Clock definitions for the Renesas RZ/G2L (R9A07G044) SoC, shared by driver and DT source files.
2021-06-10ARM: dts: stm32: add a new DCMI pins group on stm32mp15Grzegorz Szymaszek1-0/+33
The Seeed Odyssey-STM32MP157C board has a 20-pin DVP camera output. stm32mp15-pinctrl.dtsi contained one pin state definition for the DCMI interface, dcmi-0, AKA phandle dcmi_pins_a. This definition was incompatible with the pins used on the Odyssey board, where: - there are 8 data pins instead of 12, - DCMI_HSYNC is available at PA4 instead of PH8, - DCMI_D0 is at PC6 instead of PH9, - DCMI_D3 is at PE1 instead of PH12, - DCMI_D4 is at PE11 instead of PH14, - DCMI_D5 is at PD3 instead of PI4, - DCMI_D6 is at PE13 instead of PB8, - DCMI_D7 is at PB9 instead of PE6. Add the DCMI pins used on the Odyssey board as a new DCMI pin state definition, dcmi-1, AKA phandle dcmi_pins_b. Signed-off-by: Grzegorz Szymaszek <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2021-06-10dt-bindings: power: renesas,rzg2l-sysc: Add DT binding documentation for ↵Lad Prabhakar1-0/+63
SYSC controller Add DT binding documentation for SYSC controller found on RZ/G2{L,LC,UL} SoC's. SYSC block contains the LSI_DEVID register which is used to retrieve SoC product information. Signed-off-by: Lad Prabhakar <[email protected]> Reviewed-by: Biju Das <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]>
2021-06-10dt-bindings: arm: renesas: Document SMARC EVKLad Prabhakar1-0/+2
Document Renesas SMARC EVK board which are based on RZ/G2L (R9A07G044) SoC. The SMARC EVK consists of RZ/G2L SoM module and SMARC carrier board, the SoM module sits on top of carrier board. Signed-off-by: Lad Prabhakar <[email protected]> Reviewed-by: Biju Das <[email protected]> Reviewed-by: Chris Paterson <[email protected]> Acked-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]>
2021-06-10dt-bindings: arm: renesas: Document Renesas RZ/G2{L,LC} SoC variantsLad Prabhakar1-0/+9
Add device tree bindings documentation for Renesas RZ/G2{L,LC} SoC variants. Signed-off-by: Lad Prabhakar <[email protected]> Reviewed-by: Biju Das <[email protected]> Reviewed-by: Chris Paterson <[email protected]> Acked-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]>
2021-06-10dt-bindings: arm: renesas: Document Renesas RZ/G2UL SoCLad Prabhakar1-0/+7
Add device tree bindings documentation for Renesas RZ/G2UL SoC. Signed-off-by: Lad Prabhakar <[email protected]> Reviewed-by: Biju Das <[email protected]> Reviewed-by: Chris Paterson <[email protected]> Acked-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]>
2021-06-10dt-bindings: clock: Add r9a07g044 CPG Clock DefinitionsLad Prabhakar1-0/+89
Define RZ/G2L (R9A07G044) Clock Pulse Generator Core Clock and module clock outputs, as listed in Table 8.3 ("Clock List") of the RZ/G2L Hardware User's Manual (Rev.0.42, Feb.2021). Signed-off-by: Lad Prabhakar <[email protected]> Reviewed-by: Biju Das <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]>
2021-06-10ARM: dts: stm32: fix ltdc pinctrl on microdev2.0-of7Alexandre Torgue1-1/+1
It prevents the following warning: pin-controller@50002000: 'ltdc' does not match any of the regexes: '-[0-9]*$', '^gpio@[0-9a-f]*$', 'pinctrl-[0-9]+' Signed-off-by: Alexandre Torgue <[email protected]>
2021-06-10dt-bindings: net: document ptp_ref clk in dwmacAlexandre Torgue1-2/+4
ptp_ref clk has been added in DT but not documented which makes yaml validation failed: ethernet@5800a000: clocks: [[6, 105], [6, 103], [6, 104], [6, 123], [6, 169], [6, 112]] is too long ethernet@5800a000: clock-names: ['stmmaceth', 'mac-clk-tx', 'mac-clk-rx', 'eth-ck', 'ptp_ref', 'ethstp'] is too long Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
2021-06-10ARM: dts: stm32: move stmmac axi config in ethernet node on stm32mp15Alexandre Torgue1-6/+6
It fixes the following warning seen running "make dtbs_check W=1" Warning (simple_bus_reg): /soc/stmmac-axi-config: missing or empty reg/ranges property Signed-off-by: Alexandre Torgue <[email protected]>
2021-06-10ARM: dts: stm32: fix i2c node name on stm32f746 to prevent warningsAlexandre Torgue1-2/+2
Replace upper case by lower case in i2c nodes name. Signed-off-by: Alexandre Torgue <[email protected]>
2021-06-10ARM: dts: stm32: update pinctrl node name on STM32 MCU to prevent warningsAlexandre Torgue4-79/+71
Update node name to avoid a DT schema validation issue seen with "make dtbs_check W=1". It also cleans picntrl dtsi files for f429/f469 MCU. Signed-off-by: Alexandre Torgue <[email protected]>
2021-06-09Merge tag 'tags/bcm2835-dt-next-2021-06-08-v2' into devicetree/nextFlorian Fainelli25-97/+161
- Fixup MMC node names - Fixup led node names - Introduce new devicetree file for Raspberry Pi 400 - Introduce devicetree bindings for Raspberry Pi 400 - Fix issue with dwc2's FIFO's size - Add VEC compatible for bcm2711 Signed-off-by: Florian Fainelli <[email protected]>
2021-06-09arm64: dts: mt8183: Add node for the Mali GPUNicolas Boichat4-0/+120
Add a basic GPU node for mt8183, as well as OPP table. Note that with the current panfrost driver, devfreq is not actually functional, as the we do not have platform-specific support for >1 supplies. Also, we are missing code to handle frequency change, as the GPU frequency needs to be switched away to a stable 26Mhz clock during the transition. Signed-off-by: Nicolas Boichat <[email protected]> Link: https://lore.kernel.org/r/20210521200038.v14.1.I9f45f5c1f975422d58b5904d11546349e9ccdc94@changeid Signed-off-by: Matthias Brugger <[email protected]>
2021-06-09arm64: dts: juno: Update SCPI nodes as per the YAML schemaSudeep Holla1-3/+3
The SCPI YAML schema expects standard node names for clocks and power domain controllers. Fix those as per the schema for Juno platforms. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Sudeep Holla <[email protected]>
2021-06-09arm64: dts: mt8183-kukui: Add tboard thermal zonesMichael Kao2-1/+15
Add tboard thermal zones. The tboard thermal sensors are a kind of NTC sensors which are located on PCB board to correlate the temperature of the case (Tskin). pull-up voltage: 1800 mv pull-up resistor: 75K Vsense = pull-up voltage * Rntc / ( pull-up resistor + Rntc ) AuxIn = Vsense * 4096 / 1500 Signed-off-by: Michael Kao <[email protected]> Signed-off-by: Ben Tseng <[email protected]> Tested-by: Hsin-Yi Wang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2021-06-09arm64: dts: mt8183: add cbas node under cros_ecIkjoon Jang1-0/+4
Add a 'cbas' device node for supporting tablet mode switch in kukui devices. Kukui platforms with detacheable base have an additional input device under cros-ec, which reports SW_TABLET_MODE regarding its base state (e.g. base flipped or detached). Signed-off-by: Ikjoon Jang <[email protected]> Reviewed-by: Enric Balletbo i Serra <[email protected]> Reviewed-by: Stephen Boyd <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Matthias Brugger <[email protected]>
2021-06-08arm64: dts: broadcom: Add reference to RPi 400Stefan Wahren2-1/+4
This adds a reference to the dts of the Raspberry Pi 400, so we don't need to maintain the content in arm64. Signed-off-by: Stefan Wahren <[email protected]> Reviewed-by: Nicolas Saenz Julienne <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Nicolas Saenz Julienne <[email protected]>
2021-06-08ARM: dts: Add Raspberry Pi 400 supportStefan Wahren2-0/+46
The Raspberry Pi 400 is like a Pi 4 B designed into a keyboard. But there are some minor differences: - higher CPU clock rate (1.8 GHz) - different Wifi chip (BCM43456) - power off is now handled via GPIO - no ACT LED Signed-off-by: Stefan Wahren <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Nicolas Saenz Julienne <[email protected]>
2021-06-08ARM: dts: bcm283x: Fix up GPIO LED node namesStefan Wahren15-21/+21
Fix the node names for the GPIO LEDs to conform to the standard node name led-.. Signed-off-by: Stefan Wahren <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Nicolas Saenz Julienne <[email protected]>
2021-06-08dt-bindings: arm: bcm2835: Add Raspberry Pi 400 to DT schemaStefan Wahren1-0/+1
Add new Raspberry Pi 400 to DT schema. Signed-off-by: Stefan Wahren <[email protected]> Acked-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Nicolas Saenz Julienne <[email protected]>
2021-06-08arm64: tegra: Audio graph sound card for Jetson Xavier NXSameer Pujar1-0/+593
Enable support for audio-graph based sound card on Jetson Xavier NX. Following I/O interfaces are enabled. - I2S3 and I2S5 - DMIC1, DMIC2 and DMIC4 - DSPK1 and DSPK2 Signed-off-by: Sameer Pujar <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-06-08ARM: dts: imx6dl-prtvt7: Remove unused 'sound-dai-cells' from ssi1 nodeRobin van der Gracht1-1/+0
The 'fsl,ssi' documentation doesn't say anything about specifying this. Signed-off-by: Robin van der Gracht <[email protected]> Signed-off-by: Oleksij Rempel <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-06-08ARM: dts: imx6dl-prtvt7: The sgtl5000 uses i2s not ac97Robin van der Gracht1-1/+0
According to Documentation/devicetree/bindings/sound/fsl,ssi.txt 'fsl,mode' should be specified for AC97 mode only. Signed-off-by: Robin van der Gracht <[email protected]> Signed-off-by: Oleksij Rempel <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-06-08ARM: dts: imx6qdl-vicut1: add interrupt-counter nodesOleksij Rempel1-1/+40
interrupt-counter is mainline now, so we can add missing counter nodes. Signed-off-by: Oleksij Rempel <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-06-08ARM: dts: imx6dl-prtvt7: Enable the VPURobin van der Gracht1-4/+0
Enable Video Processing Unit to make accelerated video decoding work. Signed-off-by: Robin van der Gracht <[email protected]> Signed-off-by: Oleksij Rempel <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-06-08ARM: dts: imx6dl: enable touchscreen debounce filter on PLYM2M and PRTVT7 boardsOleksij Rempel2-1/+6
Activate low-pass/debounce filter on the touchscreen. Signed-off-by: Oleksij Rempel <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-06-08ARM: dts: imx6dl-plym2m: remove touchscreen-size-* propertiesOleksij Rempel1-2/+0
Remove touchscreen-size-* properties. This values are not correct, event if it works with ts_test tool, it fails to work properly with weston. Signed-off-by: Oleksij Rempel <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-06-08ARM: dts: imx6dl-prtvt7: fix PWM cell count for the backlight node.Oleksij Rempel1-2/+1
At some point PWM cell count was changed, but it didn't triggered any error, since this DT was overwriting "#pwm-cells". To make sure, we are in sync with the kernel driver, remove this property and fix the pwm consumer. Signed-off-by: Oleksij Rempel <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-06-08ARM: dts: imx6dl-prtvt7: Remove backlight enable gpioOleksij Rempel1-9/+0
The backlight power is controlled through the reg_bl_12v0 regulator. Co-Developed-by: Robin van der Gracht <[email protected]> Signed-off-by: Robin van der Gracht <[email protected]> Signed-off-by: Oleksij Rempel <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-06-08ARM: dts: imx6dl-prtvt7: add TSC2046 touchscreen nodeOleksij Rempel1-0/+15
Add touchscreen support to the Protonic VT7 board. Co-Developed-by: Robin van der Gracht <[email protected]> Signed-off-by: Robin van der Gracht <[email protected]> Signed-off-by: Oleksij Rempel <[email protected]> Signed-off-by: Shawn Guo <[email protected]>
2021-06-08ARM: dts: Move BCM2711 RPi specific into separate dtsiStefan Wahren2-71/+84
There is a lot of Raspberry Pi specific stuff (neither SoC or board specific) for the BCM2711 which is currently in the RPi 4 B dts. In order to avoid copy & paste for every new BCM2711 based Raspberry Pi, move it into a separate dtsi. Signed-off-by: Stefan Wahren <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Nicolas Saenz Julienne <[email protected]>
2021-06-08ARM: dts: bcm283x: Fix up MMC node namesStefan Wahren2-2/+2
Fix the node names for the MMC/SD card controller to conform to the standard node name mmc@.. Signed-off-by: Stefan Wahren <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Nicolas Saenz Julienne <[email protected]>
2021-06-08ARM: boot: dts: bcm2711: Add BCM2711 VEC compatibleMateusz Kwiatkowski1-0/+1
The BCM2711 has a slightly different VEC than the one found in the older SoCs. Now that we support the new variant, add its compatible to the device tree. Signed-off-by: Mateusz Kwiatkowski <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Nicolas Saenz Julienne <[email protected]>
2021-06-08Revert "ARM: dts: bcm283x: increase dwc2's RX FIFO size"Stefan Wahren2-2/+2
This reverts commit 278407a53c3b33fb820332c4d39eb39316c3879a. The original change breaks USB config on Raspberry Pi Zero and Pi 4 B, because it exceeds the total fifo size of 4080. A naive attempt to reduce g-tx-fifo-size doesn't help on Raspberry Pi Zero. So better go back. Fixes: 278407a53c3b ("ARM: dts: bcm283x: increase dwc2's RX FIFO size") Signed-off-by: Stefan Wahren <[email protected]> Cc: Pavel Hofman <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Nicolas Saenz Julienne <[email protected]>
2021-06-07arm64: dts: renesas: r8a779a0: Drop power-domains property from GIC nodeGeert Uytterhoeven1-1/+0
"make dtbs_check": arm64/boot/dts/renesas/r8a779a0-falcon.dt.yaml: interrupt-controller@f1000000: 'power-domains' does not match any of the regexes: '^(msi-controller|gic-its|interrupt-controller)@[0-9a-f]+$', '^gic-its@', '^interrupt-controller@[0-9a-f]+$', 'pinctrl-[0-9]+' From schema: Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml Remove the "power-domains" property, as the GIC on R-Car V3U is always-on, and not part of a clock domain. Fixes: 834c310f541839b6 ("arm64: dts: renesas: Add Renesas R8A779A0 SoC support") Signed-off-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Yoshihiro Shimoda <[email protected]> Link: https://lore.kernel.org/r/a9ae5cbc7c586bf2c6b18ddc665ad7051bd1d206.1622560236.git.geert+renesas@glider.be
2021-06-07arm64: dts: renesas: r8a77961: Add INTC-EX device nodeGeert Uytterhoeven1-1/+10
Populate the device node for the Interrupt Controller for External Devices (INTC-EX) on R-Car M3-W+, which serves external IRQ pins IRQ[0-5]. Signed-off-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Yoshihiro Shimoda <[email protected]> Link: https://lore.kernel.org/r/6f3cc1a1b6d777e743a7a9e66a80aaf9d5232a4f.1622547125.git.geert+renesas@glider.be
2021-06-07ARM: dts: aspeed: everest: Add pcie cable card indicator ledsVishwanatha Subbanna1-2/+618
These are leds on the IBM proprietary PCIE cards called cable cards. Cable cards have 2 ports on them and each port has an indicator led. Signed-off-by: Vishwanatha Subbanna <[email protected]> Signed-off-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2021-06-07ARM: dts: aspeed: everest: Add vrm and other indicator ledsVishwanatha Subbanna1-0/+270
This commit adds indicator leds for vrms, processors, opencapi connectors, tpm, planar, power distribution card and dasd backplane and are driven by PIC16F882. Signed-off-by: Vishwanatha Subbanna <[email protected]> Signed-off-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2021-06-07ARM: dts: aspeed: everest: Add dimm indicator ledsVishwanatha Subbanna1-0/+552
These are dimm indicator leds driven by PIC16F882. Signed-off-by: Vishwanatha Subbanna <[email protected]> Signed-off-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2021-06-07ARM: dts: aspeed: everest: Add pcie slot indicator ledsVishwanatha Subbanna1-0/+123
These are pcie slot indicator leds driven by PCA9552. Signed-off-by: Vishwanatha Subbanna <[email protected]> Signed-off-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2021-06-07ARM: dts: aspeed: everest: Add nvme and fan indicator ledsVishwanatha Subbanna1-0/+132
These are the indicator leds for nvme slots and fans and are driven by PCA9552. Signed-off-by: Vishwanatha Subbanna <[email protected]> Signed-off-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2021-06-07ARM: dts: aspeed: everest: Add system level indicator ledsVishwanatha Subbanna1-0/+42
These are the system level indicator leds that are driven by PCA9551 connected to the Operator Panel. Signed-off-by: Vishwanatha Subbanna <[email protected]> Signed-off-by: Joel Stanley <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2021-06-06arm64: dts: qcom: add initial device-tree for Microsoft Surface DuoFelipe Balbi2-0/+544
Microsoft Surface Duo is based on SM8150 chipset. This new Device Tree is a copy of sm8150-mtp with a the addition of the volume up key and relevant i2c nodes. Signed-off-by: Felipe Balbi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2021-06-06arm64: dts: qcom: sdm845-mtp: enable IPAAlex Elder1-0/+5
Enable IPA on the SDM845 MTP. Signed-off-by: Alex Elder <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2021-06-06arm64: dts: qcom: sc7180: SD-card GPIO pin set bias-pull upSujit Kautkar2-2/+2
Some SC7180 based boards do not have external pull-up for cd-gpio. Set this pin to internal pull-up for sleep config to avoid frequent regulator toggle events. Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Sujit Kautkar <[email protected]> Link: https://lore.kernel.org/r/20210602121313.v3.2.I52f30ddfe62041b7e6c3c362f0ad8f695ac28224@changeid Signed-off-by: Bjorn Andersson <[email protected]>
2021-06-06arm64: dts: qcom: sc7180: Move sdc pinconf to board specific DT filesSujit Kautkar3-102/+204
Move sdc1/sdc2 pinconf from SoC specific DT file to board specific DT files Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Sujit Kautkar <[email protected]> Link: https://lore.kernel.org/r/20210602121313.v3.1.Ia83c80aec3b9535f01441247b6c3fb6f80b0ec7f@changeid Signed-off-by: Bjorn Andersson <[email protected]>
2021-06-05arm64: dts: qcom: msm8916-samsung-a2015: Add NFCStephan Gerhold1-0/+64
The Samsung Galaxy A3/A5 both have a Samsung S3FWRN5 NFC chip that works quite well with the s3fwrn5 driver in the Linux NFC subsystem. The clock setup for the NFC chip is a bit special (although this seems to be a common approach used for Qualcomm devices with NFC): The NFC chip has an output GPIO that is asserted whenever the clock is needed to function properly. On the A3/A5 this is wired up to PM8916 GPIO2, which is then configured with a special function (NFC_CLK_REQ or BB_CLK2_REQ). Enabling the rpmcc RPM_SMD_BB_CLK2_PIN clock will then instruct PM8916 to automatically enable the clock whenever the NFC chip requests it. The advantage is that the clock is only enabled when needed and we don't need to manage it ourselves from the NFC driver. Note that for some reason Samsung decided to connect the I2C pins to GPIOs where no hardware I2C bus is available, so we need to fall back to software bit-banging with i2c-gpio. Cc: Krzysztof Kozlowski <[email protected]> Signed-off-by: Stephan Gerhold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2021-06-05arm64: dts: qcom: msm8916-samsung-a2015: Add rt5033 batteryStephan Gerhold1-0/+22
The Samsung Galaxy A3/A5 use a Richtek RT5033 PMIC as battery fuel gauge, charger, flash LED and for some regulators. For now, only add the fuel gauge/battery device to the device tree, so we can check the remaining battery percentage. The other RT5033 drivers need some more work first before they can be used properly. Signed-off-by: Stephan Gerhold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2021-06-05arm64: dts: qcom: msm8916-samsung-a5u: Add touch key regulatorStephan Gerhold1-0/+26
On the Samsung Galaxy A5 the touch key is supplied by a single fixed regulator (enabled via GPIO 97) that supplies both MCU and LED. Add it to the device tree. Signed-off-by: Stephan Gerhold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
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