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2016-06-07dt-bindings: Add root properties for Raspberry Pi 3Eric Anholt1-0/+4
Signed-off-by: Eric Anholt <[email protected]> Acked-by: Stephen Warren <[email protected]> Acked-by: Rob Herring <[email protected]>
2016-06-06arm64: dts: rockchip: add thermal nodes for rk3399 SoCsCaesar Wang1-0/+100
This adds thermal zone and tsadc nodes to rk3399 dtsi, rk3399 thermal data is including the cpu and gpu sensor zone node. The thermal zone node is the node containing all the required info for describing a thermal zone, including its cooling device bindings. The thermal zone node must contain, apart from its own properties, one sub-node containing trip nodes and one sub-node containing all the zone cooling maps. The following is the parameter is introduced: * polling-delay: The maximum number of milliseconds to wait between polls * polling-delay-passive: The maximum number of milliseconds to wait between polls when performing passive cooling. * trips: A sub-node which is a container of only trip point nodes required to describe the thermal zone. * cooling-maps: A sub-node which is a container of only cooling device map nodes, used to describe the relation between trips and cooling devices. * cooling-device: A phandle of a cooling device with its specifier, referring to which cooling device is used in this cooling specifier binding. In the cooling specifier, the first cell is the minimum cooling state and the second cell is the maximum cooling state used in this map. Signed-off-by: Caesar Wang <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]>
2016-06-06clk: renesas: cpg-mssr: Add support for R-Car M3-WGeert Uytterhoeven5-0/+201
Initial support for R-Car M3-W (r8a7796), including basic core clocks, and SCIF2 (console) and INTC-AP (GIC) module clocks. Signed-off-by: Geert Uytterhoeven <[email protected]> Tested-by: Simon Horman <[email protected]>
2016-06-06clk: renesas: cpg-mssr: Extract common R-Car Gen3 support codeGeert Uytterhoeven4-356/+408
Extract the code to support parts common to all members of the R-Car Gen3 SoC family into a separate file, to ease sharing among SoC-specific drivers. Note that while the cpg_pll_configs[] arrays and the selection of the config based on the MODE bits are identical on R-Car H3 and R-Car M3-W, they are not common, and may be different on other R-Car Gen3 SoCs. Signed-off-by: Geert Uytterhoeven <[email protected]> Tested-by: Simon Horman <[email protected]>
2016-06-06clk: renesas: Add r8a7796 CPG Core Clock DefinitionsGeert Uytterhoeven1-0/+69
Add all R-Car M3-W Clock Pulse Generator Core Clock Outputs, as listed in Table 8.2b ("List of Clocks [R-Car M3-W]") of the R-Car Gen3 datasheet (rev. 0.51 + Errata for Rev051 Mar 31 2016). Note that internal CPG clocks (S0, S1, S2, S3, SDSRC, and SSPSRC) are not included, as they are used as internal clock sources only, and never referenced from DT. Signed-off-by: Geert Uytterhoeven <[email protected]> Tested-by: Simon Horman <[email protected]>
2016-06-06clk: renesas: cpg-mssr: Document r8a7796 supportGeert Uytterhoeven1-3/+4
Signed-off-by: Geert Uytterhoeven <[email protected]> Acked-by: Rob Herring <[email protected]> Tested-by: Simon Horman <[email protected]>
2016-06-06soc: renesas: rcar-sysc: Add support for R-Car M3-W power areasGeert Uytterhoeven4-0/+53
Signed-off-by: Geert Uytterhoeven <[email protected]> Acked-by: Laurent Pinchart <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-06-06soc: renesas: Add r8a7796 SYSC PM Domain Binding DefinitionsGeert Uytterhoeven1-0/+36
Signed-off-by: Geert Uytterhoeven <[email protected]> Acked-by: Laurent Pinchart <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-06-06soc: renesas: rcar-sysc: Document r8a7796 supportGeert Uytterhoeven1-0/+1
Signed-off-by: Geert Uytterhoeven <[email protected]> Acked-by: Laurent Pinchart <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-06-03arm64: dts: Add dts files for LG Electronics's lg1313 SoCChanho Min3-0/+388
Add dtsi file to support lg1313 SoC which based on Cortex-A53. Also add dts file to support lg1312 reference board which based on lg1313 SoC. Signed-off-by: Chanho Min <[email protected]> Signed-off-by: Olof Johansson <[email protected]>
2016-06-03arm64: dts: mt8173: Add display subsystem related nodesCK Hu1-0/+223
This patch adds the device nodes for the DISP function blocks comprising the display subsystem. Signed-off-by: CK Hu <[email protected]> Signed-off-by: Cawa Cheng <[email protected]> Signed-off-by: Jie Qiu <[email protected]> Signed-off-by: Daniel Kurtz <[email protected]> Signed-off-by: Philipp Zabel <[email protected]> Signed-off-by: Matthias Brugger <[email protected]>
2016-06-01ARM64: dts: amlogic: Enable Reset Controller on GXBB-based platformsNeil Armstrong1-0/+7
Update DTSI file to add the reset controller node. Signed-off-by: Neil Armstrong <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
2016-06-01ARM64: dts: amlogic: gxbb: add ethernetKevin Hilman3-0/+45
Add node for ethernet interface and pinctrl pins. Enable on odroid-C2 and P20x boards. Acked-by: Carlo Caione <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
2016-06-01ARM64: dts: amlogic: gxbb: pinctrl: add/update UARTKevin Hilman2-1/+42
Add DT nodes for additional UARTs (UART B & C in EE domain) and add pins for all EE domain UARTs. Acked-by: Carlo Caione <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
2016-06-01ARM64: dts: amlogic: add pins for EMMC, SDKevin Hilman1-0/+21
Acked-by: Carlo Caione <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
2016-06-01ARM64: dts: amlogic: Enable pin controller on GXBB-based platformsCarlo Caione4-0/+59
Update DTS and DTSI files to enable the pin controller. We also now support the blinking blue LED on the Odroid-C2. Signed-off-by: Carlo Caione <[email protected]> Acked-by: Linus Walleij <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
2016-06-01documentation: Add compatibles for Amlogic Meson GXBB pin controllersCarlo Caione1-0/+2
Add the two new compatibles for the Amlogic Meson GXBB pin controllers. Signed-off-by: Carlo Caione <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
2016-06-01ARM64: dts: amlogic: Add hiu and periphs busesCarlo Caione1-0/+16
Add two new buses in the DTS: hiu and periphs buses. In the Amlogic S905/GXBB SoC several devices (clock / eth / pin controllers, etc...) are mapped under these two buses. Add them in the DT before starting to add new devices. Signed-off-by: Carlo Caione <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
2016-06-01dt-bindings: reset: Add bindings for the Meson SoC Reset ControllerNeil Armstrong3-0/+403
Add DT bindings for the Meson SoC Reset Controller documentation and the associated include file. Acked-by: Rob Herring <[email protected]> Signed-off-by: Neil Armstrong <[email protected]> Signed-off-by: Philipp Zabel <[email protected]>
2016-06-01reset: Add support for the Amlogic Meson SoC Reset ControllerNeil Armstrong2-0/+137
This patch adds the platform driver for the Amlogic Meson SoC Reset Controller. The Meson8b and GXBB SoCs are supported. Signed-off-by: Neil Armstrong <[email protected]> Signed-off-by: Philipp Zabel <[email protected]>
2016-06-01reset: Return -ENOTSUPP when not configuredJohn Youn1-2/+2
Prior to commit 6c96f05c8bb8 ("reset: Make [of_]reset_control_get[_foo] functions wrappers"), the "optional" functions returned -ENOTSUPP when CONFIG_RESET_CONTROLLER was not set. Revert back to the old behavior by changing the new __devm_reset_control_get() and __of_reset_control_get() functions to return ERR_PTR(-ENOTSUPP) when compiled without CONFIG_RESET_CONTROLLER. Otherwise they will return -EINVAL causing users to think that an error occurred when CONFIG_RESET_CONTROLLER is not set. Fixes: 6c96f05c8bb8 ("reset: Make [of_]reset_control_get[_foo] functions wrappers") Signed-off-by: John Youn <[email protected]> Signed-off-by: Philipp Zabel <[email protected]>
2016-05-31arm64: dts: NS2: Add CCI-400 PMU supportJon Mason1-0/+20
Add support to the Northstar 2 Device tree file for the ARM CCI-400 PMU. Signed-off-by: Jon Mason <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
2016-05-31arm64: dts: NS2: Add all of the UARTsJon Mason2-0/+46
Add all of the UARTs present on NS2 and enable them in the SVK device tree file. Also, do some magic to make sure that uart3 is discovered as ttyS0 (as that is the console UART). Signed-off-by: Jon Mason <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
2016-05-31arm64: dts: Enable GPIO for Broadcom NS2 SoCYendapally Reddy Dhananjaya Reddy1-0/+19
This enables the GPIO support for Broadcom NS2 SoC Signed-off-by: Yendapally Reddy Dhananjaya Reddy <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
2016-05-31arm64: dts: enable pinctrl for Broadcom NS2 SoCYendapally Reddy Dhananjaya Reddy2-0/+16
This enables the pinctrl support for Broadcom NS2 SoC Signed-off-by: Yendapally Reddy Dhananjaya Reddy <[email protected]> Reviewed-by: Ray Jui <[email protected]> Acked-by: Linus Walleij <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
2016-05-31arm64: dts: Add SATA3 AHCI and SATA3 PHY DT nodes for NS2Anup Patel2-0/+55
We have one dual-port SATA3 AHCI controller present in NS2 SoC. This patch enables SATA3 AHCI controller and SATA3 PHY for NS2 SoC in NS2 DT. Signed-off-by: Anup Patel <[email protected]> Reviewed-by: Ray Jui <[email protected]> Reviewed-by: Scott Branden <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
2016-05-31dt-bindings: ata: add compatible string for iProc AHCI controllerAnup Patel1-0/+1
The Broadcom iProc SoCs have AHCI compliant SATA controller. This patch adds common compatible string for AHCI SATA controller on iProc SoCs. Signed-off-by: Anup Patel <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
2016-05-31ARM: bcm2835: dt: Add the ethernet to the device treesLubomir Rintel7-0/+44
The hub and the ethernet in its port 1 are hardwired on the board. Compared to the adapters that can be plugged into the USB ports, this one has no serial EEPROM to store its MAC. Nevertheless, the Raspberry Pi has the MAC address for this adapter in its ROM, accessible from its firmware. U-Boot can read out the address and set the local-mac-address property of the node with "ethernet" alias. Let's add the node so that U-Boot can do its business. Model B rev2 and Model B+ entries were verified by me, the hierarchy and pid/vid pair for the Version 2 was provided by Peter Chen. Original Model B is a blind shot, though very likely correct. Signed-off-by: Lubomir Rintel <[email protected]> Acked-by: Stephen Warren <[email protected]> Signed-off-by: Eric Anholt <[email protected]>
2016-05-30arm64: dts: rockchip: add rk3399 io-domain core nodesHeiko Stuebner1-0/+10
Add the core io-domain nodes to grf and pmugrf which individual boards than just have to enable and add the necessary supplies to. Signed-off-by: Heiko Stuebner <[email protected]>
2016-05-30arm64: dts: rockchip: add rk3368-r88 iodomainsHeiko Stuebner1-0/+16
Add the supply-links according to the R88 schematics. Signed-off-by: Heiko Stuebner <[email protected]>
2016-05-30arm64: dts: rockchip: add rk3368 io-domain core nodesHeiko Stuebner1-0/+10
Add the core io-domain nodes to grf and pmugrf which individual boards than just have to enable and add the necessary supplies to. Signed-off-by: Heiko Stuebner <[email protected]>
2016-05-30arm64: dts: rockchip: make rk3368 grf syscons simple-mfdsHeiko Stuebner1-2/+2
The general register files do contain a lot of separate functions and while some really are only registers with a lot of different 1-bit settings, there are also a lot of them containing some bigger function blocks. To be able to define these as sub-devices, make them simple-mfds. Signed-off-by: Heiko Stuebner <[email protected]> Tested-by: David Wu <[email protected]>
2016-05-30arm64: dts: rockchip: enable eMMC for rk3399 EVBBrian Norris1-0/+12
Rockchip's rk3399 evaluation board has eMMC. Let's enable the newly-added nodes. Signed-off-by: Brian Norris <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]>
2016-05-30arm64: dts: rockchip: add sdhci/emmc for rk3399Brian Norris1-0/+20
Add description for the SDHCI v5.1 eMMC controller on rk3399. Fix it to 200 MHz, to support all supported timing modes. Note that 'rockchip,rk3399-sdhci-5.1' is not documented; we presumably have a compliant Arasan controller, but let's have a rockchip property as the canonical backup/precautionary measure. Per Heiko's previous suggestion, let's not clutter the arasan doc with it. Signed-off-by: Brian Norris <[email protected]> Reviewed-by: Shawn Lin <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]>
2016-05-30arm64: dts: rockchip: make rk3399's grf a "simple-mfd"Brian Norris1-2/+6
Per the examples in Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt, we need the grf node to be a simple-mfd in order to properly enumerate child devices like our eMMC PHY. Signed-off-by: Brian Norris <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> [directly mimic for the pmugrf, which will need the same change later and there is no need to pollute commit history with another patch] Signed-off-by: Heiko Stuebner <[email protected]>
2016-05-30arm64: dts: rockchip: assign default rates for core rk3399 clocksXing Zheng1-0/+16
These clocks are all core clocks used by many blocks/peripherals, many of whose drivers don't set their clock rates at all. Let's assign reasonable default clock rates for these core clocks, so that these peripherals get something reasonable by default, and also so that if child devices want to select a clock rate themselves, their muxes have some reasonable parent clock rates to branch off of (rather than just the boot-time defaults). This helps the eMMC PHY, for one, to get a reasonable ACLK rate. Signed-off-by: Xing Zheng <[email protected]> Signed-off-by: Brian Norris <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]>
2016-05-30reset: oxnas: Use devm register API and get rid of platform removeNeil Armstrong1-11/+1
Use the brand new devm_reset_controller_register() API to get rid of the platform driver remove callback. Signed-off-by: Neil Armstrong <[email protected]> Signed-off-by: Philipp Zabel <[email protected]>
2016-05-30reset: fix Kconfig menu to include reset drivers in sub-menuMasahiro Yamada2-1/+4
In "make menuconfig", reset drivers are currently lined up together with the reset sub-system menu, like this: -*- Reset Controller Support ---- < > Hi6220 Reset Driver (It also means, the menu "Reset Controller Support" is always empty.) "Hi6220 Reset Driver" should go into the sub-menu of the "Reset Controller Support". Signed-off-by: Masahiro Yamada <[email protected]> Signed-off-by: Philipp Zabel <[email protected]>
2016-05-30reset: zynq: use devm_reset_controller_register()Masahiro Yamada1-11/+1
Use devm_reset_controller_register() for the reset controller registration and drop the .remove callback. Signed-off-by: Masahiro Yamada <[email protected]> Signed-off-by: Philipp Zabel <[email protected]>
2016-05-30reset: socfpga: use devm_reset_controller_register()Masahiro Yamada1-11/+1
Use devm_reset_controller_register() for the reset controller registration and drop the .remove callback. Signed-off-by: Masahiro Yamada <[email protected]> Signed-off-by: Philipp Zabel <[email protected]>
2016-05-30reset: sunxi: use devm_reset_controller_register()Masahiro Yamada1-11/+1
Use devm_reset_controller_register() for the reset controller registration and drop the .remove callback. Signed-off-by: Masahiro Yamada <[email protected]> Signed-off-by: Philipp Zabel <[email protected]>
2016-05-30reset: pistachio: use devm_reset_controller_register()Masahiro Yamada1-11/+1
Use devm_reset_controller_register() for the reset controller registration and drop the .remove callback. Signed-off-by: Masahiro Yamada <[email protected]> Signed-off-by: Philipp Zabel <[email protected]>
2016-05-30reset: ath79: use devm_reset_controller_register()Masahiro Yamada1-2/+1
Use devm_reset_controller_register() for the reset controller registration and remove the unregister call from the .remove callback. Signed-off-by: Masahiro Yamada <[email protected]> Signed-off-by: Philipp Zabel <[email protected]>
2016-05-30reset: add devm_reset_controller_register APIMasahiro Yamada3-0/+45
Add a device managed API for reset_controller_register(). This helps in reducing code in .remove callbacks and sometimes dropping .remove callbacks entirely. Signed-off-by: Masahiro Yamada <[email protected]> Acked-by: Laxman Dewangan <[email protected]> Signed-off-by: Philipp Zabel <[email protected]>
2016-05-30arm64: dts: r8a7795: Drop 0x from unit address of gicSimon Horman1-1/+1
Drop 0x from unit address of gic as this is the desired form for a unit address. Signed-off-by: Simon Horman <[email protected]> Acked-by: Geert Uytterhoeven <[email protected]>
2016-05-30arm64: dts: salvator-x: Fix W=1 dtc warningsGeert Uytterhoeven1-4/+4
Warning (unit_address_vs_reg): Node /regulator@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /regulator@2 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /regulator@3 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /regulator@4 has a unit name, but no reg property Signed-off-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-05-30arm64: dts: r8a7795: Fix W=1 dtc warningsGeert Uytterhoeven1-34/+36
Warning (unit_address_vs_reg): Node /cache-controller@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /cache-controller@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,dvc/dvc@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,dvc/dvc@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@2 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@3 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@4 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@5 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@6 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@7 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@8 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@9 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@2 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@3 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@4 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@5 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@6 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@7 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@8 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@9 has a unit name, but no reg property Move the cache-controller nodes under the cpus node, and make their unit names and reg properties match the MPIDR values. Signed-off-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-05-30arm64: dts: r8a7795: Use SYSC "always-on" PM Domain for RWDT nodeGeert Uytterhoeven1-1/+1
Hook up the RWDT device node to the SYSC "always-on" PM Domain, for a more consistent device-power-area description in DT. Cfr. commit 38dbb45ee4bc ("arm64: dts: r8a7795: Use SYSC "always-on" PM Domain") Fixes: f43838a7ae014cba ("arm64: dts: r8a7795: Add RWDT node") Signed-off-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-05-30arm64: dts: salvator-x: Enable watchdog timerWolfram Sang1-0/+5
This patch enables watchdog timer for Salvator-X board. Signed-off-by: Takeshi Kihara <[email protected]> Signed-off-by: Wolfram Sang <[email protected]> Acked-by: Geert Uytterhoeven <[email protected]> Acked-by: Guenter Roeck <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-05-30arm64: dts: r8a7795: Add RWDT nodeWolfram Sang1-0/+8
This patch adds the RWDT device node for r8a7795. Signed-off-by: Takeshi Kihara <[email protected]> Signed-off-by: Wolfram Sang <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Acked-by: Guenter Roeck <[email protected]> Signed-off-by: Simon Horman <[email protected]>
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