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2017-04-02Merge branch 'drm-vmwgfx-next' of ↵Dave Airlie15-971/+2807
git://people.freedesktop.org/~syeh/repos_linux into drm-next This series enables atomic mode set for vmwgfx. A number of features and larger fixes are also included. * 'drm-vmwgfx-next' of git://people.freedesktop.org/~syeh/repos_linux: (22 commits) drm/vmwgfx: Properly check display/scanout surface size drm/vmwgfx: Support topology greater than texture size drm/vmwgfx: Define an overlaid handle_close ioctl. drm/vmwgfx: Re-implement the stream resource as a simple resource. drm/vmwgfx: Introduce a simple resource type drm/vmwgfx: Revert "drm/vmwgfx: Replace numeric parameter like 0444 with macro" drm/vmwgfx: Fix LDU X blank screen until mode change issue drm/vmwgfx: Skipping fbdev fb pinning for ldu drm/vmwgfx: Explicityly track screen target width and height drm/vmwgfx: Turn on DRIVER_ATOMIC flag drm/vmwgfx: Switch over to internal atomic API for SOU and LDU drm/vmwgfx: Switch over to internal atomic API for STDU drm/vmwgfx: Fixes to vmwgfx_fb drm/vmwgfx: Add and connect atomic state object check/commit drm/vmwgfx: Add and connect connector helper function drm/vmwgfx: Add and connect plane helper functions drm/vmwgfx: Add and connect CRTC helper functions drm/vmwgfx: Connector atomic state drm/vmwgfx: Plane atomic state drm/vmwgfx: CRTC atomic state ...
2017-03-31drm/vmwgfx: Properly check display/scanout surface sizeSinclair Yeh3-1/+32
The scanout surface size is the smaller of max texture size and max STDU size. Signed-off-by: Sinclair Yeh <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
2017-03-31drm/vmwgfx: Support topology greater than texture sizeSinclair Yeh3-1/+253
Most of the display servers today use a single surface to represent the entire desktop even if it's stretched across multiple screens. For vmwgfx with STDU, the maximum surface size is limited to the maximum texture size on the host. On a 2D VM, this limits our ability to support configurations with more than one 4K monitor. To get past this limitation, we will now allow using a large DMA buf as the framebuffer, and take care of blitting contents from this DMA buf to the display buffer. Signed-off-by: Sinclair Yeh <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
2017-03-31drm/vmwgfx: Define an overlaid handle_close ioctl.Thomas Hellstrom1-0/+24
Instead of providing an ioctl for each handle type, provide a single handle_close ioctl, and reuse the UNREF_DMABUF ioctl. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Sinclair Yeh <[email protected]>
2017-03-31drm/vmwgfx: Re-implement the stream resource as a simple resource.Thomas Hellstrom3-255/+169
Provide and document a reference implementation. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Sinclair Yeh <[email protected]>
2017-03-31drm/vmwgfx: Introduce a simple resource typeThomas Hellstrom3-1/+298
The callbacks we need to provide to many resources are very similar, so provide a simple resource type with a number of helpers for these callbacks. Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Sinclair Yeh <[email protected]>
2017-03-31drm/vmwgfx: Revert "drm/vmwgfx: Replace numeric parameter like 0444 with macro"Øyvind A. Holm1-4/+4
This reverts commit 2d8e60e8b074 ("drm/vmwgfx: Replace numeric parameter like 0444 with macro") The commit belongs to the series of 1285 patches sent to LKML on 2016-08-02, it changes the representation of file permissions from the octal value "0600" to "S_IRUSR | S_IWUSR". The general consensus was that the changes does not increase readability, quite the opposite; 0600 is easier to parse mentally than S_IRUSR | S_IWUSR. It also causes argument inconsistency, due to commit 04319d89fbec ("drm/vmwgfx: Add an option to change assumed FB bpp") that added another call to module_param_named() where the permissions are written as 0600. Signed-off-by: Øyvind A. Holm <[email protected]> Reviewed-by: Sinclair Yeh <[email protected]>
2017-03-31drm/vmwgfx: Fix LDU X blank screen until mode change issueSinclair Yeh1-20/+21
vmw_ldu_crtc_helper_commit() is not called if drm_atomic_crtc_needs_modeset() decides nothing related to CRTC timing has changed. So a better place for this code is in vmw_ldu_primary_plane_atomic_update() since we will need to update ld->fb every time the FB is updated. Signed-off-by: Sinclair Yeh <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
2017-03-31drm/vmwgfx: Skipping fbdev fb pinning for lduSinclair Yeh1-7/+16
Pinning fbdev's FB at the start of VRAM prevents X from pinning its FB. Since for ldu, the fb would be pinned anyway during a mode set, just skip pinning it in fbdev. This is not the best solution, but since ldu is not used much anymore, it seems like a reasonable workaround. Signed-off-by: Sinclair Yeh <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
2017-03-31drm/vmwgfx: Explicityly track screen target width and heightSinclair Yeh1-3/+8
We can no longer make the assumption that vmw_stdu_update_st() will be called when there's a valid display surface attached. So instead of using display_srf for width and height, make a record of these paremeters when the screen target is first defined. Signed-off-by: Sinclair Yeh <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
2017-03-31drm/vmwgfx: Turn on DRIVER_ATOMIC flagSinclair Yeh4-4/+3
Now that the legacy path has been tested, turn on the DRIVER_ATOMIC flag so user mode driver can start going through the Atomic path. Signed-off-by: Sinclair Yeh <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]> Acked-by: Daniel Vetter <[email protected]>
2017-03-31drm/vmwgfx: Switch over to internal atomic API for SOU and LDUSinclair Yeh2-295/+25
Switch over to internal atomic API. This completes the atomic internal atomic switch for all the Display Units. Signed-off-by: Sinclair Yeh <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
2017-03-31drm/vmwgfx: Switch over to internal atomic API for STDUSinclair Yeh3-295/+51
Switch over to using internal atomic API for mode set. This removes the legacy set_config API, replacing it with drm_atomic_helper_set_config(). The DRM helper will use various vmwgfx-specific atomic functions to set a mode. DRIVER_ATOMIC capability flag is not yet set, so the user mode will still use the legacy mode set IOCTL. v2: * Avoid a clash between page-flip pinning and setcrtc pinning, modify the page-flip code to use the page-flip helper and the atomic callbacks. To enable this, we will need to add a wrapper around atomic_commit. * Add vmw_kms_set_config() to work around vmwgfx xorg driver bug Signed-off-by: Sinclair Yeh <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
2017-03-31drm/vmwgfx: Fixes to vmwgfx_fbSinclair Yeh1-1/+3
1. When unsetting a mode, num_connector should be set to zero 2. The pixel_format field needs to be initialized as newer DRM internal functions checks this field 3. Take the drm_modeset_lock_all() because vmw_fb_kms_detach() can change current mode Signed-off-by: Sinclair Yeh <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
2017-03-31drm/vmwgfx: Add and connect atomic state object check/commitSinclair Yeh1-0/+48
This connects the main state object check and commit function. v2 * Use drm_atomic_helper_commit() rather than a vmwgfx-specific one Signed-off-by: Sinclair Yeh <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]> Acked-by: Daniel Vetter <[email protected]>
2017-03-31drm/vmwgfx: Add and connect connector helper functionSinclair Yeh3-0/+24
These helpers won't be called until we flip on the atomic support flag or set drm_crtc_funcs->set_config to using the atomic helper. v2 Use drm_atomic_helper_best_encoder() rather than a vmwgfx-specific one Signed-off-by: Sinclair Yeh <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]> Acked-by: Daniel Vetter <[email protected]>
2017-03-31drm/vmwgfx: Add and connect plane helper functionsSinclair Yeh5-1/+695
Refactor previous FB and cursor plane update code into their atomic counterparts: check, update, prepare, cleanup, and disable. These helpers won't be called until we flip on the atomic support flag or set drm_crtc_funcs->set_config to using the atomic helper. v2: * Removed unnecessary pinning of cursor surface * Added a few function headers v3: * Set clip region equal to the destination region * Fixed surface pinning policy * Enable SVGA mode in vmw_sou_primary_plane_prepare_fb Signed-off-by: Sinclair Yeh <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
2017-03-31drm/vmwgfx: Add and connect CRTC helper functionsSinclair Yeh5-0/+379
Atomic mode set requires us to refactor existing vmw_stdu_crtc_set_config code into sections that check the validity of the new mode, and sections that actually program the hardware state. vmw_du_crtc_atomic_check() takes CRTC-related checking code. In a later patch, vmw_du_primary_plane_atomic_check() will take framebuffer-related checking code. These helpers won't be called until we flip on the atomic support flag or set drm_crtc_funcs->set_config to using the atomic helper. v2: * The state->num_connector is actually the total number of potential connectors, not just the one associated with the display unit. The proper one to check is ->connector_mask. * Add the check to only allow plane state to be the same as crtc state (Thanks to mlankhorst) * Make sure to turn on SVGA mode before using VRAM. SVGA mode is disabled in master_drop if dbdev is not running. v3: * Moved dot clock override to crtc_atomic_check Signed-off-by: Sinclair Yeh <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]> Acked-by: Daniel Vetter <[email protected]>
2017-03-31drm/vmwgfx: Connector atomic stateSinclair Yeh5-7/+204
Add connector handling functions. Start tracking is_implicity in the connector state. Eventually, this field should be tracked exclusively in a connector state. Now that plane and connector states have been created, we can also activate the code that use CRTC state. Signed-off-by: Sinclair Yeh <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
2017-03-31drm/vmwgfx: Plane atomic stateSinclair Yeh5-0/+150
Add plane state handling functions. We have to keep track of a few plane states so we cannot use the DRM helper for this. Created vmw_plane_state along with functions to reset, duplicate, and destroty it. v2 * Removed cursor clean up special case Signed-off-by: Sinclair Yeh <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]> Acked-by: Daniel Vetter <[email protected]>
2017-03-31drm/vmwgfx: CRTC atomic stateSinclair Yeh5-3/+131
Create and Add CRTC state. We currently do not track any properties or custom states so we can technically use the DRM helpers. Creating this code just to make potential future additions easier. Most of the new code will be compiled but not enabled until plane/connector state handling code is also in place. This is the first of a series to enable atomic mode set for vmwgfx. The atomic enabling effort was done in collaboration with Thomas Hellstrom and the VMware Graphics Team. Signed-off-by: Sinclair Yeh <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
2017-03-31drm/vmwgfx: Add universal plane supportSinclair Yeh7-198/+398
Universal support is prerequisite for atomic mode set. Explicitly create planes for the cursor and the primary FB. With a functional cursor plane, the DRM will no longer use the legacy cursor_set2 and cursor_move entry points. Signed-off-by: Sinclair Yeh <[email protected]> Signed-off-by: Thomas Hellstrom <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
2017-03-31drm/vmwgfx: Removed unused snooper.crtc fieldSinclair Yeh3-4/+0
This field is not being used anymore Signed-off-by: Sinclair Yeh <[email protected]> Reviewed-by: Thomas Hellstrom <[email protected]>
2017-03-31Merge branch 'drm-next-4.12' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie253-1916/+398656
into drm-next New stuff for 4.12: - Preliminary vega10 support - Support for multi-level page tables - GPU sensor stuff for mesa - job tracing improvements - PRT support for sparse buffers - Additional SR-IOV improvements - ttm improvements - misc bug fixes and code cleanups * 'drm-next-4.12' of git://people.freedesktop.org/~agd5f/linux: (315 commits) drm/amdgpu: Fix 32bit x86 compilation warning drm/amdgpu: just disallow reading untouched registers drm/amdgpu: remove duplicate allowed reg CP_CPF_BUSY_STAT drm/amdgpu/soc15: enable psp block for SRIOV drm/amdgpu/soc15: bypass pp block for vf drm/amdgpu/psp: add check sOS sign drm/amd/amdgpu: Correct ring wptr address in debugfs (v2) drm/amdgpu: Fix multi-level page table bugs for large BOs v3 drm/amdgpu: Fix Vega10 VM initialization drm/amdgpu: Make max_pfn 64-bit drm/amdgpu: drop GB_GPU_ID from the golden settings drm/amdgpu: fix vm pte pde flags to 64-bit for sdma (v3) drm/amd/amdgpu: fix Tonga S3 resume hang on rhel6.8 drm/ttm: decrease ttm bo priority number drm/amd/amdgpu: fix performance drop when VRAM pressure drm/amdgpu: Couple small warning fixes drm/amdgpu: Clean up GFX 9 VM fault messages drm/amdgpu: Register UTCL2 as a source of VM faults drm/amdgpu/soc15: drop support for reading some registers drm/amdgpu/soc15: return cached values for some registers (v2) ...
2017-03-30drm/amdgpu: Fix 32bit x86 compilation warningAlex Xie3-3/+3
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c:187:2: warning: right shift count >= width of type [enabled by default] drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c:173:2: warning: right shift count >= width of type [enabled by default] drivers/gpu/drm/amd/amdgpu/vega10_ih.c:106:3: warning: right shift count >= width of type [enabled by default] v2: Add a space between "&" and "0xff" Reported by: [email protected] Signed-off-by: Alex Xie <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-30drm/amdgpu: just disallow reading untouched registersChristian König1-6/+0
Not sure what the original intention was here, but returning a random piece of kernel memory to userspace because we didn't set the value at all is clearly not a good idea. This patch disallows reading the register and returns a proper error code instead. Signed-off-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Acked-by: Tom St Denis <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-30drm/amdgpu: remove duplicate allowed reg CP_CPF_BUSY_STATChristian König1-1/+0
Remove duplicate mmCP_CPF_BUSY_STAT from the allowed registers. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu/soc15: enable psp block for SRIOVXiangliang Yu1-3/+2
SRIOV can support for loading ucode with PSP block, enable it. Signed-off-by: Xiangliang Yu <[email protected]> Acked-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu/soc15: bypass pp block for vfXiangliang Yu1-2/+3
Disable pp block if device is vf. Signed-off-by: Xiangliang Yu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Monk Liu <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu/psp: add check sOS signXiangliang Yu1-2/+16
Confirm if sys driver and sOS are already been loaded through sOS sign register, skip loading sys driver and sOS if finding the sign. Signed-off-by: Xiangliang Yu <[email protected]> Acked-by: Huang Rui <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amd/amdgpu: Correct ring wptr address in debugfs (v2)Tom St Denis1-2/+2
On gfx9 hardware the value is not wrapped and is a 64-bit value. So we reduce it modulo the ring size. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Christian König <[email protected]> (v2) use buf_mask instead of computing on the fly Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: Fix multi-level page table bugs for large BOs v3Felix Kuehling1-6/+18
Fix the start/end address calculation for address ranges that span multiple page directories in amdgpu_vm_alloc_levels. Add error messages if page tables aren't found. Otherwise the page table update would just fail silently. v2: * Change WARN_ON to WARN_ON_ONCE * Move masking of high address bits to caller * Add range-check for "from" and "to" v3: * Replace WARN_ON_ONCE in get_pt with pr_err in caller Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: Fix Vega10 VM initializationFelix Kuehling2-13/+10
adev->family is not initialized yet when amdgpu_get_block_size is called. Use adev->asic_type instead. Minimum VM size is 512GB, not 256GB, for a single page table entry in the root page table. gmc_v9_0_vm_init is called after adev->vm_manager.max_pfn is initialized. Move the minimum VM-size enforcement ahead of max_pfn initializtion. Cast to 64-bit before the left-shift. Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: Make max_pfn 64-bitFelix Kuehling4-7/+9
With 4-level page tables the maximum VM size is 256TB. That's 64G pages, which can't be represented in 32-bit. Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: drop GB_GPU_ID from the golden settingsChristian König1-1/+0
That register is marked deprecated, reading it results in a bus error. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: fix vm pte pde flags to 64-bit for sdma (v3)Junwei Zhang5-10/+10
v2: fix for all sdma engines v3: squash in fix for SI/CI Signed-off-by: Junwei Zhang <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amd/amdgpu: fix Tonga S3 resume hang on rhel6.8Jim Qu1-3/+0
1. security firmware loading has moved to sw init, so this code is useless. 2. it seems that driver could not call request_firmware on kernel 2.6, when S3 resume. for request firmware depends on userspace, at this time, userspace is freeze. Signed-off-by: Jim Qu <[email protected]> Acked-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/ttm: decrease ttm bo priority numberRoger.He1-1/+1
decrease and also reserve priority number for KFD using Signed-off-by: Roger.He <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amd/amdgpu: fix performance drop when VRAM pressureRoger.He1-3/+1
When VRAM pressue and trigger huge evictions there is performance drop, this patch fix it. Signed-off-by: Roger.He <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: Couple small warning fixesHarry Wentland2-2/+3
Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: Clean up GFX 9 VM fault messagesFelix Kuehling1-13/+14
Clean up the VM fault message format and use rate-limiting similar to other ASICs. Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: Register UTCL2 as a source of VM faultsFelix Kuehling1-0/+2
Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu/soc15: drop support for reading some registersAlex Deucher1-3/+0
The RB harvest registers are not necessary, the driver already exposes this info via the info ioctl. GB_BACKEND_MAP has been deprecated since SI and is not relevant to the RB mapping. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu/soc15: return cached values for some registers (v2)Alex Deucher1-8/+22
Required for SR-IOV and saves MMIO transactions. v2: drop cached RB harvest registers Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu/gfx9: use hweight for calculating num_rbsAlex Deucher1-5/+2
Match what we do for other asics. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: refine the logic in amdgpu_need_post()Alex Deucher1-1/+1
We check the mem config register to make sure it's been programmed by the vbios to determine if we need to post so we check for a non-0 value. However, when the asic comes out of reset, we may see all ones here, so check for that too. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu: Add interrupt entries for CRTC_VERTICAL_INTERRUPT0.Andrey Grodzovsky1-0/+99
This used by DAL ISR logic for VBLANK handling. Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu:changes in gfx DMAframe scheme (v2)Monk Liu5-57/+88
1) Adapt to vulkan: Now use double SWITCH BUFFER to replace the 128 nops w/a, because when vulkan introduced, umd can insert 7 ~ 16 IBs per submit which makes 256 DW size cannot hold the whole DMAframe (if we still insert those 128 nops), CP team suggests use double SWITCH_BUFFERs, instead of tricky 128 NOPs w/a. 2) To fix the CE VM fault issue when MCBP introduced: Need one more COND_EXEC wrapping IB part (original one us for VM switch part). this change can fix vm fault issue caused by below scenario without this change: >CE passed original COND_EXEC (no MCBP issued this moment), proceed as normal. >DE catch up to this COND_EXEC, but this time MCBP issued, thus DE treats all following packages as NOP. The following VM switch packages now looks just as NOP to DE, so DE dosen't do VM flush at all. >Now CE proceeds to the first IBc, and triggers VM fault, because DE didn't do VM flush for this DMAframe. 3) change estimated alloc size for gfx9. with new DMAframe scheme, we need modify emit_frame_size for gfx9 4) No need to insert 128 nops after gfx8 vm flush anymore because there was double SWITCH_BUFFER append to vm flush, and for gfx7 we already use double SWITCH_BUFFER following after vm_flush so no change needed for it. 5) Change emit_frame_size for gfx8 v2: squash in BUG removal from Monk Signed-off-by: Monk Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu:fix missing programing critical registersMonk Liu3-1/+21
those MC_VM registers won't be programed by VBIOS in VF so driver is responsible to programe them. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2017-03-29drm/amdgpu:fix ring_write_multipleMonk Liu1-2/+2
ring_write_multiple should use buf_mask instead of ptr_mask Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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