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2018-03-05drm/amd/display: dal 3.1.35Tony Cheng1-1/+1
Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-05drm/amd/display: Check DCN PState ASSERT failureHersen Wu2-3/+7
[Description] ASIC change debug register definition Signed-off-by: Hersen Wu <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-05drm/amd/display: update cur_clock correctly within set bandwidthYue Hin Lau1-7/+5
Signed-off-by: Yue Hin Lau <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-05drm/amd/display: Use 4096 lut entriesLeo (Sunpeng) Li3-22/+61
Points in the DRM LUT are spaced linearly. Points in hardware are spaced exponentially, with greater density towards 0. To maintain low-end accuracy in hardware when sampling the DRM LUT, more points are needed. However, X doesn't seem to play with legacy LUTs of such size. Therefore, check for legacy lut when updating DC states, and update accordingly. v2: Use a macro for the maximum drm LUT value. v3: Update commit to reflect that this does not map 1-1 to HW Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-05drm/amd/display: Add passive dongle support for HPD RearchJohn Barberiz2-3/+6
Add HPD delay timer support to 1. Single/dual link DVI. 2. DP to HDMI passive dongle 3. DP to DVI passive dongle. Signed-off-by: John Barberiz <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-05drm/amd/display: Fix active dongle hotplugRoman Li1-0/+4
Clean fake sink flag after detecting link on downstream port. Fixing display light-up after "hot-unplug&plug again" downstream of an active dongle. Signed-off-by: Roman Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-05drm/amd/display: move MST branch initialize to before link trainingHersen Wu3-0/+19
some MST capable scaler doesn't like recieving CLEAR_PAYLOAD_ID_TABLE after link training. move branch initialize to before link training Signed-off-by: Hersen Wu <[email protected]> Signed-off-by: Tony Cheng <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-05drm/radeon/mkregtable: Delete unused list functions and macrosMatthias Kaehlcke1-433/+0
The util mkregtable includes a copy of the kernel API for linked lists, only a small subset of it is used. Delete the unused functions and macros. Reviewed-by: Guenter Roeck <[email protected]> Signed-off-by: Matthias Kaehlcke <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-05drm/amdgpu: used cached pcie gen info for SI (v2)Alex Deucher2-49/+23
Rather than querying it every time we need it. Also fixes a crash in VM pass through if there is no root bridge because the cached value fetch already checks this properly. v2: fix includes Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=105244 Acked-by: Christian König <[email protected]> Reviewed-by: Rex Zhu<[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2018-03-01drm/amd/amdgpu: Mask rptr as well in ring debugfsTom St Denis1-1/+1
The read/write pointers on sdma4 devices increment beyond the ring size and should be masked. Tested on my Ryzen 2400G. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-01drm/amdgpu: try again kiq access if not in IRQ(v4)Monk Liu1-11/+53
sometimes GPU is switched to other VFs and won't swich back soon, so the kiq reg access will not signal within a short period, instead of busy waiting a long time(MAX_KEQ_REG_WAIT) and returning TMO we can istead sleep 5ms and try again later (non irq context) And since the waiting in kiq_r/weg is busy wait, so MAX_KIQ_REG_WAIT shouldn't set to a long time, set it to 10ms is more appropriate. if gpu already in reset state, don't retry the KIQ reg access otherwise it would always hang because KIQ was already die usually. v2: replace schedule() with msleep() for the wait v3: use while loop for the wait repeating use macros for the sleep period more description for it v4: drop unused variable Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected] Reviewed-by: Pixel Ding <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-01drm/amdgpu: cleanups for vram lost handlingMonk Liu2-69/+72
1)create a routine "handle_vram_lost" to do the vram recovery, and put it into amdgpu_device_reset/reset_sriov, this way no need of the extra paramter to hold the VRAM LOST information and the related macros can be removed. 3)show vram_recover failure if time out, and set TMO equal to lockup_timeout if vram_recover is under SRIOV runtime mode. 4)report error if any ip reset failed for SR-IOV Signed-off-by: Monk Liu <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-03-01drm/amdgpu: stop all rings before doing gpu recoverMonk Liu1-25/+15
found recover_vram_from_shadow sometimes get executed in paralle with SDMA scheduler, should stop all schedulers before doing gpu reset/recover Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Tested-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-28drm/amdgpu: fix module parameter descriptionsAlex Deucher1-2/+2
Some were missing the close parens around options. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-28drm/amdgpu: Map all visible VRAM at startupAmber Lin2-0/+18
When using CPU to update page table, we need to kmap all the PDs/PTs after they are allocated and that requires a TLB shot down on each CPU, which is quite heavy. Instead, we map the whole visible VRAM to a kernel address at once. Pages can be obtained from the offset. v2: move the mapping base from gmc to amdgpu_mman structure, and the implementation in amdgpu_ttm_* functions Signed-off-by: Amber Lin <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-28drm/amd/display: check for ipp before calling cursor operationsShirish S1-2/+4
Currently all cursor related functions are made to all pipes that are attached to a particular stream. This is not applicable to pipes that do not have cursor plane initialised like underlay. Hence this patch allows cursor related operations on a pipe only if ipp in available on that particular pipe. The check is added to set_cursor_position & set_cursor_attribute. Signed-off-by: Shirish S <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2018-02-28drm/amd/display: make dm_dp_aux_transfer return payload bytes instead of sizeShirish S5-21/+13
The drm layer expects aux->transfer() to return the payload bytes read. Currently dm_dp_aux_transfer() returns the payload size which does not gets updated during the read, hence not giving the right data for the drm layer to pars edid. This leads to the drm layer to conclude as the edid is BAD and hence some monitors/devices dont get detected properly. This patch changes the return type of dm_dp_aux_transfer() to actual bytes read during DP_AUX_NATIVE_READ & DP_AUX_I2C_READ. Signed-off-by: Shirish S <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-28drm/amdgpu: disable GFX ring and disable PQ wptr in hw_finiMonk Liu1-1/+7
otherwise there will be DMAR reading error comes out from CP since GFX is still alive and CPC's WPTR_POLL is still enabled, which would lead to DMAR read error. fix: we can hault CPG after hw_fini, but cannot halt CPC becaues KIQ stil need to be alive to let RLCV invoke, but its WPTR_POLL could be disabled. Signed-off-by: Monk Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-28drm/amdgpu: cleanup SA inti and fini(v2)Monk Liu3-59/+11
should use bo_create_kernel instead of split to two function that create and pin the SA bo issue: before this patch, there are DMAR read error in host side when running SRIOV test, the DMAR address dropped in the range of SA bo. fix: after this cleanups of SA init and fini, above DMAR eror gone. v2: keep sa_bo's fini instead of suspend, to keep reporting error Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-28drm/amdgpu: Correct sdma_v4 get_wptr(v2)Emily Deng1-11/+7
the original method will change the wptr value in wb. v2: furthur cleanup Signed-off-by: Emily Deng <[email protected]> Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-28drm/amdgpu: adjust timeout for ib_ring_tests(v2)Monk Liu1-1/+32
issue: sometime GFX/MM ib test hit timeout under SRIOV env, root cause is that engine doesn't come back soon enough so the current IB test considered as timed out. fix: for SRIOV GFX IB test wait time need to be expanded a lot during SRIOV runtimei mode since it couldn't really begin before GFX engine come back. for SRIOV MM IB test it always need more time since MM scheduling is not go together with GFX engine, it is controled by h/w MM scheduler so no matter runtime or exclusive mode MM IB test always need more time. v2: use ring type instead of idx to judge Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-28drm/amdgpu: don't use MM idle_work for SRIOV(v2)Monk Liu2-9/+6
SRIOV doesn't give VF cg/pg feature so the MM's idle_work is skipped for SR-IOV v2: remove superfluous changes since idle_work is not scheduled for SR-IOV so the condition check for SR-IOV inside idle_work also can be dropped v3: drop the SRIOV check in amdgpu_vce/uvd_suspend Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-28drm/amd/pp: Print more smu failed info on Vega10Rex Zhu1-1/+1
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-28drm/amd/powerplay: fix power over limit on FijiEric Huang1-7/+0
power containment disabled only on Fiji and compute power profile. It violates PCIe spec and may cause power supply failed. Enabling it will fix the issue, even the fix will drop performance of some compute tests. Signed-off-by: Eric Huang <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2018-02-28drm/amdgpu:Fixed wrong emit frame size for encJames Zhu1-1/+1
Emit frame size should match with corresponding function, uvd_v6_0_enc_ring_emit_vm_flush has 5 amdgpu_ring_write Signed-off-by: James Zhu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-28drm/amdgpu: increase gart size to 512MBMonk Liu1-1/+1
256MB is too small consider PTE/PDE shadow and TTM eviction activity Signed-off-by: Monk Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-28drm/amdgpu: move WB_FREE to correct placeMonk Liu1-5/+7
WB_FREE should be put after all engines's hw_fini done, otherwise the invalid wptr/rptr_addr would still be used by engines which trigger abnormal bugs. This fixes couple DMAR reading error in host side for SRIOV after guest kmd is unloaded. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-28drm/amdgpu: change gfx9 ib test to use WBMonk Liu1-50/+57
two reasons to switch SCRATCH reg method to WB method: 1)Because when doing IB test we don't want to involve KIQ health status affect, and since SCRATCH register access is go through KIQ that way GFX IB test would failed due to KIQ fail. 2)acccessing SCRATCH register cost much more time than WB method because SCRATCH register access runs through KIQ which at least could begin after GPU world switch back to current Guest VF Signed-off-by: Monk Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-28drm/amdgpu: cond_exec only for schedule with a jobMonk Liu1-1/+1
issue: under SR-IOV sometimes the iB test will fail on gfx ring fix: with cond_exec inserted in RB the gfx engine would skip part packets if RLCV issue PREEMPT on gfx engine if gfx engine is prior to COND_EXEC packet, this is okay for regular command from UMD, but for the ib test since the whole dma format doesn't support PREEMPT so must remove the COND_EXEC from it. Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-28drm/amdgpu: only flush hotplug work without DCMonk Liu1-2/+4
since hotplug_work is initialized under the case of no dc support Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-28drm/amdgpu: skip ECC for SRIOV in gmc late_initMonk Liu1-1/+1
Signed-off-by: Monk Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-28drm/amdgpu: fix&cleanups for wb_clearMonk Liu2-3/+4
fix: should do right shift on wb before clearing cleanups: 1,should memset all wb buffer 2,set max wb number to 128 (total 4KB) is big enough Signed-off-by: Monk Liu <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/amdgpu/powerplay/smu7: use proper dep table for mclkAlex Deucher3-3/+3
For mclk od, use the vdd dependency on mclk table. Looks like a cut and paste typo. Reviewed-by: Rex Zhu<[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/amd/amdgpu: Correct VRAM width for APUs with GMC9Tom St Denis1-1/+4
DDR4 has a 64-bit width not 128-bits. It was reporting twice the width. Tested with my Ryzen 2400G. Signed-off-by: Tom St Denis <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/ttm: cleanup ttm_tt_createChristian König1-16/+13
Cleanup ttm_tt_create a bit. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/ttm: move ttm_tt_create into ttm_tt.c v2Christian König3-48/+59
Rename ttm_bo_add_ttm to ttm_tt_create and move it into ttm_tt.c. v2: separate the cleanup. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/ttm: check if free mem space is under the lower limitRoger He4-0/+104
the free mem space and the lower limit both include two parts: system memory and swap space. For the OOM triggered by TTM, that is the case as below: first swap space is full of swapped out pages and soon system memory also is filled up with ttm pages. and then any memory allocation request will run into OOM. to cover two cases: a. if no swap disk at all or free swap space is under swap mem limit but available system mem is bigger than sys mem limit, allow TTM allocation; b. if the available system mem is less than sys mem limit but free swap space is bigger than swap mem limit, allow TTM allocation. v2: merge two memory limit(swap and system) into one v3: keep original behavior except ttm_opt_ctx->flags with TTM_OPT_FLAG_FORCE_ALLOC v4: always set force_alloc as tx->flags & TTM_OPT_FLAG_FORCE_ALLOC v5: add an attribute for lower_mem_limit v6: set lower_mem_limit as 0 to keep original behavior Signed-off-by: Roger He <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/ttm: drop persistent_swap_storage from ttm_bo_init and coChristian König16-41/+21
Never used as parameter, the only driver actually using this is nouveau and there it is initialized after the BO is initialized. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/ttm: drop ttm->dummy_read_pageChristian König18-74/+42
Only used by the AGP backend and there it can be easily accessed using ttm->bdev->glob. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/ttm: drop ttm->globChristian König4-11/+9
The pointer is available as ttm->bdev->glob as well. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/ttm: drop bo->globChristian König6-19/+21
The pointer is available as bo->bdev->glob as well. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26staging: vboxvideo: remove ttm_pool_* wrappersChristian König1-13/+0
TTM calls the default implementation now. Signed-off-by: Christian König <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/bochs: remove the default ttm_tt_populate callbacksChristian König1-2/+0
TTM calls the default implementation now. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/cirrus: remove ttm_pool_* wrappersChristian König1-13/+0
TTM calls the default implementation now. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/qxl: remove ttm_pool_* wrappersChristian König1-22/+0
TTM calls the default implementation now. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/ast: remove ttm_pool_* wrappersChristian König1-13/+0
TTM calls the default implementation now. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/hisilicon: remove ttm_pool_* wrappersChristian König1-13/+0
TTM calls the default implementation now. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/mgag200: remove ttm_pool_* wrappersChristian König1-13/+0
TTM calls the default implementation now. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/virtio: remove ttm_pool_* wrappersChristian König1-16/+0
TTM calls the default implementation now. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/ttm: add default implementations for ttm_tt_(un)populateChristian König1-2/+8
Use ttm_pool_populate/ttm_pool_unpopulate if the driver doesn't provide a function. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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