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2018-02-26drm/amd/pp: Move common dpm check functions to hardwaremanager.cRex Zhu4-29/+10
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/amd/pp: Cleaning up vega10_enable_dpm_tasks functionRex Zhu1-6/+5
1. move display num initialize out of dpm enable tasks. 2. do not set/restore smc telemetry if dpm is runing. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/amd/pp: Refine code in powerplay for Cz/Vega10Rex Zhu6-39/+43
Add dpm check functions on CZ/Vega10 to smu backend function table. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/amd/pp: Remove dead error checking code on Vega10Rex Zhu4-142/+67
when smu failed, print out the error info immediately for debug. smum_send_msg_to_smu always return true, so no need to check return value. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/amd/pp: Add debug info when smu failed on Vega10Rex Zhu1-5/+13
When smu msssage failed, print out return value in dmesg. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/amd/pp: Remove duplicated vega10_is_smc_ram_running callsRex Zhu1-12/+3
Avoid conflicts in reading the same register mmPCIE_INDEX2 with other clients Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/amd: Remove inclusion of non-existing include directoriesCorentin Labbe1-2/+0
This patch fix the following build warnings: CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_drv.o cc1: warning: ../display/: No such file or directory [-Wmissing-include-dirs] cc1: warning: ../display/include: No such file or directory [-Wmissing-include-dirs] CC [M] drivers/gpu/drm/amd/amdgpu/amdgpu_device.o cc1: warning: ../display/: No such file or directory [-Wmissing-include-dirs] cc1: warning: ../display/include: No such file or directory [-Wmissing-include-dirs] [...] This warning is shown for each file in amdgpu directory, so it spams a lot. Acked-by: Christian König <[email protected]> Signed-off-by: Corentin Labbe <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/amd: remove inclusion of non-existing scheduler directoryCorentin Labbe1-1/+0
The scheduler directory was removed via commit 1b1f42d8fde4 ("drm: move amd_gpu_scheduler into common location") Remove it from include path. Reviewed-by: Christian König <[email protected]> Signed-off-by: Corentin Labbe <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/radeon: insist on 32-bit DMA for Cedar on PPC64/PPC64LEBen Crocker1-0/+4
In radeon_device_init, set the need_dma32 flag for Cedar chips (e.g. FirePro 2270). This fixes, or at least works around, a bug on PowerPC exposed by last year's commits 8e3f1b1d8255105f31556aacf8aeb6071b00d469 (Russell Currey) and 253fd51e2f533552ae35a0c661705da6c4842c1b (Alistair Popple) which enabled the 64-bit DMA iommu bypass. This caused the device to freeze, in some cases unrecoverably, and is the subject of several bug reports internal to Red Hat. Signed-off-by: Ben Crocker <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2018-02-26drm/amdgpu: Remove duplicate setting of ->need_swiotlbThierry Reding1-1/+0
There's no need to set this before the number of DMA bits has been properly determined. Signed-off-by: Thierry Reding <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/amd/pp: Add a pp feature mask bit for AutoWattman featureRex Zhu1-0/+1
Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/amdgpu: Change default value of module parameter amdgpu_pp_feature_maskRex Zhu1-1/+1
Currently all pp features are enabled by default except OVERDRIVE Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/amd/powerplay: fix thermal interrupts on vega10Eric Huang1-1/+3
a bug in programming thermal interrupt register masks out interrupts and driver cannot receive interrupts. Setting 0 to mask bits will fix it. Signed-off-by: Eric Huang <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/amdgpu: Add query vram width in CGS query system infoRex Zhu2-0/+4
powerplay need vram width to set default mclk optimization settings(uphyst/downhyst/activity threshold) Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/amdgpu: use the TTM dummy page instead of allocating oneChristian König13-41/+30
We have a global dummy page in TTM, use that one instead of allocating a new one. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/amd/pp: Fix bug that dpm level was not really lockedRex Zhu1-8/+14
Lock the dpm levels when we use SW method to modify the dpm tables directly to avoid a possible race with the smu. Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/amd/pp: Fix error handling when smu return failed on Vega10.Rex Zhu1-12/+14
Clamp the clock index to a valid range when reading it back Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Rex Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/ttm: set TTM_OPT_FLAG_FORCE_ALLOC in ttm_bo_force_list_cleanRoger He1-1/+5
Because ttm_bo_force_list_clean() is only called on two occasions: 1. By ttm_bo_evict_mm() during suspend. 2. By ttm_bo_clean_mm() when the driver unloads. On both cases we absolutely don't want any memory allocation failure. Signed-off-by: Roger He <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/ttm: add bit flag TTM_OPT_FLAG_FORCE_ALLOCRoger He2-2/+6
set TTM_OPT_FLAG_FORCE_ALLOC when we are servicing for page fault routine. for ttm_mem_global_reserve if in page fault routine, allow the gtt pages reservation always. because page fault routing already grabbed system memory and the allowance of this exception is harmless. Otherwise, it will trigger OOM killer. will be used later. v2: set the FORCE_ALLOC always v3: minor refine Signed-off-by: Roger He <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/ttm: use bit flag to replace allow_reserved_eviction in ttm_operation_ctxRoger He4-7/+11
for saving memory and more bit flag can be used in future Signed-off-by: Roger He <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26radeon: hide pointless #warning when compile testingArnd Bergmann1-1/+2
In randconfig testing, we sometimes get this warning: drivers/gpu/drm/radeon/radeon_object.c: In function 'radeon_bo_create': drivers/gpu/drm/radeon/radeon_object.c:242:2: error: #warning Please enable CONFIG_MTRR and CONFIG_X86_PAT for better performance thanks to write-combining [-Werror=cpp] #warning Please enable CONFIG_MTRR and CONFIG_X86_PAT for better performance \ This is rather annoying since almost all other code produces no build-time output unless we have found a real bug. We already fixed this in the amdgpu driver in commit 31bb90f1cd08 ("drm/amdgpu: shut up #warning for compile testing") by adding a CONFIG_COMPILE_TEST check last year and agreed to do the same here, but both Michel and I then forgot about it until I came across the issue again now. For stable kernels, as this is one of very few remaining randconfig warnings in 4.14. Cc: [email protected] Link: https://patchwork.kernel.org/patch/9550009/ Signed-off-by: Arnd Bergmann <[email protected]> Signed-off-by: Michel Dänzer <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-26drm/ttm: set page mapping during allocationChristian König2-2/+17
To aid debugging set the page mapping during allocation instead of during VM faults. Signed-off-by: Christian König <[email protected]> Reviewed-by: Roger He <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-20Revert "drm/radeon/pm: autoswitch power state when in balanced mode"Alex Deucher1-5/+1
This reverts commit 1c331f75aa6ccbf64ebcc5a019183e617c9d818a. Breaks resume on some systems. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=100759 Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2018-02-20drm/radeon: use drm_gem_private_object_initChristian König1-5/+1
We use our own backing store and don't need the shmem file. Signed-off-by: Christian König <[email protected]> Acked-by: Daniel Vetter <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-20drm/amdgpu: use drm_gem_private_object_initChristian König1-5/+1
We use our own backing store and don't need the shmem file. Signed-off-by: Christian König <[email protected]> Acked-by: Daniel Vetter <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-20drm/amdgpu: mitigate workaround for i915Christian König1-11/+20
To be able to use DRI_PRIME with amdgpu and i915 we add all our fences only as exclusive ones. Disable that behavior when sharing between amdgpu itself cause it hinders concurrent execution. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-20drm/amdgpu: implement amdgpu_gem_map_(attach/detach)Christian König3-22/+34
Instead of the pin/unpin callback implement the attach/detach ones. Functional identical, but allows us access to the attachment. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu/powerplay/smu7: drop refresh rate checks for mclk switchingAlex Deucher1-2/+1
The logic has moved to cgs. mclk switching with DC at higher refresh rates should work. Reviewed-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: Harry Wentland <[email protected]>
2018-02-19drm/amdgpu/cgs: add refresh rate checking to non-DC display codeAlex Deucher1-0/+5
Clamp the vblank period to 0 if the refresh rate is larger than 120 hz for non-DC. This allows us to remove the refresh rate checks from powerplay for mclk switching. Reviewed-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/powerplay/smu7: allow mclk switching with no displaysAlex Deucher1-4/+7
If there are no displays attached, there is no reason to disable mclk switching. Fixes mclks getting set to high when there are no displays attached. Reviewed-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2018-02-19drm/amd/powerplay/vega10: allow mclk switching with no displaysAlex Deucher1-4/+7
If there are no displays attached, there is no reason to disable mclk switching. Fixes mclks getting set to high when there are no displays attached. Reviewed-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2018-02-19drm/amd/powerplay: use PP_CAP macro for disable_mclk_switching_for_frame_lockAlex Deucher1-4/+4
Rather than open coding it. Reviewed-by: Eric Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/powerplay: remove unused headersCorentin Labbe2-479/+0
All thoses headers are not used by any source files. Lets just remove them. Signed-off-by: Corentin Labbe <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu_gem: fix error handling path in amdgpu_gem_va_update_vmGustavo A. R. Silva1-3/+4
Currently, if amdgpu_vm_bo_update() fails, the returned error is being ignored. Fix this by properly checking _r_ after calling amdgpu_vm_bo_update. Also, remove redundant code just before label _error_. Addresses-Coverity-ID: 1464280 ("Unused value") Fixes: 0abc6878fc2d ("drm/amdgpu: update VM PDs after the PTs") Signed-off-by: Gustavo A. R. Silva <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: update the PASID mapping only on demandChristian König3-9/+32
Updating the PASID is rather heavyweight and shouldn't be done all the time. Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amdgpu: separate PASID mapping from VM flush v2Christian König22-76/+79
Stuffing the PASID mapping into the VM flush isn't flexible enough since the PASID mapping changes not as often as we need a VM flush. v2: add missing use of gmc_v7_0_emit_pasid_mapping Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Fix increment when sampling OTF in DCELeo (Sunpeng) Li1-1/+1
Previously, the number of software segmets per region was reduced to 16. This needs to be reflected in the sampling distance (increment) used when translating to the hardware format. Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: De PQ implementationVitaly Prosyak3-75/+442
Some refactoring and optimizations in color module. Added de gamma 2.2 & 2.4, also re gamma 2.2. Added interface for diagnostic for de gamma & de pq. Signed-off-by: Vitaly Prosyak <[email protected]> Reviewed-by: Krunoslav Kovac <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Remove unused dm_pp_ interfacesHarry Wentland2-64/+0
Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Bhawanpreet Lakha <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Add logging for aux DPCD accessEric Yang1-0/+16
Add basic logging for DPCD access. Does not print by default. Currently only prints first byte of the data accessed. Technical debt: Need to make it so that the entire data block accessed is printed. Also need to log address space that's not DPCD. Signed-off-by: Eric Yang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Set vsc pack revision when DPCD revision is >= 1.2Tao1-1/+3
Brightness couldn't change when booting up in DC mode. It was because "psr_enabled" flag was not set to true before setting vsc packet revision, causing packet rev setup was skipped. Now instead of checking the psr flag, it checks if the DPCD_REV >= 1.2 and set the vsc packet revision. Signed-off-by: Tao <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: provide an interface to query firmware versionAnthony Koo4-8/+21
Signed-off-by: Anthony Koo <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Add missing Vega defines to dal_asic_idHarry Wentland1-0/+8
Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Hersen Wu <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Treat bad EDID as no EDIDEric Yang1-4/+9
We have an mst dock firmware that will emulate an EDID with bad checksum. v2: Tread -> Treat Signed-off-by: Eric Yang <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Remove duplicate entries from BIOS function tableKen Chalmers1-4/+0
Identical to the two entries above them. Signed-off-by: Ken Chalmers <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Make FBC work without fbdev emulationRoman Li1-23/+15
Previously, FBC dynamic allocation relied on connector modes populated during dm init. This is only the case if DRM_FBDEV_EMULATION config flag is enabled. Moving fbc allocation from dm_late_init() to amdgpu_dm_connector_get_modes() where actual modes init happens. Signed-off-by: Roman Li <[email protected]> Reviewed-by: Shirish Shankarappa <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Remove delay on disconnect patchJohn Barberiz2-13/+4
HDMI HPD's generic solution makes the monitor patch code unnecessary so anything related has been removed. Signed-off-by: John Barberiz <[email protected]> Reviewed-by: John Barberiz <[email protected]> Acked-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Skip 2 frames when first reading CRCLeo (Sunpeng) Li2-7/+7
Skipping the first frame will prevent uncoooked values most of the time. However, in some unlikely cases, the second frame will be uncooked as well. Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Expose DCE110 CRC functions for DCE8Leo (Sunpeng) Li3-4/+12
Implement CRC for DCE8. Registers remain the same, so call DCE110 code directly. Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2018-02-19drm/amd/display: Rework DCE transform bit depth reduction programming.Leo (Sunpeng) Li1-68/+36
Clear up the logic, and enable programming truncation as a bit reduction mode. Signed-off-by: Leo (Sunpeng) Li <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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