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2016-10-08Merge tag '4.9/mtd-pairing-scheme' of github.com:linux-nand/linuxBrian Norris3-0/+212
Introduction of the MTD pairing scheme concept.
2016-10-03mtd: nand: fix trivial spelling errorBrian Norris1-1/+1
Introduced by commit fde85cfd2d07 ("mtd: nand: Fix nand_command_lp() for 8bits opcodes") and I didn't have the heart to have Boris rewrite his pull request just for that. Anyway, there's some value in having stable commit hashes. Signed-off-by: Brian Norris <[email protected]>
2016-10-03Merge tag 'for-4.9' of github.com:linux-nand/linuxBrian Norris25-459/+1033
" Notable core changes: - add the infrastructure to automate NAND timings configuration - provide a generic DT property to maximize ECC strength The rest is just a bunch of minor drivers and core fixes/cleanup patches. " Also not noted: some refactoring in the core bad block table handling, to help with improving some of the logic in error cases. Signed-off-by: Brian Norris <[email protected]>
2016-09-28mtdpart: Propagate _get/put_device()Richard Weinberger1-0/+18
If the master device has callbacks for _get/put_device() and this MTD has slaves a get_mtd_device() call on paritions will never issue the registered callbacks. Fix this by propagating _get/put_device() down. Reviewed-by: Boris Brezillon <[email protected]> Signed-off-by: Richard Weinberger <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2016-09-23mtd: nand: Provide nand_cleanup() function to free NAND related resourcesRichard Weinberger2-8/+19
Provide a nand_cleanup() function to free all nand related resources without unregistering the mtd device. This should allow drivers to call mtd_device_unregister() and handle its return value and still being able to cleanup all nand related resources. Signed-off-by: Richard Weinberger <[email protected]> Signed-off-by: Daniel Walter <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: Kill the OF_MTD Kconfig optionBoris Brezillon1-4/+0
Commit d48f62b9a0a0 ("mtd: nand: move of_get_nand_xxx() helpers into nand_base.c") removed the drivers/of/of_mtd.c file but did not remove the associated OF_MTD Kconfig option. Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: nand: mxc: Test CONFIG_OF instead of CONFIG_OF_MTDBoris Brezillon1-1/+1
We are about to drop the OF_MTD Kconfig option. Test CONFIG_OF activation instead of CONFIG_OF_MTD. Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: nand: Fix nand_command_lp() for 8bits opcodesBoris Brezillon1-1/+4
8 bits opcodes should be followed by a single address cycle. Make the 2nd address cycle dependent of !nand_opcode_8bits(command). Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: nand: sunxi: Support ECC maximizationBoris Brezillon1-0/+29
Setup the maximum ECC config when NAND_ECC_MAXIMIZE is set. Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: nand: Support maximizing ECC when using software BCHBoris Brezillon1-0/+20
Add support for ECC maximization when software BCH with nand_ooblayout_lp_ops layout is used. Other cases should be handled by the NAND controller driver. Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: nand: Add an option to maximize the ECC strengthBoris Brezillon3-0/+13
The generic NAND DT bindings allows one to tweak the ECC strength and step size to their need. It can be used to lower the ECC strength to match a bootloader/firmware config, but might also be used to get a better reliability. In the latter case, the user might want to use the maximum ECC strength without having to explicitly calculate the exact value (this value not only depends on the OOB size, but also on the NAND controller, and can be tricky to extract). Add a generic 'nand-ecc-maximize' DT property and the associated NAND_ECC_MAXIMIZE flag, to let ECC controller drivers select the best ECC strength and step-size on their own. Signed-off-by: Boris Brezillon <[email protected]> Acked-by: Rob Herring <[email protected]>
2016-09-23mtd: nand: mxc: Add timing setup for v2 controllersSascha Hauer1-2/+82
So far we relied on reset default or the bootloader to configure a suitable clk rate for the Nand controller. This works but we can optimize the timing for better performance. This sets the clk rate for v2 controllers (i.MX25/35) based on the timing mode read from the ONFI parameter page. This may also enable the symmetric mode (aks EDO mode) if necessary which reads one word per clock cycle. Tested on an i.MX25 with a Micron MT29F4G08ABBDAHC attached. Signed-off-by: Sascha Hauer <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: nand: mxc: implement onfi get/set featuresSascha Hauer1-0/+55
To be able to support different ONFI timing modes we have to implement the onfi_set_features and onfi_get_features. Tested on an i.MX25 SoC. Signed-off-by: Sascha Hauer <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: nand: sunxi: switch from manual to automated timing configSascha Hauer1-62/+14
The NAND framework is now able to select the best NAND timings for us. All we have to do is implement a ->setup_data_interface() function to apply those timings and remove the timing selection code from the sunxi driver. Signed-off-by: Sascha Hauer <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: nand: automate NAND timings selectionBoris Brezillon2-4/+167
The NAND framework provides several helpers to query timing modes supported by a NAND chip, but this implies that all NAND controller drivers have to implement the same timings selection dance. Also currently NAND devices can be resetted at arbitrary places which also resets the timing for ONFI chips to timing mode 0. Provide a common logic to select the best timings based on ONFI or ->onfi_timing_mode_default information. Hook this into nand_reset() to make sure the new timing is applied each time during a reset. NAND controller willing to support timings adjustment should just implement the ->setup_data_interface() method. Signed-off-by: Boris Brezillon <[email protected]> Signed-off-by: Sascha Hauer <[email protected]>
2016-09-23mtd: nand: Expose data interface for ONFI mode 0Sascha Hauer2-0/+13
The nand layer will need ONFI mode 0 to use it as timing mode before and right after reset. Signed-off-by: Sascha Hauer <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: nand: Add function to convert ONFI mode to data_interfaceSascha Hauer2-0/+34
onfi_init_data_interface() initializes a data interface with values from a given ONFI mode. Signed-off-by: Sascha Hauer <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: nand: convert ONFI mode into data interfaceSascha Hauer1-206/+224
struct nand_data_interface is the designated type to pass to the NAND drivers to configure the timing. To simplify further patches convert the onfi_sdr_timings array from type struct nand_sdr_timings nand_data_interface. Signed-off-by: Sascha Hauer <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: nand: Introduce nand_data_interfaceSascha Hauer1-49/+117
Currently we have no data structure to fully describe a NAND timing. We only have struct nand_sdr_timings for NAND timings in SDR mode, but nothing for DDR mode and also no container to store both types of timing. This patch adds struct nand_data_interface which stores the timing type and a union of different timings. This can be used to pass to drivers in order to configure the timing. Add kerneldoc for struct nand_sdr_timings while touching it anyway. Signed-off-by: Sascha Hauer <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: nand: Create a NAND reset functionSascha Hauer2-5/+24
When NAND devices are resetted some initialization may have to be done, like for example they have to be configured for the timing mode that shall be used. To get a common place where this initialization can be implemented create a nand_reset() function. This currently only issues a NAND_CMD_RESET to the NAND device. The places issuing this command manually are replaced with a call to nand_reset(). Signed-off-by: Sascha Hauer <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: nand: remove unnecessary 'extern' from function declarationsSascha Hauer1-15/+15
'extern' is not necessary for function declarations. To prevent people from adding the keyword to new declarations remove the existing ones. Signed-off-by: Sascha Hauer <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23MAINTAINERS: Add maintainer entry for Ingenic JZ4780 NAND driverHarvey Hunt1-0/+6
Signed-off-by: Harvey Hunt <[email protected]> Cc: Zubair Lutfullah Kakakhel <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: nand: Allow MTD_NAND_OMAP2 to be usable on Keystone devicesRoger Quadros1-4/+4
Some Keystone devices (e.g. K2G) include a OMAP NAND IP. Allow the NAND driver to be usable for both Keystone and OMAP devices. Signed-off-by: Roger Quadros <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: brcmnand: iProc big endian and ONFI supportRay Jui3-15/+28
This patch adds big endian and ONFI support for various iProc based SoCs that use the core brcmstb NAND controller This patch was originally implemented by Prafulla Kota <[email protected]> and fully tested on iProc based NS2 SVK Signed-off-by: Prafulla Kota <[email protected]> Signed-off-by: Ray Jui <[email protected]> Reviewed-by: Kamal Dasu <[email protected]> Acked-by: Kamal Dasu <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: nand_bbt: scan for next free bbt block if writing bbt failsKyle Roeschley1-6/+45
If erasing or writing the BBT fails, we should mark the current BBT block as bad and use the BBT descriptor to scan for the next available unused block in the BBT. We should only return a failure if there isn't any space left. Signed-off-by: Kyle Roeschley <[email protected]> Suggested-by: Jeff Westfahl <[email protected]> Tested-by: Kyle Roeschley <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: nand_bbt: Move BBT block selection logic out of write_bbt()Boris Brezillon1-36/+74
This clarifies the write_bbt() function by removing the write label and simplifying the error/exit path. Signed-off-by: Boris Brezillon <[email protected]> Tested-by: Kyle Roeschley <[email protected]>
2016-09-23mtd: nand: timings: Reorder tRR_min def in mode 0Boris Brezillon1-1/+1
In the ONFI spec, the tRR_min entry is defined before the tRST_max one. Reoder the definition to make it easier to review. Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: nand: timings: Fix tADL_min for ONFI 4.0 chipsBoris Brezillon1-6/+6
ONFI 4.0 spec defines different values for the tADL_min timing. Since we don't want to have different timings depending on the ONFI version, we just set tADL_min to the maximum value (the one specified in the ONFI 4.0 spec). Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: nand: gpmi: get correct free oob spaceHan Xu1-1/+2
change the way to calculate pagesize to get correct free oob space for legacy_set_geometry function. Signed-off-by: Han Xu <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: nand: sh_flctl: handle dma_submit() errorsBrian Norris1-1/+7
Some build tools noticed that 'cookie' is being set but not used. Might as well catch the errors here and handle them the same way we handle other DMA prep steps. Signed-off-by: Brian Norris <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: nand: s3c2410: Register cpufreq notifier only on S3C24xxKrzysztof Kozlowski1-2/+2
The driver registered for CPU frequency transitions to recalculate its clock when ARM clock frequency changes (ratio between frequencies of ARM's parent clock (fclk) and clock for peripherals remains fixed). This is needed only on S3C24xx platform when cpufreq driver is enabled so limit the ifdef to respective cpufreq Kconfig. Suggested-by: Marek Szyprowski <[email protected]> Signed-off-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: nand: Get rid of needless 'goto'Andrey Smirnov1-12/+6
Using "goto" and "switch" statement only makes it harder to follow control flow and doesn't bring any advantages. Rewrite the code to avoid using "goto". Signed-off-by: Brian Norris <[email protected]> Signed-off-by: Andrey Smirnov <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: nand: Error out if cmd_ctrl() is missingAndrey Smirnov1-0/+9
If no user specified chip->select_chip() function is provided, code in nand_base.c will automatically set this hook to nand_select_chip(), which in turn depends on chip->cmd_ctrl() hook being valid. Not providing both of those functions in NAND controller driver (for example by mistake) will result in a bit cryptic segfault. Same is true for chip->cmdfunc(). To avoid the above scenario add a check in nand_scan_dent and error out if cmd_ctrl() is not provided. Suggested-by: Boris Brezillon <[email protected]> Suggested-by: Brian Norris <[email protected]> Signed-off-by: Andrey Smirnov <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23Kconfig: nand: Remove redundant dependency on MTD_NANDAndrey Smirnov1-1/+1
Config MTD_NAND_FSL_IFC is already located inside 'if MTD_NAND' statment, so there's no need to explicitly specify it as a dependency. Signed-off-by: Andrey Smirnov <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23Kconfig: nand: Make MTD_NAND_FSL_ELBC depend on FSL_SOCAndrey Smirnov1-1/+1
MTD_NAND_FSL_ELBC selects FSL_LBC that in turn depends on FSL_SOC, so depending on PPC instead of FSL_SOC leads to this message: warning: (MPC836x_RDK && MTD_NAND_FSL_ELBC && MTD_NAND_FSL_UPM) selects FSL_LBC which has unmet direct dependencies (FSL_SOC) when doing make ARCH=powerpc \ CROSS_COMPILE=powerpc-e500v2-linux-gnuspe- \ allmodconfig" Changing dependency to FSL_SOC fixes that. Signed-off-by: Andrey Smirnov <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2016-09-23mtd: nand: import nand_hw_control_init()Marc Gonzalez14-26/+20
The code to initialize a struct nand_hw_control is duplicated across several drivers. Factorize it using an inline function. Signed-off-by: Marc Gonzalez <[email protected]> Signed-off-by: Boris Brezillon <[email protected]>
2016-09-15mtd: introduce the mtd_pairing_scheme conceptBoris Brezillon3-0/+212
MLC and TLC NAND devices are using NAND cells exposing more than one bit, but instead of attaching all the bits in a given cell to a single NAND page, each bit is usually attached to a different page. This concept is called 'page pairing', and has significant impacts on the flash storage usage. The main problem showed by these devices is that interrupting a page program operation may not only corrupt the page we are programming but also the page it is paired with, hence the need to expose to MTD users the pairing scheme information. The pairing APIs allows one to query pairing information attached to a given page (here called wunit), or the other way around (the wunit pointed by pairing information). It also provides several helpers to help the conversion between absolute offsets and wunits, and query the number of pairing groups. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Brian Norris <[email protected]>
2016-09-09mtd: nand: davinci: Reinitialize the HW ECC engine in 4bit hwctlKarl Beldan1-0/+3
This fixes subpage writes when using 4-bit HW ECC. There has been numerous reports about ECC errors with devices using this driver for a while. Also the 4-bit ECC has been reported as broken with subpages in [1] and with 16 bits NANDs in the driver and in mach* board files both in mainline and in the vendor BSPs. What I saw with 4-bit ECC on a 16bits NAND (on an LCDK) which got me to try reinitializing the ECC engine: - R/W on whole pages properly generates/checks RS code - try writing the 1st subpage only of a blank page, the subpage is well written and the RS code properly generated, re-reading the same page the HW detects some ECC error, reading the same page again no ECC error is detected Note that the ECC engine is already reinitialized in the 1-bit case. Tested on my LCDK with UBI+UBIFS using subpages. This could potentially get rid of the issue workarounded in [1]. [1] 28c015a9daab ("mtd: davinci-nand: disable subpage write for keystone-nand") Fixes: 6a4123e581b3 ("mtd: nand: davinci_nand, 4-bit ECC for smallpage") Cc: <[email protected]> Signed-off-by: Karl Beldan <[email protected]> Acked-by: Boris Brezillon <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2016-08-29mtd: nand: omap2: Don't call dma_release_channel() if dma_request_chan() failedRoger Quadros1-1/+1
dma_request_chan() can fail returning an error pointer. In this case prevent calling dma_release_channel() to prevent a ERR_PTR() dereference. As error path can be called even with no DMA configuration, info->dma can be NULL so don't call dma_release_channel() for that case either. Fixes: de3bfc4a1616: ("mtd: nand: omap2: fix return value check in omap_nand_probe()") Reported-by: Dan Carpenter <[email protected]> Signed-off-by: Roger Quadros <[email protected]> Acked-by: Boris Brezillon <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2016-08-07Linux 4.8-rc1Linus Torvalds1-2/+2
2016-08-07Merge branch 'for-linus' of git://git.kernel.dk/linux-blockLinus Torvalds62-213/+213
Pull more block fixes from Jens Axboe: "As mentioned in the pull the other day, a few more fixes for this round, all related to the bio op changes in this series. Two fixes, and then a cleanup, renaming bio->bi_rw to bio->bi_opf. I wanted to do that change right after or right before -rc1, so that risk of conflict was reduced. I just rebased the series on top of current master, and no new ->bi_rw usage has snuck in" * 'for-linus' of git://git.kernel.dk/linux-block: block: rename bio bi_rw to bi_opf target: iblock_execute_sync_cache() should use bio_set_op_attrs() mm: make __swap_writepage() use bio_set_op_attrs() block/mm: make bdev_ops->rw_page() take a bool for read/write
2016-08-07Merge tag 'drm-for-v4.8-zpos' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds22-156/+334
Pull drm zpos property support from Dave Airlie: "This tree was waiting on some media stuff I hadn't had time to get a stable branchpoint off, so I just waited until it was all in your tree first. It's been around a bit on the list and shouldn't affect anything outside adding the generic API and moving some ARM drivers to using it" * tag 'drm-for-v4.8-zpos' of git://people.freedesktop.org/~airlied/linux: drm: rcar: use generic code for managing zpos plane property drm/exynos: use generic code for managing zpos plane property drm: sti: use generic zpos for plane drm: add generic zpos property
2016-08-07block: rename bio bi_rw to bi_opfJens Axboe51-157/+158
Since commit 63a4cc24867d, bio->bi_rw contains flags in the lower portion and the op code in the higher portions. This means that old code that relies on manually setting bi_rw is most likely going to be broken. Instead of letting that brokeness linger, rename the member, to force old and out-of-tree code to break at compile time instead of at runtime. No intended functional changes in this commit. Signed-off-by: Jens Axboe <[email protected]>
2016-08-07target: iblock_execute_sync_cache() should use bio_set_op_attrs()Jens Axboe1-1/+1
The original commit missed this function, it needs to mark it a write flush. Cc: Mike Christie <[email protected]> Fixes: e742fc32fcb4 ("target: use bio op accessors") Signed-off-by: Jens Axboe <[email protected]>
2016-08-07mm: make __swap_writepage() use bio_set_op_attrs()Jens Axboe1-2/+3
Cleaner than manipulating bio->bi_rw flags directly. Signed-off-by: Jens Axboe <[email protected]>
2016-08-07block/mm: make bdev_ops->rw_page() take a bool for read/writeJens Axboe11-53/+51
Commit abf545484d31 changed it from an 'rw' flags type to the newer ops based interface, but now we're effectively leaking some bdev internals to the rest of the kernel. Since we only care about whether it's a read or a write at that level, just pass in a bool 'is_write' parameter instead. Then we can also move op_is_write() and friends back under CONFIG_BLOCK protection. Reviewed-by: Mike Christie <[email protected]> Signed-off-by: Jens Axboe <[email protected]>
2016-08-07Merge tag 'doc-4.8-fixes' of git://git.lwn.net/linuxLinus Torvalds16-34/+31
Pull documentation fixes from Jonathan Corbet: "Three fixes for the docs build, including removing an annoying warning on 'make help' if sphinx isn't present" * tag 'doc-4.8-fixes' of git://git.lwn.net/linux: DocBook: use DOCBOOKS="" to ignore DocBooks instead of IGNORE_DOCBOOKS=1 Documenation: update cgroup's document path Documentation/sphinx: do not warn about missing tools in 'make help'
2016-08-07Merge tag 'binfmt-for-linus' of ↵Linus Torvalds4-2/+67
git://git.kernel.org/pub/scm/linux/kernel/git/jejb/binfmt_misc Pull binfmt_misc update from James Bottomley: "This update is to allow architecture emulation containers to function such that the emulation binary can be housed outside the container itself. The container and fs parts both have acks from relevant experts. To use the new feature you have to add an F option to your binfmt_misc configuration" From the docs: "The usual behaviour of binfmt_misc is to spawn the binary lazily when the misc format file is invoked. However, this doesn't work very well in the face of mount namespaces and changeroots, so the F mode opens the binary as soon as the emulation is installed and uses the opened image to spawn the emulator, meaning it is always available once installed, regardless of how the environment changes" * tag 'binfmt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/binfmt_misc: binfmt_misc: add F option description to documentation binfmt_misc: add persistent opened binary handler for containers fs: add filp_clone_open API
2016-08-07fs: return EPERM on immutable inodeEryu Guan4-4/+5
In most cases, EPERM is returned on immutable inode, and there're only a few places returning EACCES. I noticed this when running LTP on overlayfs, setxattr03 failed due to unexpected EACCES on immutable inode. So converting all EACCES to EPERM on immutable inode. Acked-by: Dave Chinner <[email protected]> Signed-off-by: Eryu Guan <[email protected]> Signed-off-by: Al Viro <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2016-08-07Merge branch 'for-linus-2' of ↵Linus Torvalds32-130/+82
git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs Pull more vfs updates from Al Viro: "Assorted cleanups and fixes. In the "trivial API change" department - ->d_compare() losing 'parent' argument" * 'for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: cachefiles: Fix race between inactivating and culling a cache object 9p: use clone_fid() 9p: fix braino introduced in "9p: new helper - v9fs_parent_fid()" vfs: make dentry_needs_remove_privs() internal vfs: remove file_needs_remove_privs() vfs: fix deadlock in file_remove_privs() on overlayfs get rid of 'parent' argument of ->d_compare() cifs, msdos, vfat, hfs+: don't bother with parent in ->d_compare() affs ->d_compare(): don't bother with ->d_inode fold _d_rehash() and __d_rehash() together fold dentry_rcuwalk_invalidate() into its only remaining caller
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