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2018-12-31Merge branch 'topic/uniphier' into for-linusVinod Koul5-0/+544
2018-12-31Merge branch 'topic/sprd' into for-linusVinod Koul2-20/+194
2018-12-31Merge branch 'topic/sh' into for-linusVinod Koul8-105/+10
2018-12-31Merge branch 'topic/sa11x0' into for-linusVinod Koul2-37/+8
2018-12-31Merge branch 'topic/mtk' into for-linusVinod Koul3-0/+965
2018-12-31Merge branch 'topic/imx' into for-linusVinod Koul1-3/+1
2018-12-31Merge branch 'topic/ep93xx' into for-linusVinod Koul1-3/+3
2018-12-31Merge branch 'topic/dw' into for-linusVinod Koul7-1/+39
2018-12-31Merge branch 'topic/dmatest' into for-linusVinod Koul2-59/+349
2018-12-31Merge branch 'topic/dirn_remove' into for-linusVinod Koul4-32/+111
2018-12-31Merge branch 'topic/coh' into for-linusVinod Koul1-5/+0
2018-12-31Merge branch 'topic/bcm' into for-linusVinod Koul1-11/+2
2018-12-17dmaengine: qcom_hidma: convert to DEFINE_SHOW_ATTRIBUTEYangtao Li1-27/+6
Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code. Signed-off-by: Yangtao Li <[email protected]> Acked-by: Sinan Kaya <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-12-17dmaengine: pxa: remove DBGFS_FUNC_DECL()Yangtao Li1-24/+12
We already have the DEFINE_SHOW_ATTRIBUTE, There is no need to define such a macro, so remove DBGFS_FUNC_DECL. Signed-off-by: Yangtao Li <[email protected]> Acked-by: Robert Jarzmik <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-12-17dmaengine: mic_x100_dma: convert to DEFINE_SHOW_ATTRIBUTEYangtao Li1-19/+3
Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code. Signed-off-by: Yangtao Li <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-12-17dmaengine: amba-pl08x: convert to DEFINE_SHOW_ATTRIBUTEYangtao Li1-12/+2
Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code. Signed-off-by: Yangtao Li <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-12-17dmaengine: Documentation: Add documentation for multi chan testingSeraj Alijan1-6/+103
Modify documentation to add multi channel testing support. Signed-off-by: Seraj Alijan <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-12-17dmaengine: dmatest: Add transfer_size parameterSeraj Alijan1-6/+22
Existing transfer size "len" is either generated randomly or set to the size of test_buf_size. In some cases we need to explicitly specify a transfer size that is different from the buffer size and non aligned to test the target device's ability to handle unaligned transfers. This patch adds optional parameter "transfer_size" to allow setting explicit transfer size for dma transfers. Signed-off-by: Seraj Alijan <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-12-17dmaengine: dmatest: Add alignment parameterSeraj Alijan1-4/+14
Add parameter "alignment" to allow setting the address alignment manually. Having the ability to configure address alignment from user space adds new testing capabilities where different alignments can be configured for testing without having to modify the dma device alignment properties. If configured, the alignment value will override the device alignment property of the target device. Signed-off-by: Seraj Alijan <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-12-17dmaengine: dmatest: Use fixed point div to calculate iopsSeraj Alijan1-3/+14
Use fixed point division to calculate iops to prevent reporting 0 iops when operations last for longer than a second. Signed-off-by: Seraj Alijan <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-12-17dmaengine: dmatest: Add support for multi channel testingSeraj Alijan1-19/+177
Add support for running tests on multiple channels simultaneously as the driver currently limits to 1 channel per test run. This will add support for stress testing DMA controllers with multi channel capabilities. This is done by adding a callback function to the "channel" parameter that registers the requested channel prior to the "run" parameter being set to 1. Each time the "channel" parameter is populated with a new dma channel, a new test is appended to the thread queue. Once the "run" parameter is set to 1, the test will kick start all pending threads. Signed-off-by: Seraj Alijan <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-12-17dmaengine: rcar-dmac: Document R8A774C0 bindingsFabrizio Castro1-0/+1
Renesas' RZ/G2E (R8A774C0) SoC has DMA controllers compatible with this driver, therefore document RZ/G2E specific bindings. Signed-off-by: Fabrizio Castro <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Simon Horman <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-12-17dt-bindings: dmaengine: usb-dmac: Add binding for r8a774c0Fabrizio Castro1-0/+1
This patch adds bindings for the r8a774c0 (RZ/G2E). Signed-off-by: Fabrizio Castro <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Simon Horman <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-12-05dmaengine: zynqmp_dma: replace spin_lock_bh with spin_lock_irqsaveMichael Tretter1-15/+22
All device_prep_dma_* functions and device_issue_pending can be called from an interrupt context. As this includes hard IRQs, we must use spin_lock_irqsave() instead of spin_lock_bh() to access chan->lock. Signed-off-by: Michael Tretter <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-12-05dmaengine: sprd: Add me as one of the module authorsEric Long1-0/+1
Add me as one of the module authors. Signed-off-by: Eric Long <[email protected]> Signed-off-by: Baolin Wang <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-12-05dmaengine: sprd: Support DMA 2-stage transfer modeEric Long2-4/+156
The Spreadtrum DMA controller supports channel 2-stage tansfer mode, that means we can request 2 dma channels, one for source channel, and another one for destination channel. Once the source channel's transaction is done, it will trigger the destination channel's transaction automatically by hardware signal. Signed-off-by: Eric Long <[email protected]> Signed-off-by: Baolin Wang <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-12-05dmaengine: sprd: Support DMA link-list cyclic callbackEric Long1-11/+14
The Spreadtrum DMA link-list mode is always one cyclic transfer, so we should clear the SPRD_DMA_LLIST_END flag for the link-list configuration. Moreover add cyclic callback support for the cyclic transfer. Signed-off-by: Eric Long <[email protected]> Signed-off-by: Baolin Wang <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-12-05dmaengine: sprd: Set cur_desc as NULL when free or terminate one dma channelEric Long1-0/+1
It will be failed to start one new transfer if the channel started one none interrupt transfer before, since we will only set the schan->cur_desc as NULL depending on the transfer interrupt now. Thus we should set schan->cur_desc as NULL when free or terminate one dma channel to avoid this issue. Signed-off-by: Eric Long <[email protected]> Signed-off-by: Baolin Wang <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-12-05dmaengine: sprd: Fix the last link-list configurationEric Long1-1/+2
We will pass sglen as 0 configure the last link-list configuration when filling the descriptor, which will cause the incorrect link-list configuration. Thus we should check if the sglen is 0 to configure the correct link-list configuration. Signed-off-by: Eric Long <[email protected]> Signed-off-by: Baolin Wang <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-12-05dmaengine: sprd: Get transfer residue depending on the transfer directionEric Long1-1/+20
Add one field to save the transfer direction for struct sprd_dma_desc, which is used to get correct transfer residue depending on the transfer direction. [Baolin Wang adds one field to present the transfer direction] Signed-off-by: Eric Long <[email protected]> Signed-off-by: Baolin Wang <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-12-05dmaengine: sprd: Remove direction usage from struct dma_slave_configBaolin Wang1-3/+0
The direction field of struct dma_slave_config was marked deprecated, thus remove the usage. Signed-off-by: Baolin Wang <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-12-05dmaengine: dmatest: fix a small memory leak in dmatest_func()Dan Carpenter1-4/+4
We recently moved the test size tests around but it means we need to adjust the error handling as well or we leak the "pq_coefs" memory. I updated the label name to reflect that we're freeing coefs. Fixes: 787d3083caf8 ("dmaengine: dmatest: move size checks earlier in function") Signed-off-by: Dan Carpenter <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-12-05dmaengine: sh: Remove R-Mobile APE6 supportGeert Uytterhoeven5-99/+1
Renesas R-Mobile APE6 support is currently unused: - DMA slaves were never enabled in r8a73a4.dtsi, - The driver relies on legacy filter matching and describing all slaves and MID/RIDs in a table, unlike modern DMA engine drivers for similar hardware like rcar-dmac, - The driver doesn't seem to work well. Remove the driver, it can be resurrected from git history when needed. As this was the last user of SH_DMAE_BASE on Renesas ARM SoCs, the sh-dma-engine driver core is now used on SuperH only. Note that the DT bindings are still present, as r8a73a4.dtsi uses them. Signed-off-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Ulrich Hecht <[email protected]> Reviewed-by: Simon Horman <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-11-26dmaengine: coh901318: Remove unused variableVinod Koul1-1/+0
Commit 627469e4445b ("dmaengine: coh901318: Fix a double-lock bug") left flags variable unused, so remove it to fix the warning. drivers/dma/coh901318.c: In function 'coh901318_config': drivers/dma/coh901318.c:1805:16: warning: unused variable 'flags' [-Wunused-variable] unsigned long flags; ^~~~~ Fixes: 627469e4445b ("dmaengine: coh901318: Fix a double-lock bug") Reported-By: Stephen Rothwell <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-11-24dmaengine: ste_dma40: remove dma_slave_config direction usageVinod Koul1-6/+25
dma_slave_config direction was marked as deprecated quite some time back, remove the usage from this driver so that the field can be removed Reviewed-by: Linus Walleij <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-11-24dmaengine: pl330: remove dma_slave_config direction usageVinod Koul1-4/+24
dma_slave_config direction was marked as deprecated quite some time back, remove the usage from this driver so that the field can be removed Signed-off-by: Vinod Koul <[email protected]>
2018-11-24dmaengine: imx-sdma: remove dma_slave_config direction usage and leave ↵Vinod Koul1-17/+39
sdma_event_enable() dma_slave_config direction was marked as deprecated quite some time back, remove the usage from this driver so that the field can be removed ENBLn bit should be set before any dma request triggered, please refer to the below information from i.mx6sololite RM. Otherwise, spi/uart test will be fail because there is dma request from tx fifo always before dmaengine_prep_slave_sg() in where ENBLn set and violate the below rule. https://www.nxp.com/docs/en/reference-manual/IMX6SLRM.pdf: 40.8.28 Channel Enable RAM (SDMAARM_CHNENBLn) "It is thus essential for the Arm platform to program them before any DMA request is triggered to the SDMA, otherwise an unpredictable combination of channels may be started". Signed-off-by: Robin Gong <[email protected]> [vkoul: sqashed patch from Robin into direction change] Signed-off-by: Vinod Koul <[email protected]>
2018-11-24dmaengine: dw-dmac: implement dma protection control settingChristian Lamparter4-0/+18
This patch adds a new device-tree property that allows to specify the dma protection control bits for the all of the DMA controller's channel uniformly. Setting the "correct" bits can have a huge impact on the PPC460EX and APM82181 that use this DMA engine in combination with a DesignWare' SATA-II core (sata_dwc_460ex driver). In the OpenWrt Forum, the user takimata reported that: |It seems your patch unleashed the full power of the SATA port. |Where I was previously hitting a really hard limit at around |82 MB/s for reading and 27 MB/s for writing, I am now getting this: | |root@OpenWrt:/mnt# time dd if=/dev/zero of=tempfile bs=1M count=1024 |1024+0 records in |1024+0 records out |real 0m 13.65s |user 0m 0.01s |sys 0m 11.89s | |root@OpenWrt:/mnt# time dd if=tempfile of=/dev/null bs=1M count=1024 |1024+0 records in |1024+0 records out |real 0m 8.41s |user 0m 0.01s |sys 0m 4.70s | |This means: 121 MB/s reading and 75 MB/s writing! | |The drive is a WD Green WD10EARX taken from an older MBL Single. |I repeated the test a few times with even larger files to rule out |any caching, I'm still seeing the same great performance. OpenWrt is |now completely on par with the original MBL firmware's performance. Another user And.short reported: |I can report that your fix worked! Boots up fine with two |drives even with more partitions, and no more reboot on |concurrent disk access! A closer look into the sata_dwc_460ex code revealed that the driver did initally set the correct protection control bits. However, this feature was lost when the sata_dwc_460ex driver was converted to the generic DMA driver framework. BugLink: https://forum.openwrt.org/t/wd-mybook-live-duo-two-disks/16195/55 BugLink: https://forum.openwrt.org/t/wd-mybook-live-duo-two-disks/16195/50 Fixes: 8b3444852a2b ("sata_dwc_460ex: move to generic DMA driver") Reviewed-by: Andy Shevchenko <[email protected]> Signed-off-by: Christian Lamparter <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-11-24dt-bindings: dmaengine: dw-dmac: add protection control propertyChristian Lamparter3-1/+21
This patch for the DesignWare AHB Central Direct Memory Access Controller adds the dma protection control property: "snps,dma-protection-control" as well as the properties specific values defines into a new include file: include/dt-bindings/dma/dw-dmac.h Note: The protection control signals are one-to-one mapped to the AHB HPROT[1:3] signals for this controller. The HPROT0 (Data Access) is always hardwired to 1. Reviewed-by: Andy Shevchenko <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Christian Lamparter <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-11-24dt-bindings: dmaengine: usb-dmac: Add binding for r8a774a1Biju Das1-0/+1
This patch adds binding for r8a774a1 (RZ/G2M). Signed-off-by: Biju Das <[email protected]> Reviewed-by: Fabrizio Castro <[email protected]> Reviewed-by: Simon Horman <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-11-24dmaengine: rcar-dmac: Document R8A774A1 bindingsFabrizio Castro1-1/+2
Renesas' RZ/G2M (R8A774A1) SoC has DMA controllers compatible with this driver, therefore document RZ/G2M specific bindings. Signed-off-by: Fabrizio Castro <[email protected]> Reviewed-by: Biju Das <[email protected]> Reviewed-by: Rob Herring <[email protected]> Reviewed-by: Simon Horman <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-11-24dmaengine: coh901318: Fix a double-lock bugJia-Ju Bai1-4/+0
The function coh901318_alloc_chan_resources() calls spin_lock_irqsave() before calling coh901318_config(). But coh901318_config() calls spin_lock_irqsave() again in its definition, which may cause a double-lock bug. Because coh901318_config() is only called by coh901318_alloc_chan_resources(), the bug fix is to remove the calls to spin-lock and -unlock functions in coh901318_config(). Signed-off-by: Jia-Ju Bai <[email protected]> Reviewed-by: Linus Walleij <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-11-24dmaengine: uniphier-mdmac: add UniPhier MIO DMAC driverMasahiro Yamada4-0/+519
The MIO DMAC (Media IO DMA Controller) is used in UniPhier LD4, Pro4, and sLD8 SoCs. Signed-off-by: Masahiro Yamada <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-11-24dt-bindings: dmaengine: add DT binding for UniPhier MIO DMACMasahiro Yamada1-0/+25
The MIO DMAC (Media IO DMA Controller) is used in UniPhier LD4, Pro4, and sLD8 SoCs. Signed-off-by: Masahiro Yamada <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-11-24dmaengine: dmatest: move size checks earlier in functionAlexandru Ardelean1-13/+13
There's no need to allocate all that memory if these sizes are invalid anyway. Signed-off-by: Alexandru Ardelean <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-11-24dmaengine: dmatest: use dmaengine_terminate_sync() insteadAlexandru Ardelean1-2/+2
The `dmaengine_terminate_all()` is marked as deprecated, so update the test with `dmaengine_terminate_sync()` which is the recommended alternative. Signed-off-by: Alexandru Ardelean <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-11-24dmaengine: dmatest: unmap data on a single code-path when xfer doneAlexandru Ardelean1-4/+2
After the DMA transfer is done, we don't need to call the un-mapping code in 3 places. One is enough. Signed-off-by: Alexandru Ardelean <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-11-24dmaengine: imx-sdma: Use a single line for dma_alloc_coherent()Fabio Estevam1-3/+1
Make the call to dma_alloc_coherent() to fit into a single line, which helps readability. Signed-off-by: Fabio Estevam <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-11-11dmaengine: mediatek: Add MediaTek Command-Queue DMA controller for MT6765 SoCShun-Chih Yu3-0/+965
MediaTek Command-Queue DMA controller (CQDMA) on MT6765 SoC is dedicated to memory-to-memory transfer through queue based descriptor management. There are only 3 physical channels inside CQDMA, while the driver is extended to support 32 virtual channels for multiple dma users to issue dma requests onto the CQDMA simultaneously. Signed-off-by: Shun-Chih Yu <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
2018-11-11dt-bindings: dmaengine: usb-dmac: Add binding for r8a77470Biju Das1-0/+1
This patch adds usb high-speed dmac binding for r8a77470 (RZ/G1C) SoC. Signed-off-by: Biju Das <[email protected]> Reviewed-by: Fabrizio Castro <[email protected]> Reviewed-by: Simon Horman <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Vinod Koul <[email protected]>
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