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2021-03-29MIPS/bpf: Enable bpf_probe_read{, str}() on MIPS againTiezhu Yang1-0/+1
After commit 0ebeea8ca8a4 ("bpf: Restrict bpf_probe_read{, str}() only to archs where they work"), bpf_probe_read{, str}() functions were no longer available on MIPS, so there exist some errors when running bpf program: root@linux:/home/loongson/bcc# python examples/tracing/task_switch.py bpf: Failed to load program: Invalid argument [...] 11: (85) call bpf_probe_read#4 unknown func bpf_probe_read#4 [...] Exception: Failed to load BPF program count_sched: Invalid argument ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE should be restricted to archs with non-overlapping address ranges, but they can overlap in EVA mode on MIPS, so select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA in arch/mips/Kconfig, otherwise the bpf old helper bpf_probe_read() will not be available. This is similar with the commit d195b1d1d119 ("powerpc/bpf: Enable bpf_probe_read{, str}() on powerpc again"). Fixes: 0ebeea8ca8a4 ("bpf: Restrict bpf_probe_read{, str}() only to archs where they work") Signed-off-by: Tiezhu Yang <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-25MIPS: loongson64: fix bug when PAGE_SIZE > 16KBHuang Pei1-1/+1
When page size larger than 16KB, arguments "vaddr + size(16KB)" in "ioremap_page_range(vaddr, vaddr + size,...)" called by "add_legacy_isa_io" is not page-aligned. As loongson64 needs at least page size 16KB to get rid of cache alias, and "vaddr" is 64KB-aligned, and 64KB is largest page size supported, rounding "size" up to PAGE_SIZE is enough for all page size supported. Fixes: 6d0068ad15e4 ("MIPS: Loongson64: Process ISA Node in DeviceTree") Signed-off-by: Huang Pei <[email protected]> Acked-by: Jiaxun Yang <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-25MIPS: ralink: define stubs for clk_set_parent to fix compile testingKrzysztof Kozlowski1-0/+14
The Ralink MIPS platform does not use Common Clock Framework and does not define certain clock operations leading to compile test failures: /usr/bin/mips-linux-gnu-ld: drivers/usb/phy/phy-tegra-usb.o: in function `tegra_usb_phy_init': phy-tegra-usb.c:(.text+0x1dd4): undefined reference to `clk_get_parent' Reported-by: kernel test robot <[email protected]> Signed-off-by: Krzysztof Kozlowski <[email protected]> Acked-by: John Crispin <[email protected]> Reviewed-by: Dmitry Osipenko <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-25MIPS: Loongson64: Add a Loongson-2K1000 default config fileQing Zhang1-0/+353
Add default config for Loongson-2K1000. Signed-off-by: Jiaxun Yang <[email protected]> Signed-off-by: Qing Zhang <[email protected]> Tested-by: Ming Wang <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-25dt-bindings: interrupt-controller: Add Loongson-2K1000 LIOINTCQing Zhang1-4/+32
Add liointc-2.0 properties support, so update the maxItems and condition description. Signed-off-by: Qing Zhang <[email protected]> Tested-by: Ming Wang <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-25irqchip/loongson-liointc: irqchip add 2.0 versionQing Zhang1-9/+49
Add IO interrupt controller support for Loongson-2K1000, different from the Loongson-3A series is that Loongson-2K1000 has 64 interrupt sources, 0-31 correspond to the device tree liointc0 device node, and the other correspond to liointc1 node. Signed-off-by: Jiaxun Yang <[email protected]> Signed-off-by: Qing Zhang <[email protected]> Tested-by: Ming Wang <[email protected]> Acked-by: Marc Zyngier <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-25MIPS: Loongson64: Add Loongson-2K1000 early_printk_portQing Zhang1-1/+4
Distinguish between Loongson-3A series CPU and Loongson-2K1000 CPU UART0. Signed-off-by: Jiaxun Yang <[email protected]> Signed-off-by: Qing Zhang <[email protected]> Tested-by: Ming Wang <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-25MIPS: Loongson64: Add support for the Loongson-2K1000 to get cpu_clock_freqQing Zhang1-0/+24
Get the fixed-clock from the CPU0 node of the device tree. Signed-off-by: Jiaxun Yang <[email protected]> Signed-off-by: Qing Zhang <[email protected]> Tested-by: Ming Wang <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-25MIPS: Loongson64: Distinguish firmware dependencies DTB/LEFIQing Zhang3-4/+34
Add DTB boot support, only support Loongson-2K1000 processor for now, determine whether to use the built-in DTB or the DTB from the firmware by checking the range of CKSEG0 and XKPHYS. loongson_fw_interface will be used in the future. Signed-off-by: Jiaxun Yang <[email protected]> Signed-off-by: Qing Zhang <[email protected]> Tested-by: Ming Wang <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-25MIPS: Loongson64: DeviceTree for Loongson-2K1000Qing Zhang4-0/+255
Add DeviceTree files for Loongson-2K1000 processor, currently only supports single-core boot. Signed-off-by: Jiaxun Yang <[email protected]> Signed-off-by: Qing Zhang <[email protected]> Tested-by: Ming Wang <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-24MIPS: fix local_irq_{disable,enable} in asmmacro.hHuang Pei1-2/+1
commit ba9196d2e005 ("MIPS: Make DIEI support as a config option") use CPU_HAS_DIEI to indicate whether di/ei is implemented correctly, without this patch, "local_irq_disable" from entry.S in 3A1000 (with buggy di/ei) lose protection of commit e97c5b609880 ("MIPS: Make irqflags.h functions preempt-safe for non-mipsr2 cpus") Fixes: ba9196d2e005 ("MIPS: Make DIEI support as a config option") Signed-off-by: Huang Pei <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-24MIPS: SiByte: Enable pata_platform with SWARM defconfigMaciej W. Rozycki1-0/+8
Enable support for the onboard PATA PIO mode3 interface, which is one of the boot devices supported by the CFE firmware with the Broadcom SWARM board. Include disk, CD-ROM and generic storage drivers. Signed-off-by: Maciej W. Rozycki <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-24MIPS: SiByte: Regenerate stale SWARM defconfigMaciej W. Rozycki1-8/+1
Options have been removed and reordered since the last update, so regenerate the template so as not to interfere with actual changes. Signed-off-by: Maciej W. Rozycki <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-24MIPS: disable CONFIG_IDE in malta*_defconfigChristoph Hellwig2-6/+0
Various malta defconfigs enable CONFIG_IDE for the tc86c001 ide driver, hich is a Toshiba plug in card that does not make much sense to use on bigsur platforms. For all other ATA cards libata support is already enabled. Signed-off-by: Christoph Hellwig <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-24MIPS: disable CONFIG_IDE in bigsur_defconfigChristoph Hellwig1-4/+0
bigsur_defconfig enables CONFIG_IDE for the tc86c001 ide driver, which is a Toshiba plug in card that does not make much sense to use on bigsur platforms. For all other ATA cards libata support is already enabled. Signed-off-by: Christoph Hellwig <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-24MIPS: disable CONFIG_IDE in rbtx49xx_defconfigChristoph Hellwig1-3/+0
rbtx49xx_defconfig enables CONFIG_IDE for the tx4938 and tx4939 ide drivers, but those aren't actually used by the last known remaining user: https://lore.kernel.org/lkml/[email protected]/ Signed-off-by: Christoph Hellwig <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-24MIPS: switch workpad_defconfig from legacy IDE to libataChristoph Hellwig1-3/+6
Use libata instead of the deprecated legacy ide driver in workpad_defconfig. Signed-off-by: Christoph Hellwig <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-24MIPS: disable CONFIG_IDE in sb1250_swarm_defconfigChristoph Hellwig1-3/+0
sb1250_swarm_defconfig enables CONFIG_IDE but no actual host controller driver, so just drop CONFIG_IDE, CONFIG_BLK_DEV_IDECD and CONFIG_BLK_DEV_IDETAPE as they are useless. Signed-off-by: Christoph Hellwig <[email protected]> Acked-by: Maciej W. Rozycki <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-24MIPS: PCI: Fix a typoBhaskar Chowdhury1-1/+1
s/packt/packet/ Signed-off-by: Bhaskar Chowdhury <[email protected]> Acked-by: Randy Dunlap <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-24mips: asm: octeon: A typo fix in the file cvmx-address.hBhaskar Chowdhury1-1/+1
s/techically/technically/ Signed-off-by: Bhaskar Chowdhury <[email protected]> Acked-by: Randy Dunlap <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-14mips: kernel: use DEFINE_DEBUGFS_ATTRIBUTE with debugfs_create_file_unsafe()Wang Qing1-4/+4
debugfs_create_file_unsafe does not protect the fops handed to it against file removal. DEFINE_DEBUGFS_ATTRIBUTE makes the fops aware of the file lifetime and thus protects it against removal. Signed-off-by: Wang Qing <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-14MIPS: clean up CONFIG_MIPS_PGD_C0_CONTEXT handlingHuang Pei2-5/+7
+. LOONGSON64 use 0x98xx_xxxx_xxxx_xxxx as xphys cached, instread of 0xa8xx_xxxx_xxxx_xxxx +. let CONFIG_MIPS_PGD_C0_CONTEXT depend on 64bit +. cast CAC_BASE into u64 to silence warning on MIPS32 CP0 Context has enough room for wraping pgd into its 41-bit PTEBase field. +. For XPHYS, the trick is that pgd is 4kB aligned, and the PABITS <= 53, only save 53 - 12 = 41 bits, aka : bit[63:59] | 0000 00 | bit[53:12] | 0000 0000 0000 +. for CKSEG0, only save 29 - 12 = 17 bits when switching pgd, only need to save bit[53:12] or bit[28:12] into CP0 Context's bit[63:23], see folling asm generated at run time tlbmiss_handler_setup_pgd: .set push .set noreorder dsra a2, a0, 29 move a3, a0 dins a0, zero, 29, 35 daddiu a2, a2, 4 //for CKSEG0, a2 from 0xfffffffffffffffc //into 0 movn a0, a3, a2 dsll a0, a0, 11 jr ra dmtc0 a0, CP0_CONTEXT .set pop when using it on page walking dmfc0 k0, CP0_CONTEXT dins k0, zero, 0, 23 // zero badv2 ori k0, k0, (CAC_BASE >> 53) // *prefix* with bit[63:59] drotr k0, k0, 11 // kick it in the right place Signed-off-by: Huang Pei <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-12MIPS: ingenic: gcw0: SPI panel does not require active-high CSPaul Cercueil1-1/+0
The NT39016 panel is a fun beast, even though the documentation states that the CS line is active-low, it will work just fine if the CS line is configured as active-high, but it won't work if the CS line is forced low or forced high. Since it did actually work with the spi-cs-high property, this is not a bugfix, but we should nonetheless remove that property to match the documentation. Signed-off-by: Paul Cercueil <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-12dt-bindings: panel/kingdisplay,kd035g6-54nt: Remove spi-cs-highPaul Cercueil1-1/+0
The NT39016 panel is a fun beast, even though the documentation states that the CS line is active-low, it will work just fine if the CS line is configured as active-high, but it won't work if the CS line is forced low or forced high. Since it did actually work with the spi-cs-high property, this is not a bugfix, but we should nonetheless remove that property from the example to match the documentation. Signed-off-by: Paul Cercueil <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-12firmware: bcm47xx_nvram: inline code checking NVRAM sizeRafał Miłecki1-18/+7
Separated function was not improving code quality much (or at all). Moreover it expected possible flash end address as argument and it was returning NVRAM size. The new code always operates on offsets which means less logic and less calculations. Signed-off-by: Rafał Miłecki <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-12firmware: bcm47xx_nvram: look for NVRAM with for instead of whileRafał Miłecki1-3/+1
This loop requires variable initialization, stop condition and post iteration increment. It's pretty much a for loop definition. Signed-off-by: Rafał Miłecki <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-12firmware: bcm47xx_nvram: extract code copying NVRAMRafał Miłecki1-18/+25
This simplifies function finding NVRAM. It doesn't directly deal with NVRAM structure anymore and is a bit smaller. Signed-off-by: Rafał Miłecki <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-12firmware: bcm47xx_nvram: add helper checking for NVRAMRafał Miłecki1-12/+18
This avoids duplicating code doing casting and checking for NVRAM magic. Signed-off-by: Rafał Miłecki <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-12firmware: bcm47xx_nvram: rename finding function and its variablesRafał Miłecki1-11/+13
1. Use "bcm47xx_" function name prefix for consistency 2. It takes flash start as argument so s/iobase/flash_start/ 3. "off" was used for finding flash end so just call it "flash_size" Signed-off-by: Rafał Miłecki <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-12MIPS: loongson64: alloc pglist_data at run timeHuang Pei1-3/+14
Loongson64 allocates arrays of pglist_data statically and is located at Node 0, and cpu from Nodes other than 0 need remote access to pglist_data and zone info. Delay pglist_data allocation till run time, and make it NUMA-aware Signed-off-by: Huang Pei <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-12MIPS: Loongson64: Move loongson_system_configuration to loongson.hQing Zhang3-19/+19
The purpose of separating loongson_system_configuration from boot_param.h is to keep the other structure consistent with the firmware. Signed-off-by: Jiaxun Yang <[email protected]> Signed-off-by: Qing Zhang <[email protected]> Acked-by: Jiaxun Yang <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-12MIPS: Loongson64: Remove unused sysconf membersQing Zhang4-72/+1
We don't need them anymore, They are uniform on all Loongson64 systems and have been fixed in DeviceTree.loongson3_platform_init is replaced with DTS + driver. Signed-off-by: Jiaxun Yang <[email protected]> Signed-off-by: Qing Zhang <[email protected]> Acked-by: Jiaxun Yang <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-12MIPS: pci-mt7620: fix PLL lock checkIlya Lipnitskiy1-2/+3
Upstream a long-standing OpenWrt patch [0] that fixes MT7620 PCIe PLL lock check. The existing code checks the wrong register bit: PPLL_SW_SET is not defined in PPLL_CFG1 and bit 31 of PPLL_CFG1 is marked as reserved in the MT7620 Programming Guide. The correct bit to check for PLL lock is PPLL_LD (bit 23). Also reword the error message for clarity. Without this change it is unlikely that this driver ever worked with mainline kernel. [0]: https://lists.infradead.org/pipermail/lede-commits/2017-July/004441.html Signed-off-by: Ilya Lipnitskiy <[email protected]> Cc: John Crispin <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-12mips: bmips: bcm63268: include dt-bindingsÁlvaro Fernández Rojas1-0/+5
Now that there are proper device tree bindings we can start using them. Signed-off-by: Álvaro Fernández Rojas <[email protected]> Acked-by: Florian Fainelli <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-12mips: bmips: bcm6368: include dt-bindingsÁlvaro Fernández Rojas1-0/+4
Now that there are proper device tree bindings we can start using them. Signed-off-by: Álvaro Fernández Rojas <[email protected]> Acked-by: Florian Fainelli <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-12mips: bmips: bcm6362: include dt-bindingsÁlvaro Fernández Rojas1-0/+5
Now that there are proper device tree bindings we can start using them. Signed-off-by: Álvaro Fernández Rojas <[email protected]> Acked-by: Florian Fainelli <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-12mips: bmips: bcm6358: include dt-bindingsÁlvaro Fernández Rojas1-0/+4
Now that there are proper device tree bindings we can start using them. Signed-off-by: Álvaro Fernández Rojas <[email protected]> Acked-by: Florian Fainelli <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-12mips: bmips: bcm6328: include dt-bindingsÁlvaro Fernández Rojas1-0/+5
Now that there are proper device tree bindings we can start using them. Signed-off-by: Álvaro Fernández Rojas <[email protected]> Acked-by: Florian Fainelli <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-12mips: bmips: bcm3368: include dt-bindingsÁlvaro Fernández Rojas1-0/+3
Now that there are proper device tree bindings we can start using them. Signed-off-by: Álvaro Fernández Rojas <[email protected]> Acked-by: Florian Fainelli <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-12mips: dts: brcm: allow including header filesÁlvaro Fernández Rojas16-21/+21
Change /include/ with #include in order to be able to include header files from dt-bindings. Signed-off-by: Álvaro Fernández Rojas <[email protected]> Acked-by: Florian Fainelli <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-10MIPS: Enable some missed configs in loongson3_defconfig to support bpftraceTiezhu Yang1-1/+6
bpftrace is a high-level tracing language for Linux enhanced Berkeley Packet Filter (eBPF) available in recent Linux kernels (4.x). bpftrace uses LLVM as a backend to compile scripts to BPF-bytecode and makes use of BCC for interacting with the Linux BPF system, as well as existing Linux tracing capabilities: kernel dynamic tracing (kprobes), user-level dynamic tracing (uprobes), and tracepoints. According to Linux Kernel Requirements in bpftrace/INSTALL.md [1], the kernel needs to be built with the following options: CONFIG_BPF=y CONFIG_BPF_SYSCALL=y CONFIG_BPF_JIT=y CONFIG_HAVE_EBPF_JIT=y CONFIG_BPF_EVENTS=y CONFIG_FTRACE_SYSCALLS=y CONFIG_FUNCTION_TRACER=y CONFIG_HAVE_DYNAMIC_FTRACE=y CONFIG_DYNAMIC_FTRACE=y CONFIG_HAVE_KPROBES=y CONFIG_KPROBES=y CONFIG_KPROBE_EVENTS=y CONFIG_ARCH_SUPPORTS_UPROBES=y CONFIG_UPROBES=y CONFIG_UPROBE_EVENTS=y CONFIG_DEBUG_FS=y So enable some missed configs in loongson3_defconfig to make sure the above configs are set after make loongson3_defconfig. [1] https://github.com/iovisor/bpftrace/blob/master/INSTALL.md Signed-off-by: Tiezhu Yang <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-10MIPS: BCM63xx: Spello fix in the file clk.cBhaskar Chowdhury1-1/+1
s/revelant/relevant/ Signed-off-by: Bhaskar Chowdhury <[email protected]> Acked-by: Florian Fainelli <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-10mips: syscalls: switch to generic syscallhdr.shMasahiro Yamada2-44/+2
Many architectures duplicate similar shell scripts. This commit converts mips to use scripts/syscallhdr.sh. Signed-off-by: Masahiro Yamada <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-10mips: syscalls: switch to generic syscalltbl.shMasahiro Yamada7-71/+17
Many architectures duplicate similar shell scripts. This commit converts mips to use scripts/syscalltbl.sh. This also unifies syscall_table_32_o32.h and syscall_table_64_o32.h into syscall_table_o32.h. The offset parameters are unneeded here; __SYSCALL(nr, entry) is defined as 'PTR entry', so the parameter 'nr' is not used in the first place. With this commit, syscall tables and generated files are straight mapped, which makes things easier to understand. syscall_n32.tbl --> syscall_table_n32.h syscall_n64.tbl --> syscall_table_n64.h syscall_o32.tbl --> syscall_table_o32.h Then, the abi parameters are also unneeded. Signed-off-by: Masahiro Yamada <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-10MIPS: Remove KVM_TE supportThomas Bogendoerfer16-4262/+23
After removal of the guest part of KVM TE (trap and emulate), also remove the host part. Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-10MIPS: Remove KVM_GUEST supportThomas Bogendoerfer8-493/+1
KVM_GUEST is broken and unmaintained, so let's remove it. Reviewed-by: Huacai Chen <[email protected]> Reviewed-by: Jiaxun Yang <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-10Merge tag 'mips-fixes_5.12_1' into mips-nextThomas Bogendoerfer9-9/+35
- fixes for boot breakage because of misaligned FDTs - fix for overwritten exception handlers - enable MIPS optimized crypto for all MIPS CPUs to improve wireguard performance
2021-03-09MIPS: kernel: Reserve exception base early to prevent corruptionThomas Bogendoerfer4-5/+17
BMIPS is one of the few platforms that do change the exception base. After commit 2dcb39645441 ("memblock: do not start bottom-up allocations with kernel_end") we started seeing BMIPS boards fail to boot with the built-in FDT being corrupted. Before the cited commit, early allocations would be in the [kernel_end, RAM_END] range, but after commit they would be within [RAM_START + PAGE_SIZE, RAM_END]. The custom exception base handler that is installed by bmips_ebase_setup() done for BMIPS5000 CPUs ends-up trampling on the memory region allocated by unflatten_and_copy_device_tree() thus corrupting the FDT used by the kernel. To fix this, we need to perform an early reservation of the custom exception space. Additional we reserve the first 4k (1k for R3k) for either normal exception vector space (legacy CPUs) or special vectors like cache exceptions. Huge thanks to Serge for analysing and proposing a solution to this issue. Fixes: 2dcb39645441 ("memblock: do not start bottom-up allocations with kernel_end") Reported-by: Kamal Dasu <[email protected]> Debugged-by: Serge Semin <[email protected]> Acked-by: Mike Rapoport <[email protected]> Tested-by: Florian Fainelli <[email protected]> Reviewed-by: Serge Semin <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-08MIPS: vmlinux.lds.S: align raw appended dtb to 8 bytesBjørn Mork1-1/+5
The devicetree specification requires 8-byte alignment in memory. This is now enforced by libfdt since commit 79edff12060f ("scripts/dtc: Update to upstream version v1.6.0-51-g183df9e9c2b9") which included the upstream commit 5e735860c478 ("libfdt: Check for 8-byte address alignment in fdt_ro_probe_()"). This broke the MIPS raw appended DTBs which would be appended to the image immediately following the initramfs section. This ends with a 32bit size, resulting in a 4-byte alignment of the DTB. Fix by padding with zeroes to 8-bytes when MIPS_RAW_APPENDED_DTB is defined. Fixes: 79edff12060f ("scripts/dtc: Update to upstream version v1.6.0-51-g183df9e9c2b9") Cc: Rob Herring <[email protected]> Cc: Frank Rowand <[email protected]> Signed-off-by: Bjørn Mork <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
2021-03-08crypto: mips/poly1305 - enable for all MIPS processorsMaciej W. Rozycki3-4/+4
The MIPS Poly1305 implementation is generic MIPS code written such as to support down to the original MIPS I and MIPS III ISA for the 32-bit and 64-bit variant respectively. Lift the current limitation then to enable code for MIPSr1 ISA or newer processors only and have it available for all MIPS processors. Signed-off-by: Maciej W. Rozycki <[email protected]> Fixes: a11d055e7a64 ("crypto: mips/poly1305 - incorporate OpenSSL/CRYPTOGAMS optimized implementation") Cc: [email protected] # v5.5+ Acked-by: Jason A. Donenfeld <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
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