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2019-02-19drm/amdgpu: partial revert cleanup setting bulk_movable v2Christian König1-0/+4
We still need to set bulk_movable to false when new BOs are added or removed. v2: also set it to false on removal Signed-off-by: Christian König <[email protected]> Tested-by: StDenis, Tom <[email protected]> Tested-by: Przemek Socha <[email protected]> Reviewed-by: Zhou, David(ChunMing) <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-19drm/amdgpu: cleanup setting bulk_movableChristian König1-6/+0
We only need to set this to false now when BOs are removed from the LRU. Signed-off-by: Christian König <[email protected]> Reviewed-by: Chunming Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-19drm/amd/powerplay/smu10_hwmgr: use struct_size() in kzalloc()Gustavo A. R. Silva1-5/+3
One of the more common cases of allocation size calculations is finding the size of a structure that has a zero-sized array at the end, along with memory for some number of elements for that array. For example: struct foo { int stuff; struct boo entry[]; }; size = sizeof(struct foo) + count * sizeof(struct boo); instance = kzalloc(size, GFP_KERNEL); Instead of leaving these open-coded and prone to type mistakes, we can now use the new struct_size() helper: instance = kzalloc(struct_size(instance, entry, count), GFP_KERNEL); Notice that, in this case, variable table_size is not necessary, hence it is removed. This code was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-19drm/amd/powerplay/smu8_hwmgr: use struct_size() in kzalloc()Gustavo A. R. Silva1-5/+3
One of the more common cases of allocation size calculations is finding the size of a structure that has a zero-sized array at the end, along with memory for some number of elements for that array. For example: struct foo { int stuff; struct boo entry[]; }; size = sizeof(struct foo) + count * sizeof(struct boo); instance = kzalloc(size, GFP_KERNEL); Instead of leaving these open-coded and prone to type mistakes, we can now use the new struct_size() helper: instance = kzalloc(struct_size(instance, entry, count), GFP_KERNEL); Notice that, in this case, variable table_size is not necessary, hence it is removed. This code was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-19drm/amd/display: Refactor for setup periodic interrupt.Yongqiang Sun9-151/+215
[Why] Current periodic interrupt start point calc in optc is not clear. [How] 1. DM convert delta time to lines number and dc will calculate the start position as per lines number and interrupt type. 2. hwss calculates the start point as per line offset. 3. optc programs vertical interrupts register as per start point and interrupt source. Signed-off-by: Yongqiang Sun <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-19drm/amd/display: Clear stream->mode_changed after commitNicholas Kazlauskas1-0/+3
[Why] The stream->mode_changed flag can persist in the following sequence of atomic commits: Commit 1: Enable CRTC0 (mode_changed = true), Enable CRTC1 (mode_changed = true) Commit 2: Disable CRTC1 (mode_changed = false) In this sequence we want to keep the exiting CRTC0 but it's not in the atomic state for the commit since it hasn't been modified. In this case the stream->mode_changed flag persists as true and we don't re-program the planes for the existing stream. [How] The flag needs to be cleared and it makes the most sense to do it within DC after the state has been committed. Nothing following dc_commit_state should think that the stream's mode has changed. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Leo Li <[email protected]> Acked-by: Tony Cheng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-19drm/amd/display: Do cursor updates after stream updatesNicholas Kazlauskas1-3/+6
[Why] Cursor updates used to happen after vblank/flip/stream updates before the stream update refactor. They now happen before stream updates which means that they're not going to be synced with fb changes and that they're going to programmed for pipes that we're disabling within the same commit. [How] Move them after stream updates. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: David Francis <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-19drm/amd/display: Fix update type mismatches in atomic checkNicholas Kazlauskas1-6/+10
[Why] Whenever a stream or plane is added or removed from the context the pointer will change from old to new. We set lock and validation needed in these cases. But not all of these cases match update_type from dm_determine_update_type_for_commit - an example being overlay plane updates. There are warnings for a few of these cases that should be fixed. [How] We can closer align to DC (and lock_and_validation_needed) by comparing stream and plane pointers. Since the old stream/old plane state is never freed until sometime after the commit tail work finishes we are guaranteed to never get back the same block of memory when we remove and create a stream or plane state in the same commit. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-19drm/amd/display: Don't expose support for DRM_FORMAT_RGB888Nicholas Kazlauskas1-1/+0
[Why] This format isn't supported in DC and some IGT tests fail since we expose support for it. [How] Remove it. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Reviewed-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-19drm/amd/display: Fix wrong z-order when updating overlay planesNicholas Kazlauskas1-0/+36
[Why] If a commit updates an overlay plane via the legacy plane IOCTL then the only plane in the state will be the overlay plane. Overlay planes need to be added first to the DC context, but in the scenario above the plane will be added last. This will result in wrong z-order during rendering. [How] If any non-cursor plane has been updated then the rest of the non-cursor planes should be added to the CRTC state. The cursor plane doesn't need to be included for stream updates and locking it will cause performance issues. It should be ignored. DC requires that the surface count passed during stream updates be the number of surfaces currently on the stream to enable fast updates. This previously wasn't the case without this patch, so this also allows this optimization to occur. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Leo Li <[email protected]> Acked-by: Tony Cheng <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-19drm/amd/display: send pipe set command to dmcu when backlight is setJosip Pavic1-22/+23
[Why] Previously, a change removed code that would send a pipe set command to dmcu each time the backlight was set, as it was thought to be superfluous. However, it is possible for the backlight to be set before a valid pipe has been set, which causes DMCU to hang after a DPMS restore on some systems. [How] Send a pipe set command to DMCU prior to setting the backlight. Signed-off-by: Josip Pavic <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-19drm/amd/display: Ungate stream before programming registersGary Kattan3-2/+16
[Why] Certain tests fail after a fresh reboot. This is caused by writing to registers prior to ungating the stream we're trying to program. [How] Make sure the stream is ungated before writing to its registers. This also enables power-gating plane resources before init_hw initializes them. Additionally, this does some refactoring to move gating/ungating from enable/disable_plane functions to where stream resources are enabled/disabled. Signed-off-by: Gary Kattan <[email protected]> Reviewed-by: Dmytro Laktyushkin <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-19drm/amd/display: Increase precision for backlight curveAnthony Koo1-19/+4
[Why] We are currently losing precision when we convert from 16 bit --> 8 bit --> 16 bit. [How] We shouldn't down convert unnecessarily and lose precision. Keep values at 16 bit and use directly. Signed-off-by: Anthony Koo <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-19drm/amd/display: remove screen flashes on seamless bootAnthony Koo3-2/+41
[Why] We want boot to desktop to be seamless [How] During init pipes, avoid touching the pipes where GOP has already enabled the HW to the state we want. Signed-off-by: Anthony Koo <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-19drm/amd/display: send pipe set command to dmcu when stream unblanksJosip Pavic3-16/+21
[Why] When stream is blanked, pipe set command is sent to dmcu to notify it that the abm pipe is disabled. When stream is unblanked, no notification is made to dmcu that the abm pipe has been enabled, resulting in abm not being enabled in the firmware. [How] When stream is unblanked, send a pipe set command to dmcu. Signed-off-by: Josip Pavic <[email protected]> Reviewed-by: Anthony Koo <[email protected]> Acked-by: Leo Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-19Revert "drm/amdgpu: Fix bugs in setting CP RB/MEC DOORBELL_RANGE registers"Yong Zhao2-29/+9
The original change caused a regression, so revert it until the new fix is ready. BUG: https://bugs.freedesktop.org/show_bug.cgi?id=109650 This reverts commit 764c85fef41722db0f21558c6c2fb38bee172d19. Signed-off-by: Yong Zhao <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-19Revert "drm/amdgpu: Delete user queue doorbell variables"Yong Zhao3-0/+12
This reverts commit 9006c6bd9059cb9807fa863bafc1d776222cb61b. Signed-off-by: Yong Zhao <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-19drm/radeon/evergreen_cs: fix missing break in switch statementGustavo A. R. Silva1-0/+1
Add missing break statement in order to prevent the code from falling through to case CB_TARGET_MASK. This bug was found thanks to the ongoing efforts to enable -Wimplicit-fallthrough. Fixes: dd220a00e8bd ("drm/radeon/kms: add support for streamout v7") Cc: [email protected] Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-18drm/amdgpu/si_dpm: Mark expected switch fall-throughsGustavo A. R. Silva1-0/+2
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Warning level 3 was used: -Wimplicit-fallthrough=3 This patch is part of the ongoing efforts to enable -Wimplicit-fallthrough. Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-18drm/radeon/ci_dpm: Mark expected switch fall-throughsGustavo A. R. Silva1-0/+2
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Warning level 3 was used: -Wimplicit-fallthrough=3 This patch is part of the ongoing efforts to enable -Wimplicit-fallthrough. Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-18drm/amd/powerplay/smu7_hwmgr: Mark expected switch fall-throughsGustavo A. R. Silva1-0/+2
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Warning level 3 was used: -Wimplicit-fallthrough=3 This patch is part of the ongoing efforts to enable -Wimplicit-fallthrough. Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-18drm/amd/display/dce_mem_input: Mark expected switch fall-throughGustavo A. R. Silva1-1/+1
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Warning level 3 was used: -Wimplicit-fallthrough=3 Notice that, in this particular case, the code comment is modified in accordance with what GCC is expecting to find. This patch is part of the ongoing efforts to enable -Wimplicit-fallthrough. Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-18drm/radeon/si_dpm: Mark expected switch fall-throughsGustavo A. R. Silva1-0/+2
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Warning level 3 was used: -Wimplicit-fallthrough=3 This patch is part of the ongoing efforts to enable -Wimplicit-fallthrough. Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-18drm/amd/display/dc/bios_parser2: Mark expected switch fall-throughsGustavo A. R. Silva1-0/+2
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Warning level 3 was used: -Wimplicit-fallthrough=3 This patch is part of the ongoing efforts to enable -Wimplicit-fallthrough. Signed-off-by: Gustavo A. R. Silva <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-18drm/amdkfd: Optimize out sdma doorbell array in kgd2kfd_shared_resourcesYong Zhao3-38/+23
We can directly calculate sdma doorbell indexes in the process doorbell pages through the doorbell_index structure in amdgpu_device, so no need to cache them in kgd2kfd_shared_resources any more. This alleviates the adaptation needs when new SDMA configurations are introduced. Signed-off-by: Yong Zhao <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-18drm/amdkfd: Fix bugs regarding CP queue doorbell mask on SOC15Yong Zhao4-18/+38
Reserved doorbells for SDMA IH and VCN were not properly masked out when allocating doorbells for CP user queues. This patch fixed that. Signed-off-by: Yong Zhao <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-18drm/amdgpu: Add first_non_cp and last_non_cp in amdgpu_doorbell_indexYong Zhao3-0/+17
They will be used to inform KFD the doorbell range not usable for CP. Signed-off-by: Yong Zhao <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-18drm/amdkfd: Move a constant definition aroundYong Zhao1-5/+6
The similar definitions should be consecutive. Signed-off-by: Yong Zhao <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-15drm/amdgpu: remove some old unused dpm helpersAlex Deucher2-97/+0
Carried over from radeon, but no longer used. Reviewed-by: Michel Dänzer <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-15drm/amdgpu: Add command to override the context priority.Bas Nieuwenhuizen2-2/+42
Given a master fd we can then override the priority of the context in another fd. Using these overrides was recommended by Christian instead of trying to submit from a master fd, and I am adding a way to override a single context instead of the entire process so we can only upgrade a single Vulkan queue and not effectively the entire process. Reused the flags field as it was checked to be 0 anyways, so nothing used it. This is source-incompatible (due to the name change), but ABI compatible. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-15drm/amdgpu: Check if fd really is an amdgpu fd.Bas Nieuwenhuizen3-3/+25
Otherwise we interpret the file private data as drm & amdgpu data while it might not be, possibly allowing one to get memory corruption. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-15drm/amdgpu: Only add rqs for initialized rings.Bas Nieuwenhuizen1-3/+8
I don't see another way to figure out if a ring is initialized if the hardware block might not be initialized. Entities have been fixed up to handle num_rqs = 0. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-15drm/sched: Fix entities with 0 rqs.Bas Nieuwenhuizen1-13/+26
Some blocks in amdgpu can have 0 rqs. Job creation already fails with -ENOENT when entity->rq is NULL, so jobs cannot be pushed. Without a rq there is no scheduler to pop jobs, and rq selection already does the right thing with a list of length 0. So the operations we need to fix are: - Creation, do not set rq to rq_list[0] if the list can have length 0. - Do not flush any jobs when there is no rq. - On entity destruction handle the rq = NULL case. - on set_priority, do not try to change the rq if it is NULL. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-13drm/amdgpu: don't clamp debugfs register access to the BAR sizeAlex Deucher1-3/+0
This prevents us from accessing extended registers in tools like umr. The register access functions already check if the offset is beyond the BAR size and use the indirect accessors with locking so this is safe. Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-13drm/amdgpu: fix several indentation issuesColin Ian King6-6/+6
There are several statements that are incorrectly indented. Fix these. Reviewed-by: Christian König <[email protected]> Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-13drm/amdgpu/powerplay: declare firmware for CI cardsAlex Deucher1-0/+4
Missing firmware declaration caused firmware requirement to not be noted by the module and may cause firmware to not be available in initrd. Fixes: bc4b539e385088 "drm/amdgpu: remove old CI DPM implementation" Reviewed-by: James Zhu <[email protected]> Tested-by: James Zhu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-13drm/amd/display: Fix deadlock with display during hanged ring recovery.Andrey Grodzovsky1-6/+13
When ring hang happens amdgpu_dm_commit_planes during flip is holding the BO reserved and then stack waiting for fences to signal in reservation_object_wait_timeout_rcu (which won't signal because there was a hnag). Then when we try to shutdown display block during reset recovery from drm_atomic_helper_suspend we also try to reserve the BO from dm_plane_helper_cleanup_fb ending in deadlock. Also remove useless WARN_ON Signed-off-by: Andrey Grodzovsky <[email protected]> Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-13drm/amdgpu: Delete user queue doorbell variablesYong Zhao3-12/+0
They are no longer used, so delete them to avoid confusion. Signed-off-by: Yong Zhao <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-13drm/amdgpu: Fix bugs in setting CP RB/MEC DOORBELL_RANGE registersYong Zhao2-9/+29
CP_RB_DOORBELL_RANGE_LOWER/UPPER and CP_MEC_DOORBELL_RANGE_LOWER/UPPER are used for waking up an idle scheduler and for power gating support. Usually the first few doorbells in pci doorbell bar are used for RB and all leftover for MEC. This patch fixes the incorrect settings. Theoretically, gfx ring doorbells should come before all MEC doorbells to be consistent with the design. However, since the doorbell allocations are agreed by all and we are not free to change them, also considering the kernel MEC ring doorbells which are before gfx ring doorbells are not used often, we compromise by leaving the doorbell allocations unchanged. Signed-off-by: Yong Zhao <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-13drm/amdgpu: Simplify eviction fence handlingFelix Kuehling1-123/+11
Temporarily removing eviction fences to avoid triggering them by accident is no longer necessary due to the fence_owner logic in amdgpu_sync_resv. As a result the ef_list usage of amdgpu_amdkfd_remove_eviction_fence and amdgpu_amdkfd_add_eviction_fence are no longer needed. Signed-off-by: Felix Kuehling <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Harish Kasiviswanathan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-13drm/amdgpu: Avoid setting off KFD eviction fences in amdgpu_vmFelix Kuehling1-3/+3
Use FENCE_OWNER_KFD to synchronize PT/PD initialization and clearing of page table entries. This avoids triggering KFD eviction fences on the PD reservation objects of compute VMs. Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-13drm/amdgpu: Replace ttm_bo_wait with amdgpu_bo_sync_waitFelix Kuehling1-2/+2
The fence_owner logic in amdgpu_sync_wait will allow waiting without having to temporarily remove eviction fences. Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-13drm/amdgpu: Add helper to wait for BO fences using a sync objectFelix Kuehling3-27/+28
Creates a temporary sync object to wait for the BO reservation. This generalizes amdgpu_vm_wait_pd. Signed-off-by: Felix Kuehling <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-13drm/amdgpu: tighten gpu_recover in mailbox_flr to avoid duplicate recover in ↵wentalou1-1/+2
sriov sriov's gpu_recover inside xgpu_ai_mailbox_flr_work would cause duplicate recover in TDR. TDR's gpu_recover would be triggered by amdgpu_job_timedout, that could avoid vk-cts failure by unexpected recover. Signed-off-by: Wentao Lou <[email protected]> Acked-by: Andrey Grodzovsky <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-13drm/amdgpu: cleanup amdgpu_ih_process a bit moreChristian König4-39/+21
Remove the callback and call the dispatcher directly. Signed-off-by: Christian König <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2019-02-11drm/virtio: do NOT reuse resource idsGerd Hoffmann1-0/+13
Bisected guest kernel changes crashing qemu. Landed at "6c1cd97bda drm/virtio: fix resource id handling". Looked again, and noticed we where not only leaking *some* ids, but *all* ids. The old code never ever called virtio_gpu_resource_id_put(). So, commit 6c1cd97bda effectively makes the linux kernel starting re-using IDs after releasing them, and apparently virglrenderer can't deal with that. Oops. This patch puts a temporary stopgap into place for the 5.0 release. Signed-off-by: Gerd Hoffmann <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Signed-off-by: Dave Airlie <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-02-11Merge branch 'drm-next-5.1' of git://people.freedesktop.org/~agd5f/linux ↵Dave Airlie51-486/+1161
into drm-next Updates for 5.1: - GDS fixes - Add AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES interface - GPUVM fixes - PCIE DPM switching fixes for vega20 - Vega10 uclk DPM regression fix - DC Freesync fixes - DC ABM fixes - Various DC cleanups Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-02-11Merge tag 'drm-intel-next-2019-02-07' of ↵Dave Airlie55-937/+2756
git://anongit.freedesktop.org/drm/drm-intel into drm-next UAPI Changes: - Expose RPCS (SSEU) configuration to userspace for Ice Lake in order to allow userspace to reconfigure the subslice config per context basis. (Tvrtko, Lionel) Driver Changes: - Execbuf and preemption improvements including selftests (Chris) - Rename HAS_GMCH_DISPLAY/HAS_GMCH (Rodrigo) - Debugfs error handling fix for robustness (Greg) - Improve reg_rw traces (Ville) - Push clear_intel_crtc_state onto the heap (Chris) - Watermark fixes for Ice Lake (Ville) - Fix enable count array size and bounds checking (Tvrtko) - MST Fixes (Lyude) - Prevent race and handle error on I915_GEM_MMAP (Joonas) - Initial rework for an full atomic gamma mode (Ville) Signed-off-by: Dave Airlie <[email protected]> From: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-02-11Merge tag 'drm/tegra/for-5.1-rc1' of ↵Dave Airlie23-311/+650
git://anongit.freedesktop.org/tegra/linux into drm-next drm/tegra: Changes for v5.1-rc1 This set of changes starts of with some refactoring of the CEC support to make it reusable on Tegra210 and later. Following are a couple of fixes for HDMI audio support (via HDA). The bulk here is a set of preparatory patches working towards enabling Tegra186 support for host1x and VIC. Additional patches will be needed to fully enable this, but they're not quite ready yet. To round things off, this also adds support for configuring the SOR crossbar using device tree, and fixes a couple of job-related issues in the host1x code. Signed-off-by: Dave Airlie <[email protected]> From: Thierry Reding <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2019-02-11Merge tag 'du-next-20190208' of git://linuxtv.org/pinchartl/media into drm-nextDave Airlie10-64/+158
Renesas display drivers changes for v5.1 (2nd part): - R8A7744 LVDS support - DPAD0 output support on D3/E3 Signed-off-by: Dave Airlie <[email protected]> From: Laurent Pinchart <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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